2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+5 0xc560 0xc1 0x5ca3
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/platform_device.h>
48 #include <linux/hwmon.h>
49 #include <linux/hwmon-sysfs.h>
50 #include <linux/hwmon-vid.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/acpi.h>
59 enum kinds { nct6775, nct6776, nct6779 };
61 /* used to set data->name = nct6775_device_names[data->sio_kind] */
62 static const char * const nct6775_device_names[] = {
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
72 static unsigned short fan_debounce;
73 module_param(fan_debounce, ushort, 0);
74 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
76 #define DRVNAME "nct6775"
79 * Super-I/O constants and functions
82 #define NCT6775_LD_ACPI 0x0a
83 #define NCT6775_LD_HWM 0x0b
84 #define NCT6775_LD_VID 0x0d
86 #define SIO_REG_LDSEL 0x07 /* Logical device select */
87 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
88 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
89 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
90 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
91 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
92 #define SIO_REG_VID_DATA 0xF1 /* VID data */
94 #define SIO_NCT6775_ID 0xb470
95 #define SIO_NCT6776_ID 0xc330
96 #define SIO_NCT6779_ID 0xc560
97 #define SIO_ID_MASK 0xFFF0
100 superio_outb(int ioreg, int reg, int val)
103 outb(val, ioreg + 1);
107 superio_inb(int ioreg, int reg)
110 return inb(ioreg + 1);
114 superio_select(int ioreg, int ld)
116 outb(SIO_REG_LDSEL, ioreg);
121 superio_enter(int ioreg)
128 superio_exit(int ioreg)
132 outb(0x02, ioreg + 1);
139 #define IOREGION_ALIGNMENT (~7)
140 #define IOREGION_OFFSET 5
141 #define IOREGION_LENGTH 2
142 #define ADDR_REG_OFFSET 0
143 #define DATA_REG_OFFSET 1
145 #define NCT6775_REG_BANK 0x4E
146 #define NCT6775_REG_CONFIG 0x40
149 * Not currently used:
150 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
151 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
152 * REG_MAN_ID is at port 0x4f
153 * REG_CHIP_ID is at port 0x58
156 /* Voltage min/max registers for nr=7..14 are in bank 5 */
158 static const u16 NCT6775_REG_IN_MAX[] = {
159 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
160 0x55c, 0x55e, 0x560, 0x562 };
161 static const u16 NCT6775_REG_IN_MIN[] = {
162 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
163 0x55d, 0x55f, 0x561, 0x563 };
164 static const u16 NCT6775_REG_IN[] = {
165 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
168 static const u16 NCT6779_REG_IN[] = {
169 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
170 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e
173 #define NCT6775_REG_VBAT 0x5D
174 #define NCT6775_REG_DIODE 0x5E
176 #define NCT6775_REG_FANDIV1 0x506
177 #define NCT6775_REG_FANDIV2 0x507
179 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
181 static const u16 NCT6775_REG_ALARM[6] = { 0x459, 0x45A, 0x45B };
182 static const u16 NCT6779_REG_ALARM[6] = { 0x459, 0x45A, 0x45B, 0x568 };
184 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
186 static const s8 NCT6775_ALARM_BITS[]
187 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
188 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
190 6, 7, 11, 10, 23, /* fan1..fan5 */
191 -1, -1, -1, /* unused */
192 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
193 12, -1 }; /* intrusion0, intrusion1 */
195 static const s8 NCT6776_ALARM_BITS[]
196 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
197 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
199 6, 7, 11, 10, 23, /* fan1..fan5 */
200 -1, -1, -1, /* unused */
201 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
202 12, 9 }; /* intrusion0, intrusion1 */
204 static const s8 NCT6779_ALARM_BITS[]
205 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
206 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
208 6, 7, 11, 10, 23, /* fan1..fan5 */
209 -1, -1, -1, /* unused */
210 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
211 12, 9 }; /* intrusion0, intrusion1 */
213 #define FAN_ALARM_BASE 16
214 #define TEMP_ALARM_BASE 24
215 #define INTRUSION_ALARM_BASE 30
217 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
218 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
220 /* DC or PWM output fan configuration */
221 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
222 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
224 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
225 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
227 /* Advanced Fan control, some values are common for all fans */
229 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
230 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
231 static const u16 NCT6779_REG_FAN_PULSES[]
232 = { 0x644, 0x645, 0x646, 0x647, 0x648 };
234 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
235 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
236 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
237 0x103, 0x203, 0x303, 0x803, 0x903 };
238 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
239 0x104, 0x204, 0x304, 0x804, 0x904 };
240 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
241 0x105, 0x205, 0x305, 0x805, 0x905 };
242 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
243 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
244 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
245 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
247 static const u16 NCT6775_REG_FAN_STOP_TIME[]
248 = { 0x107, 0x207, 0x307, 0x807, 0x907 };
249 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
250 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
252 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
253 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
255 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
257 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
259 static const u16 NCT6779_REG_TOLERANCE_H[]
260 = { 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
262 static const u16 NCT6775_REG_TEMP[]
263 = { 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
264 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
266 static const u16 NCT6775_REG_TEMP_CONFIG[]
267 = { 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
268 static const u16 NCT6775_REG_TEMP_HYST[]
269 = { 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
270 static const u16 NCT6775_REG_TEMP_OVER[]
271 = { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
273 static const u16 NCT6775_REG_TEMP_SOURCE[]
274 = { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
276 static const u16 NCT6775_REG_TEMP_SEL[]
277 = { 0x100, 0x200, 0x300, 0x800, 0x900 };
279 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[]
280 = { 0x139, 0x239, 0x339, 0x839, 0x939 };
281 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[]
282 = { 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
283 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[]
284 = { 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
285 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[]
286 = { 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
287 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[]
288 = { 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
290 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[]
291 = { 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
293 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
295 static const u16 NCT6779_REG_TEMP_OFFSET[]
296 = { 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
298 static const u16 NCT6776_REG_TEMP_CONFIG[11]
299 = { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
301 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
303 static const u16 NCT6775_REG_AUTO_TEMP[]
304 = { 0x121, 0x221, 0x321, 0x821, 0x921 };
305 static const u16 NCT6775_REG_AUTO_PWM[]
306 = { 0x127, 0x227, 0x327, 0x827, 0x927 };
308 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
309 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
311 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
313 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
314 0x135, 0x235, 0x335, 0x835, 0x935 };
315 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
316 0x138, 0x238, 0x338, 0x838, 0x938 };
318 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
319 0x136, 0x236, 0x336, 0x836, 0x936 };
320 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
321 0x137, 0x237, 0x337, 0x837, 0x937 };
323 static const char *const nct6775_temp_label[] = {
337 "PCH_CHIP_CPU_MAX_TEMP",
347 static const char *const nct6776_temp_label[] = {
362 "PCH_CHIP_CPU_MAX_TEMP",
373 static const char *const nct6779_temp_label[] = {
392 "PCH_CHIP_CPU_MAX_TEMP",
403 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
404 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
406 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
407 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
409 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
410 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
411 0, 0, 0, 0, 0, 0, 0, 0,
412 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
415 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
416 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
419 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
420 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
422 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
423 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
425 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
426 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
428 static inline int reg_to_pwm_enable(int pwm, int mode)
430 if (mode == 0 && pwm == 255)
435 static inline int pwm_enable_to_reg(int mode)
446 /* 1 is DC mode, output in ms */
447 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
449 return mode ? 400 * reg : 100 * reg;
452 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
454 return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
455 (msec + 50) / 100), 1, 255);
458 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
460 if (reg == 0 || reg == 255)
462 return 1350000U / (reg << divreg);
465 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
467 if ((reg & 0xff1f) == 0xff1f)
470 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
475 return 1350000U / reg;
478 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
480 if (reg == 0 || reg == 0xffff)
484 * Even though the registers are 16 bit wide, the fan divisor
487 return 1350000U / (reg << divreg);
490 static inline unsigned int
497 * Some of the voltage inputs have internal scaling, the tables below
498 * contain 8 (the ADC LSB in mV) * scaling factor * 100
500 static const u16 scale_in[15] = {
501 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
505 static inline long in_from_reg(u8 reg, u8 nr)
507 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
510 static inline u8 in_to_reg(u32 val, u8 nr)
512 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
517 * Data structures and manipulation thereof
520 struct nct6775_data {
521 int addr; /* IO base of hw monitor block */
525 struct device *hwmon_dev;
528 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
531 u8 temp_src[NUM_TEMP];
532 u16 reg_temp_config[NUM_TEMP];
533 const char * const *temp_label;
540 const s8 *ALARM_BITS;
543 const u16 *REG_IN_MINMAX[2];
545 const u16 *REG_TARGET;
547 const u16 *REG_FAN_MODE;
548 const u16 *REG_FAN_MIN;
549 const u16 *REG_FAN_TIME[3];
551 const u8 *REG_PWM_MODE;
552 const u8 *PWM_MODE_MASK;
554 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
555 * [3]=max_output, [4]=step_output,
556 * [5]=weight_duty_step, [6]=weight_duty_base
558 const u16 *REG_PWM_READ;
560 const u16 *REG_TEMP_MON;
561 const u16 *REG_AUTO_TEMP;
562 const u16 *REG_AUTO_PWM;
564 const u16 *REG_CRITICAL_TEMP;
565 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
567 const u16 *REG_TEMP_SOURCE; /* temp register sources */
568 const u16 *REG_TEMP_SEL[2]; /* pwm temp, 0=base, 1=weight */
570 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=hyst, 2=step */
572 const u16 *REG_TEMP_OFFSET;
574 const u16 *REG_ALARM;
576 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
577 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
579 struct mutex update_lock;
580 char valid; /* !=0 if following fields are valid */
581 unsigned long last_updated; /* In jiffies */
583 /* Register values */
584 u8 bank; /* current register bank */
585 u8 in_num; /* number of in inputs we have */
586 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
591 u8 has_fan; /* some fan inputs can be disabled */
592 u8 has_fan_min; /* some fans don't have min register */
595 u8 temp_fixed_num; /* 3 or 6 */
596 u8 temp_type[NUM_TEMP_FIXED];
597 s8 temp_offset[NUM_TEMP_FIXED];
598 s16 temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
601 u8 pwm_num; /* number of pwm */
603 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
604 u8 pwm_enable[5]; /* 0->off
606 * 2->thermal cruise mode (also called SmartFan I)
607 * 3->fan speed cruise mode
609 * 5->enhanced variable thermal cruise (SmartFan IV)
611 u8 pwm[7][5]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
612 * [3]=max_output, [4]=step_output,
613 * [5]=weight_duty_step, [6]=weight_duty_base
619 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
621 /* Automatic fan speed control registers */
626 u8 pwm_temp_sel[2][5];
628 bool pwm_sel_enable[2][5];/* 0->stop_val, 1->weight;
629 * false->off, true->on
631 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
643 struct nct6775_sio_data {
648 static bool is_word_sized(struct nct6775_data *data, u16 reg)
650 switch (data->kind) {
652 return (((reg & 0xff00) == 0x100 ||
653 (reg & 0xff00) == 0x200) &&
654 ((reg & 0x00ff) == 0x50 ||
655 (reg & 0x00ff) == 0x53 ||
656 (reg & 0x00ff) == 0x55)) ||
657 (reg & 0xfff0) == 0x630 ||
658 reg == 0x640 || reg == 0x642 ||
660 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
661 reg == 0x73 || reg == 0x75 || reg == 0x77;
663 return (((reg & 0xff00) == 0x100 ||
664 (reg & 0xff00) == 0x200) &&
665 ((reg & 0x00ff) == 0x50 ||
666 (reg & 0x00ff) == 0x53 ||
667 (reg & 0x00ff) == 0x55)) ||
668 (reg & 0xfff0) == 0x630 ||
670 reg == 0x640 || reg == 0x642 ||
671 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
672 reg == 0x73 || reg == 0x75 || reg == 0x77;
674 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
675 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
677 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
678 reg == 0x640 || reg == 0x642 ||
679 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
686 * On older chips, only registers 0x50-0x5f are banked.
687 * On more recent chips, all registers are banked.
688 * Assume that is the case and set the bank number for each access.
689 * Cache the bank number so it only needs to be set if it changes.
691 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
694 if (data->bank != bank) {
695 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
696 outb_p(bank, data->addr + DATA_REG_OFFSET);
701 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
703 int res, word_sized = is_word_sized(data, reg);
705 mutex_lock(&data->lock);
707 nct6775_set_bank(data, reg);
708 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
709 res = inb_p(data->addr + DATA_REG_OFFSET);
711 outb_p((reg & 0xff) + 1,
712 data->addr + ADDR_REG_OFFSET);
713 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
716 mutex_unlock(&data->lock);
720 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
722 int word_sized = is_word_sized(data, reg);
724 mutex_lock(&data->lock);
726 nct6775_set_bank(data, reg);
727 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
729 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
730 outb_p((reg & 0xff) + 1,
731 data->addr + ADDR_REG_OFFSET);
733 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
735 mutex_unlock(&data->lock);
739 /* We left-align 8-bit temperature values to make the code simpler */
740 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
744 res = nct6775_read_value(data, reg);
745 if (!is_word_sized(data, reg))
751 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
753 if (!is_word_sized(data, reg))
755 return nct6775_write_value(data, reg, value);
758 /* This function assumes that the caller holds data->update_lock */
759 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
765 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
766 | (data->fan_div[0] & 0x7);
767 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
770 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
771 | ((data->fan_div[1] << 4) & 0x70);
772 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
774 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
775 | (data->fan_div[2] & 0x7);
776 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
779 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
780 | ((data->fan_div[3] << 4) & 0x70);
781 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
786 static void nct6775_write_fan_div_common(struct device *dev,
787 struct nct6775_data *data, int nr)
789 if (data->kind == nct6775)
790 nct6775_write_fan_div(data, nr);
793 static void nct6775_update_fan_div(struct nct6775_data *data)
797 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
798 data->fan_div[0] = i & 0x7;
799 data->fan_div[1] = (i & 0x70) >> 4;
800 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
801 data->fan_div[2] = i & 0x7;
802 if (data->has_fan & (1<<3))
803 data->fan_div[3] = (i & 0x70) >> 4;
806 static void nct6775_update_fan_div_common(struct device *dev,
807 struct nct6775_data *data)
809 if (data->kind == nct6775)
810 nct6775_update_fan_div(data);
813 static void nct6775_update_pwm(struct device *dev)
815 struct nct6775_data *data = dev_get_drvdata(dev);
820 for (i = 0; i < data->pwm_num; i++) {
821 if (!(data->has_pwm & (1 << i)))
824 duty_is_dc = data->REG_PWM_MODE[i] &&
825 (nct6775_read_value(data, data->REG_PWM_MODE[i])
826 & data->PWM_MODE_MASK[i]);
827 data->pwm_mode[i] = duty_is_dc;
829 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
830 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
831 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
833 = nct6775_read_value(data,
834 data->REG_PWM[j][i]);
838 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
839 (fanmodecfg >> 4) & 7);
841 data->tolerance[i][0] = fanmodecfg & 0x0f;
842 if (data->kind == nct6779) {
843 reg = nct6775_read_value(data,
844 NCT6779_REG_TOLERANCE_H[i]);
845 data->tolerance[i][0] |= (reg & 0x70) >> 1;
847 data->tolerance[i][1] =
848 nct6775_read_value(data,
849 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
851 data->pwm_sel_enable[0][i] =
852 nct6775_read_value(data, data->REG_TEMP_SEL[0][i])
854 data->pwm_sel_enable[1][i] =
855 nct6775_read_value(data, data->REG_TEMP_SEL[1][i])
859 for (j = 0; j < 2; j++) {
860 reg = nct6775_read_value(data,
861 data->REG_TEMP_SEL[j][i]);
862 data->pwm_temp_sel[j][i] = reg & 0x1f;
864 /* Weight temp data */
865 for (j = 0; j < 3; j++) {
866 data->weight_temp[j][i]
867 = nct6775_read_value(data,
868 data->REG_WEIGHT_TEMP[j][i]);
873 static void nct6775_update_pwm_limits(struct device *dev)
875 struct nct6775_data *data = dev_get_drvdata(dev);
879 for (i = 0; i < data->pwm_num; i++) {
880 if (!(data->has_pwm & (1 << i)))
883 for (j = 0; j < 3; j++) {
884 data->fan_time[j][i] =
885 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
888 data->target_temp[i] =
889 nct6775_read_value(data, data->REG_TARGET[i]) &
890 (data->pwm_mode[i] ? 0xff : 0x7f);
892 nct6775_read_value(data, data->REG_TEMP_MON[i]);
894 for (j = 0; j < data->auto_pwm_num; j++) {
895 data->auto_pwm[i][j] =
896 nct6775_read_value(data,
897 NCT6775_AUTO_PWM(data, i, j));
898 data->auto_temp[i][j] =
899 nct6775_read_value(data,
900 NCT6775_AUTO_TEMP(data, i, j));
903 /* critical auto_pwm temperature data */
904 data->auto_temp[i][data->auto_pwm_num] =
905 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
907 switch (data->kind) {
909 reg = nct6775_read_value(data,
910 NCT6775_REG_CRITICAL_ENAB[i]);
911 data->auto_pwm[i][data->auto_pwm_num] =
912 (reg & 0x02) ? 0xff : 0x00;
915 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
918 reg = nct6775_read_value(data,
919 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
921 data->auto_pwm[i][data->auto_pwm_num] =
922 nct6775_read_value(data,
923 NCT6779_REG_CRITICAL_PWM[i]);
925 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
931 static struct nct6775_data *nct6775_update_device(struct device *dev)
933 struct nct6775_data *data = dev_get_drvdata(dev);
936 mutex_lock(&data->update_lock);
938 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
940 /* Fan clock dividers */
941 nct6775_update_fan_div_common(dev, data);
943 /* Measured voltages and limits */
944 for (i = 0; i < data->in_num; i++) {
945 if (!(data->have_in & (1 << i)))
948 data->in[i][0] = nct6775_read_value(data,
950 data->in[i][1] = nct6775_read_value(data,
951 data->REG_IN_MINMAX[0][i]);
952 data->in[i][2] = nct6775_read_value(data,
953 data->REG_IN_MINMAX[1][i]);
956 /* Measured fan speeds and limits */
957 for (i = 0; i < 5; i++) {
960 if (!(data->has_fan & (1 << i)))
963 reg = nct6775_read_value(data, data->REG_FAN[i]);
964 data->rpm[i] = data->fan_from_reg(reg,
967 if (data->has_fan_min & (1 << i))
968 data->fan_min[i] = nct6775_read_value(data,
969 data->REG_FAN_MIN[i]);
972 * If we failed to measure the fan speed and clock
973 * divider can be increased, let's try that for next
976 if (data->has_fan_div && (reg >= 0xff || reg == 0x00)
977 && data->fan_div[i] < 0x07) {
979 "Increasing fan%d clock divider from %u to %u\n",
980 i + 1, div_from_reg(data->fan_div[i]),
981 div_from_reg(data->fan_div[i] + 1));
983 nct6775_write_fan_div_common(dev, data, i);
984 /* Preserve min limit if possible */
985 if ((data->has_fan_min & (1 << i))
986 && data->fan_min[i] >= 2
987 && data->fan_min[i] != 255)
988 nct6775_write_value(data,
989 data->REG_FAN_MIN[i],
990 (data->fan_min[i] /= 2));
994 nct6775_update_pwm(dev);
995 nct6775_update_pwm_limits(dev);
997 /* Measured temperatures and limits */
998 for (i = 0; i < NUM_TEMP; i++) {
999 if (!(data->have_temp & (1 << i)))
1001 for (j = 0; j < 4; j++) {
1002 if (data->reg_temp[j][i])
1004 = nct6775_read_temp(data,
1005 data->reg_temp[j][i]);
1007 if (!(data->have_temp_fixed & (1 << i)))
1009 data->temp_offset[i]
1010 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1014 for (i = 0; i < 6; i++) {
1016 if (!data->REG_ALARM[i])
1018 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1019 data->alarms |= ((u64)alarm) << (i << 3);
1022 data->last_updated = jiffies;
1026 mutex_unlock(&data->update_lock);
1031 * Sysfs callback functions
1034 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1036 struct nct6775_data *data = nct6775_update_device(dev);
1037 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1039 int index = sattr->index;
1040 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1044 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1047 struct nct6775_data *data = dev_get_drvdata(dev);
1048 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1050 int index = sattr->index;
1052 int err = kstrtoul(buf, 10, &val);
1055 mutex_lock(&data->update_lock);
1056 data->in[nr][index] = in_to_reg(val, nr);
1057 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1058 data->in[nr][index]);
1059 mutex_unlock(&data->update_lock);
1064 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1066 struct nct6775_data *data = nct6775_update_device(dev);
1067 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1068 int nr = data->ALARM_BITS[sattr->index];
1069 return sprintf(buf, "%u\n",
1070 (unsigned int)((data->alarms >> nr) & 0x01));
1073 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1074 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1075 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1076 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1077 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1078 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1079 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1080 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1081 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1082 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1083 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1084 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1085 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1086 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1087 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1089 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1090 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1091 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1092 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1093 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1094 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1095 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1096 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1097 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1098 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1099 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1100 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1101 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1102 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1103 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1105 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1106 store_in_reg, 0, 1);
1107 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1108 store_in_reg, 1, 1);
1109 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1110 store_in_reg, 2, 1);
1111 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1112 store_in_reg, 3, 1);
1113 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1114 store_in_reg, 4, 1);
1115 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1116 store_in_reg, 5, 1);
1117 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1118 store_in_reg, 6, 1);
1119 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1120 store_in_reg, 7, 1);
1121 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1122 store_in_reg, 8, 1);
1123 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1124 store_in_reg, 9, 1);
1125 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1126 store_in_reg, 10, 1);
1127 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1128 store_in_reg, 11, 1);
1129 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1130 store_in_reg, 12, 1);
1131 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1132 store_in_reg, 13, 1);
1133 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1134 store_in_reg, 14, 1);
1136 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1137 store_in_reg, 0, 2);
1138 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1139 store_in_reg, 1, 2);
1140 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1141 store_in_reg, 2, 2);
1142 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1143 store_in_reg, 3, 2);
1144 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1145 store_in_reg, 4, 2);
1146 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1147 store_in_reg, 5, 2);
1148 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1149 store_in_reg, 6, 2);
1150 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1151 store_in_reg, 7, 2);
1152 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1153 store_in_reg, 8, 2);
1154 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1155 store_in_reg, 9, 2);
1156 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1157 store_in_reg, 10, 2);
1158 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1159 store_in_reg, 11, 2);
1160 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1161 store_in_reg, 12, 2);
1162 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1163 store_in_reg, 13, 2);
1164 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1165 store_in_reg, 14, 2);
1167 static struct attribute *nct6775_attributes_in[15][5] = {
1169 &sensor_dev_attr_in0_input.dev_attr.attr,
1170 &sensor_dev_attr_in0_min.dev_attr.attr,
1171 &sensor_dev_attr_in0_max.dev_attr.attr,
1172 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1176 &sensor_dev_attr_in1_input.dev_attr.attr,
1177 &sensor_dev_attr_in1_min.dev_attr.attr,
1178 &sensor_dev_attr_in1_max.dev_attr.attr,
1179 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1183 &sensor_dev_attr_in2_input.dev_attr.attr,
1184 &sensor_dev_attr_in2_min.dev_attr.attr,
1185 &sensor_dev_attr_in2_max.dev_attr.attr,
1186 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1190 &sensor_dev_attr_in3_input.dev_attr.attr,
1191 &sensor_dev_attr_in3_min.dev_attr.attr,
1192 &sensor_dev_attr_in3_max.dev_attr.attr,
1193 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1197 &sensor_dev_attr_in4_input.dev_attr.attr,
1198 &sensor_dev_attr_in4_min.dev_attr.attr,
1199 &sensor_dev_attr_in4_max.dev_attr.attr,
1200 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1204 &sensor_dev_attr_in5_input.dev_attr.attr,
1205 &sensor_dev_attr_in5_min.dev_attr.attr,
1206 &sensor_dev_attr_in5_max.dev_attr.attr,
1207 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1211 &sensor_dev_attr_in6_input.dev_attr.attr,
1212 &sensor_dev_attr_in6_min.dev_attr.attr,
1213 &sensor_dev_attr_in6_max.dev_attr.attr,
1214 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1218 &sensor_dev_attr_in7_input.dev_attr.attr,
1219 &sensor_dev_attr_in7_min.dev_attr.attr,
1220 &sensor_dev_attr_in7_max.dev_attr.attr,
1221 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1225 &sensor_dev_attr_in8_input.dev_attr.attr,
1226 &sensor_dev_attr_in8_min.dev_attr.attr,
1227 &sensor_dev_attr_in8_max.dev_attr.attr,
1228 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1232 &sensor_dev_attr_in9_input.dev_attr.attr,
1233 &sensor_dev_attr_in9_min.dev_attr.attr,
1234 &sensor_dev_attr_in9_max.dev_attr.attr,
1235 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1239 &sensor_dev_attr_in10_input.dev_attr.attr,
1240 &sensor_dev_attr_in10_min.dev_attr.attr,
1241 &sensor_dev_attr_in10_max.dev_attr.attr,
1242 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1246 &sensor_dev_attr_in11_input.dev_attr.attr,
1247 &sensor_dev_attr_in11_min.dev_attr.attr,
1248 &sensor_dev_attr_in11_max.dev_attr.attr,
1249 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1253 &sensor_dev_attr_in12_input.dev_attr.attr,
1254 &sensor_dev_attr_in12_min.dev_attr.attr,
1255 &sensor_dev_attr_in12_max.dev_attr.attr,
1256 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1260 &sensor_dev_attr_in13_input.dev_attr.attr,
1261 &sensor_dev_attr_in13_min.dev_attr.attr,
1262 &sensor_dev_attr_in13_max.dev_attr.attr,
1263 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1267 &sensor_dev_attr_in14_input.dev_attr.attr,
1268 &sensor_dev_attr_in14_min.dev_attr.attr,
1269 &sensor_dev_attr_in14_max.dev_attr.attr,
1270 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1275 static const struct attribute_group nct6775_group_in[15] = {
1276 { .attrs = nct6775_attributes_in[0] },
1277 { .attrs = nct6775_attributes_in[1] },
1278 { .attrs = nct6775_attributes_in[2] },
1279 { .attrs = nct6775_attributes_in[3] },
1280 { .attrs = nct6775_attributes_in[4] },
1281 { .attrs = nct6775_attributes_in[5] },
1282 { .attrs = nct6775_attributes_in[6] },
1283 { .attrs = nct6775_attributes_in[7] },
1284 { .attrs = nct6775_attributes_in[8] },
1285 { .attrs = nct6775_attributes_in[9] },
1286 { .attrs = nct6775_attributes_in[10] },
1287 { .attrs = nct6775_attributes_in[11] },
1288 { .attrs = nct6775_attributes_in[12] },
1289 { .attrs = nct6775_attributes_in[13] },
1290 { .attrs = nct6775_attributes_in[14] },
1294 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1296 struct nct6775_data *data = nct6775_update_device(dev);
1297 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1298 int nr = sattr->index;
1299 return sprintf(buf, "%d\n", data->rpm[nr]);
1303 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1305 struct nct6775_data *data = nct6775_update_device(dev);
1306 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1307 int nr = sattr->index;
1308 return sprintf(buf, "%d\n",
1309 data->fan_from_reg_min(data->fan_min[nr],
1310 data->fan_div[nr]));
1314 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1316 struct nct6775_data *data = nct6775_update_device(dev);
1317 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1318 int nr = sattr->index;
1319 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1323 store_fan_min(struct device *dev, struct device_attribute *attr,
1324 const char *buf, size_t count)
1326 struct nct6775_data *data = dev_get_drvdata(dev);
1327 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1328 int nr = sattr->index;
1334 err = kstrtoul(buf, 10, &val);
1338 mutex_lock(&data->update_lock);
1339 if (!data->has_fan_div) {
1340 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1346 val = 1350000U / val;
1347 val = (val & 0x1f) | ((val << 3) & 0xff00);
1349 data->fan_min[nr] = val;
1350 goto write_min; /* Leave fan divider alone */
1353 /* No min limit, alarm disabled */
1354 data->fan_min[nr] = 255;
1355 new_div = data->fan_div[nr]; /* No change */
1356 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1359 reg = 1350000U / val;
1360 if (reg >= 128 * 255) {
1362 * Speed below this value cannot possibly be represented,
1363 * even with the highest divider (128)
1365 data->fan_min[nr] = 254;
1366 new_div = 7; /* 128 == (1 << 7) */
1368 "fan%u low limit %lu below minimum %u, set to minimum\n",
1369 nr + 1, val, data->fan_from_reg_min(254, 7));
1372 * Speed above this value cannot possibly be represented,
1373 * even with the lowest divider (1)
1375 data->fan_min[nr] = 1;
1376 new_div = 0; /* 1 == (1 << 0) */
1378 "fan%u low limit %lu above maximum %u, set to maximum\n",
1379 nr + 1, val, data->fan_from_reg_min(1, 0));
1382 * Automatically pick the best divider, i.e. the one such
1383 * that the min limit will correspond to a register value
1384 * in the 96..192 range
1387 while (reg > 192 && new_div < 7) {
1391 data->fan_min[nr] = reg;
1396 * Write both the fan clock divider (if it changed) and the new
1397 * fan min (unconditionally)
1399 if (new_div != data->fan_div[nr]) {
1400 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1401 nr + 1, div_from_reg(data->fan_div[nr]),
1402 div_from_reg(new_div));
1403 data->fan_div[nr] = new_div;
1404 nct6775_write_fan_div_common(dev, data, nr);
1405 /* Give the chip time to sample a new speed value */
1406 data->last_updated = jiffies;
1410 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1411 mutex_unlock(&data->update_lock);
1416 static struct sensor_device_attribute sda_fan_input[] = {
1417 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1418 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1419 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1420 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1421 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1424 static struct sensor_device_attribute sda_fan_alarm[] = {
1425 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1426 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1427 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1428 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1429 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1432 static struct sensor_device_attribute sda_fan_min[] = {
1433 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1435 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1437 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1439 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1441 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1445 static struct sensor_device_attribute sda_fan_div[] = {
1446 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1447 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1448 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1449 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1450 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1454 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1456 struct nct6775_data *data = nct6775_update_device(dev);
1457 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1458 int nr = sattr->index;
1459 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1463 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1465 struct nct6775_data *data = nct6775_update_device(dev);
1466 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1468 int index = sattr->index;
1470 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1474 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1477 struct nct6775_data *data = dev_get_drvdata(dev);
1478 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1480 int index = sattr->index;
1484 err = kstrtol(buf, 10, &val);
1488 mutex_lock(&data->update_lock);
1489 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1490 nct6775_write_temp(data, data->reg_temp[index][nr],
1491 data->temp[index][nr]);
1492 mutex_unlock(&data->update_lock);
1497 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1499 struct nct6775_data *data = nct6775_update_device(dev);
1500 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1502 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1506 store_temp_offset(struct device *dev, struct device_attribute *attr,
1507 const char *buf, size_t count)
1509 struct nct6775_data *data = dev_get_drvdata(dev);
1510 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1511 int nr = sattr->index;
1515 err = kstrtol(buf, 10, &val);
1519 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1521 mutex_lock(&data->update_lock);
1522 data->temp_offset[nr] = val;
1523 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1524 mutex_unlock(&data->update_lock);
1530 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1532 struct nct6775_data *data = nct6775_update_device(dev);
1533 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1534 int nr = sattr->index;
1535 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1539 store_temp_type(struct device *dev, struct device_attribute *attr,
1540 const char *buf, size_t count)
1542 struct nct6775_data *data = nct6775_update_device(dev);
1543 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1544 int nr = sattr->index;
1547 u8 vbat, diode, bit;
1549 err = kstrtoul(buf, 10, &val);
1553 if (val != 1 && val != 3 && val != 4)
1556 mutex_lock(&data->update_lock);
1558 data->temp_type[nr] = val;
1559 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1560 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1563 case 1: /* CPU diode (diode, current mode) */
1567 case 3: /* diode, voltage mode */
1570 case 4: /* thermistor */
1573 nct6775_write_value(data, data->REG_VBAT, vbat);
1574 nct6775_write_value(data, data->REG_DIODE, diode);
1576 mutex_unlock(&data->update_lock);
1580 static struct sensor_device_attribute_2 sda_temp_input[] = {
1581 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1582 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1583 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1584 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1585 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1586 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1587 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1588 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1589 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1590 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1593 static struct sensor_device_attribute sda_temp_label[] = {
1594 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1595 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1596 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1597 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1598 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1599 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1600 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1601 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1602 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1603 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1606 static struct sensor_device_attribute_2 sda_temp_max[] = {
1607 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1609 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1611 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1613 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1615 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1617 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1619 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1621 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1623 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1625 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1629 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1630 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1632 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1634 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1636 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1638 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1640 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1642 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1644 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1646 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1648 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1652 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1653 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1655 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1657 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1659 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1661 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1663 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1665 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1667 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1669 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1671 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1675 static struct sensor_device_attribute sda_temp_offset[] = {
1676 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1677 store_temp_offset, 0),
1678 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1679 store_temp_offset, 1),
1680 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1681 store_temp_offset, 2),
1682 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1683 store_temp_offset, 3),
1684 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1685 store_temp_offset, 4),
1686 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1687 store_temp_offset, 5),
1690 static struct sensor_device_attribute sda_temp_type[] = {
1691 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1692 store_temp_type, 0),
1693 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1694 store_temp_type, 1),
1695 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1696 store_temp_type, 2),
1697 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1698 store_temp_type, 3),
1699 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1700 store_temp_type, 4),
1701 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1702 store_temp_type, 5),
1705 static struct sensor_device_attribute sda_temp_alarm[] = {
1706 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1708 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1709 TEMP_ALARM_BASE + 1),
1710 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1711 TEMP_ALARM_BASE + 2),
1712 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1713 TEMP_ALARM_BASE + 3),
1714 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1715 TEMP_ALARM_BASE + 4),
1716 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1717 TEMP_ALARM_BASE + 5),
1720 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1723 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1725 struct nct6775_data *data = nct6775_update_device(dev);
1726 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1728 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1732 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1733 const char *buf, size_t count)
1735 struct nct6775_data *data = dev_get_drvdata(dev);
1736 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1737 int nr = sattr->index;
1742 err = kstrtoul(buf, 10, &val);
1749 /* Setting DC mode is not supported for all chips/channels */
1750 if (data->REG_PWM_MODE[nr] == 0) {
1756 mutex_lock(&data->update_lock);
1757 data->pwm_mode[nr] = val;
1758 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1759 reg &= ~data->PWM_MODE_MASK[nr];
1761 reg |= data->PWM_MODE_MASK[nr];
1762 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1763 mutex_unlock(&data->update_lock);
1768 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1770 struct nct6775_data *data = nct6775_update_device(dev);
1771 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1773 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
1777 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1779 struct nct6775_data *data = nct6775_update_device(dev);
1780 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1782 int index = sattr->index;
1786 * For automatic fan control modes, show current pwm readings.
1787 * Otherwise, show the configured value.
1789 if (index == 0 && data->pwm_enable[nr] > 1)
1790 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1792 pwm = data->pwm[index][nr];
1794 return sprintf(buf, "%d\n", pwm);
1798 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1801 struct nct6775_data *data = dev_get_drvdata(dev);
1802 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1804 int index = sattr->index;
1806 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1808 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1811 err = kstrtoul(buf, 10, &val);
1814 val = SENSORS_LIMIT(val, minval[index], maxval[index]);
1816 mutex_lock(&data->update_lock);
1817 data->pwm[index][nr] = val;
1818 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1819 mutex_unlock(&data->update_lock);
1823 /* Returns 0 if OK, -EINVAL otherwise */
1824 static int check_trip_points(struct nct6775_data *data, int nr)
1828 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1829 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1832 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1833 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1836 /* validate critical temperature and pwm if enabled (pwm > 0) */
1837 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1838 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1839 data->auto_temp[nr][data->auto_pwm_num] ||
1840 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1841 data->auto_pwm[nr][data->auto_pwm_num])
1848 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1849 const char *buf, size_t count)
1851 struct nct6775_data *data = dev_get_drvdata(dev);
1852 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1853 int nr = sattr->index;
1858 err = kstrtoul(buf, 10, &val);
1865 if (val == 4 && data->kind != nct6775)
1868 if (val == 5 && check_trip_points(data, nr)) {
1869 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1870 dev_err(dev, "Adjust trip points and try again\n");
1874 mutex_lock(&data->update_lock);
1875 data->pwm_enable[nr] = val;
1878 * turn off pwm control: select manual mode, set pwm to maximum
1880 data->pwm[0][nr] = 255;
1881 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1883 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1885 reg |= pwm_enable_to_reg(val) << 4;
1886 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1887 mutex_unlock(&data->update_lock);
1892 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
1894 struct nct6775_data *data = nct6775_update_device(dev);
1895 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1896 int i, src, sel = 0;
1898 src = data->pwm_temp_sel[sattr->index][sattr->nr];
1900 for (i = 0; i < NUM_TEMP; i++) {
1901 if (!(data->have_temp & (1 << i)))
1903 if (src == data->temp_src[i]) {
1909 return sprintf(buf, "%d\n", sel);
1913 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
1914 const char *buf, size_t count)
1916 struct nct6775_data *data = nct6775_update_device(dev);
1917 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1919 int index = sattr->index;
1923 err = kstrtoul(buf, 10, &val);
1926 if (val == 0 || val > NUM_TEMP)
1928 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
1931 mutex_lock(&data->update_lock);
1932 src = data->temp_src[val - 1];
1933 data->pwm_temp_sel[index][nr] = src;
1934 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
1937 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
1938 mutex_unlock(&data->update_lock);
1944 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
1946 struct nct6775_data *data = nct6775_update_device(dev);
1947 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1949 return sprintf(buf, "%d\n",
1950 data->target_temp[sattr->index] * 1000);
1954 store_target_temp(struct device *dev, struct device_attribute *attr,
1955 const char *buf, size_t count)
1957 struct nct6775_data *data = dev_get_drvdata(dev);
1958 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1959 int nr = sattr->index;
1963 err = kstrtol(buf, 10, &val);
1967 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1969 mutex_lock(&data->update_lock);
1970 data->target_temp[nr] = val;
1971 nct6775_write_value(data, data->REG_TARGET[nr], val);
1972 mutex_unlock(&data->update_lock);
1977 show_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1980 struct nct6775_data *data = nct6775_update_device(dev);
1981 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1983 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1984 int tolerance = data->tolerance[nr][point];
1985 int temp = data->auto_temp[nr][sattr->index];
1987 return sprintf(buf, "%d\n", (temp - tolerance) * 1000);
1991 store_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1992 const char *buf, size_t count)
1994 struct nct6775_data *data = dev_get_drvdata(dev);
1995 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1997 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
2001 int maxlimit[2][3] = { { 15, 7, 63 }, { 15, 7, 7 } };
2002 int mask[] = { 0x0f, 0x07, 0x07 };
2005 err = kstrtol(buf, 10, &val);
2009 temp = data->auto_temp[nr][sattr->index];
2010 val = temp - DIV_ROUND_CLOSEST(val, 1000);
2012 /* Limit tolerance as needed */
2013 val = SENSORS_LIMIT(val, 0, maxlimit[point][data->kind]);
2015 mutex_lock(&data->update_lock);
2017 nct6775_write_value(data,
2018 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2021 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2022 reg = (reg & ~mask[nr]) | (val & mask[nr]);
2023 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2024 if (data->kind == nct6779) {
2025 reg = nct6775_read_value(data,
2026 NCT6779_REG_TOLERANCE_H[nr]);
2027 reg = (reg & 0x70) | ((val & 0x38) << 1);
2028 nct6775_write_value(data,
2029 NCT6779_REG_TOLERANCE_H[nr], reg);
2033 data->tolerance[nr][point] = val;
2034 mutex_unlock(&data->update_lock);
2038 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2039 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2040 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2041 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2042 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2044 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2046 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2048 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2050 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2052 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2055 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2056 store_pwm_enable, 0);
2057 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2058 store_pwm_enable, 1);
2059 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2060 store_pwm_enable, 2);
2061 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2062 store_pwm_enable, 3);
2063 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2064 store_pwm_enable, 4);
2066 static SENSOR_DEVICE_ATTR_2(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2067 show_pwm_temp_sel, store_pwm_temp_sel, 0, 0);
2068 static SENSOR_DEVICE_ATTR_2(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2069 show_pwm_temp_sel, store_pwm_temp_sel, 1, 0);
2070 static SENSOR_DEVICE_ATTR_2(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2071 show_pwm_temp_sel, store_pwm_temp_sel, 2, 0);
2072 static SENSOR_DEVICE_ATTR_2(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2073 show_pwm_temp_sel, store_pwm_temp_sel, 3, 0);
2074 static SENSOR_DEVICE_ATTR_2(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2075 show_pwm_temp_sel, store_pwm_temp_sel, 4, 0);
2077 static SENSOR_DEVICE_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
2078 store_target_temp, 0);
2079 static SENSOR_DEVICE_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
2080 store_target_temp, 1);
2081 static SENSOR_DEVICE_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
2082 store_target_temp, 2);
2083 static SENSOR_DEVICE_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
2084 store_target_temp, 3);
2085 static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
2086 store_target_temp, 4);
2088 /* Smart Fan registers */
2091 show_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2094 struct nct6775_data *data = nct6775_update_device(dev);
2095 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2097 return sprintf(buf, "%d\n",
2098 data->pwm_sel_enable[sattr->index][sattr->nr]);
2102 store_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2103 const char *buf, size_t count)
2105 struct nct6775_data *data = dev_get_drvdata(dev);
2106 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2108 int index = sattr->index;
2113 err = kstrtoul(buf, 10, &val);
2120 mutex_lock(&data->update_lock);
2121 data->pwm_sel_enable[index][nr] = val;
2122 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
2126 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
2127 mutex_unlock(&data->update_lock);
2132 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2134 struct nct6775_data *data = nct6775_update_device(dev);
2135 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2137 int index = sattr->index;
2139 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2143 store_weight_temp(struct device *dev, struct device_attribute *attr,
2144 const char *buf, size_t count)
2146 struct nct6775_data *data = dev_get_drvdata(dev);
2147 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2149 int index = sattr->index;
2153 err = kstrtoul(buf, 10, &val);
2157 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2159 mutex_lock(&data->update_lock);
2160 data->weight_temp[index][nr] = val;
2161 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2162 mutex_unlock(&data->update_lock);
2166 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output_enable, S_IWUSR | S_IRUGO,
2167 show_pwm_sel_enable, store_pwm_sel_enable, 0, 0);
2168 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output_enable, S_IWUSR | S_IRUGO,
2169 show_pwm_sel_enable, store_pwm_sel_enable, 1, 0);
2170 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output_enable, S_IWUSR | S_IRUGO,
2171 show_pwm_sel_enable, store_pwm_sel_enable, 2, 0);
2172 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output_enable, S_IWUSR | S_IRUGO,
2173 show_pwm_sel_enable, store_pwm_sel_enable, 3, 0);
2174 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output_enable, S_IWUSR | S_IRUGO,
2175 show_pwm_sel_enable, store_pwm_sel_enable, 4, 0);
2177 static SENSOR_DEVICE_ATTR_2(pwm1_weight_enable, S_IWUSR | S_IRUGO,
2178 show_pwm_sel_enable, store_pwm_sel_enable, 0, 1);
2179 static SENSOR_DEVICE_ATTR_2(pwm2_weight_enable, S_IWUSR | S_IRUGO,
2180 show_pwm_sel_enable, store_pwm_sel_enable, 1, 1);
2181 static SENSOR_DEVICE_ATTR_2(pwm3_weight_enable, S_IWUSR | S_IRUGO,
2182 show_pwm_sel_enable, store_pwm_sel_enable, 2, 1);
2183 static SENSOR_DEVICE_ATTR_2(pwm4_weight_enable, S_IWUSR | S_IRUGO,
2184 show_pwm_sel_enable, store_pwm_sel_enable, 3, 1);
2185 static SENSOR_DEVICE_ATTR_2(pwm5_weight_enable, S_IWUSR | S_IRUGO,
2186 show_pwm_sel_enable, store_pwm_sel_enable, 4, 1);
2188 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2189 show_pwm_temp_sel, store_pwm_temp_sel, 0, 1);
2190 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2191 show_pwm_temp_sel, store_pwm_temp_sel, 1, 1);
2192 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2193 show_pwm_temp_sel, store_pwm_temp_sel, 2, 1);
2194 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2195 show_pwm_temp_sel, store_pwm_temp_sel, 3, 1);
2196 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2197 show_pwm_temp_sel, store_pwm_temp_sel, 4, 1);
2199 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2200 show_weight_temp, store_weight_temp, 0, 0);
2201 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2202 show_weight_temp, store_weight_temp, 1, 0);
2203 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2204 show_weight_temp, store_weight_temp, 2, 0);
2205 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2206 show_weight_temp, store_weight_temp, 3, 0);
2207 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2208 show_weight_temp, store_weight_temp, 4, 0);
2210 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2211 show_weight_temp, store_weight_temp, 0, 1);
2212 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2213 show_weight_temp, store_weight_temp, 1, 1);
2214 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2215 show_weight_temp, store_weight_temp, 2, 1);
2216 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2217 show_weight_temp, store_weight_temp, 3, 1);
2218 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2219 show_weight_temp, store_weight_temp, 4, 1);
2221 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2222 show_weight_temp, store_weight_temp, 0, 2);
2223 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2224 show_weight_temp, store_weight_temp, 1, 2);
2225 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2226 show_weight_temp, store_weight_temp, 2, 2);
2227 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2228 show_weight_temp, store_weight_temp, 3, 2);
2229 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2230 show_weight_temp, store_weight_temp, 4, 2);
2232 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2233 show_pwm, store_pwm, 0, 5);
2234 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2235 show_pwm, store_pwm, 1, 5);
2236 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2237 show_pwm, store_pwm, 2, 5);
2238 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2239 show_pwm, store_pwm, 3, 5);
2240 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2241 show_pwm, store_pwm, 4, 5);
2243 /* duty_base is not supported on all chips */
2244 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2245 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2246 show_pwm, store_pwm, 0, 6),
2247 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2248 show_pwm, store_pwm, 1, 6),
2249 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2250 show_pwm, store_pwm, 2, 6),
2251 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2252 show_pwm, store_pwm, 3, 6),
2253 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2254 show_pwm, store_pwm, 4, 6),
2258 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2260 struct nct6775_data *data = nct6775_update_device(dev);
2261 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2263 int index = sattr->index;
2265 return sprintf(buf, "%d\n",
2266 step_time_from_reg(data->fan_time[index][nr],
2267 data->pwm_mode[nr]));
2271 store_fan_time(struct device *dev, struct device_attribute *attr,
2272 const char *buf, size_t count)
2274 struct nct6775_data *data = dev_get_drvdata(dev);
2275 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2277 int index = sattr->index;
2281 err = kstrtoul(buf, 10, &val);
2285 val = step_time_to_reg(val, data->pwm_mode[nr]);
2286 mutex_lock(&data->update_lock);
2287 data->fan_time[index][nr] = val;
2288 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2289 mutex_unlock(&data->update_lock);
2294 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2296 struct nct6775_data *data = dev_get_drvdata(dev);
2298 return sprintf(buf, "%s\n", data->name);
2301 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2303 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2304 store_fan_time, 0, 0);
2305 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2306 store_fan_time, 1, 0);
2307 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2308 store_fan_time, 2, 0);
2309 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2310 store_fan_time, 3, 0);
2311 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2312 store_fan_time, 4, 0);
2314 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2315 store_fan_time, 0, 1);
2316 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2317 store_fan_time, 1, 1);
2318 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2319 store_fan_time, 2, 1);
2320 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2321 store_fan_time, 3, 1);
2322 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2323 store_fan_time, 4, 1);
2325 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2326 show_fan_time, store_fan_time, 0, 2);
2327 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2328 show_fan_time, store_fan_time, 1, 2);
2329 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2330 show_fan_time, store_fan_time, 2, 2);
2331 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2332 show_fan_time, store_fan_time, 3, 2);
2333 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2334 show_fan_time, store_fan_time, 4, 2);
2336 static SENSOR_DEVICE_ATTR_2(pwm1_start_output, S_IWUSR | S_IRUGO, show_pwm,
2338 static SENSOR_DEVICE_ATTR_2(pwm2_start_output, S_IWUSR | S_IRUGO, show_pwm,
2340 static SENSOR_DEVICE_ATTR_2(pwm3_start_output, S_IWUSR | S_IRUGO, show_pwm,
2342 static SENSOR_DEVICE_ATTR_2(pwm4_start_output, S_IWUSR | S_IRUGO, show_pwm,
2344 static SENSOR_DEVICE_ATTR_2(pwm5_start_output, S_IWUSR | S_IRUGO, show_pwm,
2347 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2349 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2351 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2353 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2355 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2358 /* max_output is not supported on all chips */
2359 static struct sensor_device_attribute_2 sda_max_output[] = {
2360 SENSOR_ATTR_2(pwm1_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2362 SENSOR_ATTR_2(pwm2_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2364 SENSOR_ATTR_2(pwm3_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2366 SENSOR_ATTR_2(pwm4_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2368 SENSOR_ATTR_2(pwm5_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2372 /* step_output is not supported on all chips */
2373 static struct sensor_device_attribute_2 sda_step_output[] = {
2374 SENSOR_ATTR_2(pwm1_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2376 SENSOR_ATTR_2(pwm2_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2378 SENSOR_ATTR_2(pwm3_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2380 SENSOR_ATTR_2(pwm4_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2382 SENSOR_ATTR_2(pwm5_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2386 static struct attribute *nct6775_attributes_pwm[5][19] = {
2388 &sensor_dev_attr_pwm1.dev_attr.attr,
2389 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2390 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2391 &sensor_dev_attr_pwm1_stop_output_enable.dev_attr.attr,
2392 &sensor_dev_attr_pwm1_weight_enable.dev_attr.attr,
2393 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2394 &sensor_dev_attr_pwm1_target.dev_attr.attr,
2395 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2396 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2397 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2398 &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
2399 &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
2400 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2401 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2402 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2403 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2404 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2408 &sensor_dev_attr_pwm2.dev_attr.attr,
2409 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2410 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2411 &sensor_dev_attr_pwm2_stop_output_enable.dev_attr.attr,
2412 &sensor_dev_attr_pwm2_weight_enable.dev_attr.attr,
2413 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2414 &sensor_dev_attr_pwm2_target.dev_attr.attr,
2415 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2416 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2417 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2418 &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
2419 &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
2420 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2421 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2422 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2423 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2424 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2428 &sensor_dev_attr_pwm3.dev_attr.attr,
2429 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2430 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2431 &sensor_dev_attr_pwm3_stop_output_enable.dev_attr.attr,
2432 &sensor_dev_attr_pwm3_weight_enable.dev_attr.attr,
2433 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2434 &sensor_dev_attr_pwm3_target.dev_attr.attr,
2435 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2436 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2437 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2438 &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
2439 &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
2440 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2441 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2442 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2443 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2444 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2448 &sensor_dev_attr_pwm4.dev_attr.attr,
2449 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2450 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2451 &sensor_dev_attr_pwm4_stop_output_enable.dev_attr.attr,
2452 &sensor_dev_attr_pwm4_weight_enable.dev_attr.attr,
2453 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2454 &sensor_dev_attr_pwm4_target.dev_attr.attr,
2455 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2456 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2457 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2458 &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
2459 &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
2460 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2461 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2462 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2463 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2464 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2468 &sensor_dev_attr_pwm5.dev_attr.attr,
2469 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2470 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2471 &sensor_dev_attr_pwm5_stop_output_enable.dev_attr.attr,
2472 &sensor_dev_attr_pwm5_weight_enable.dev_attr.attr,
2473 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2474 &sensor_dev_attr_pwm5_target.dev_attr.attr,
2475 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2476 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2477 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2478 &sensor_dev_attr_pwm5_start_output.dev_attr.attr,
2479 &sensor_dev_attr_pwm5_stop_output.dev_attr.attr,
2480 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2481 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2482 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2483 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2484 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2489 static const struct attribute_group nct6775_group_pwm[5] = {
2490 { .attrs = nct6775_attributes_pwm[0] },
2491 { .attrs = nct6775_attributes_pwm[1] },
2492 { .attrs = nct6775_attributes_pwm[2] },
2493 { .attrs = nct6775_attributes_pwm[3] },
2494 { .attrs = nct6775_attributes_pwm[4] },
2498 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2500 struct nct6775_data *data = nct6775_update_device(dev);
2501 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2503 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2507 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2508 const char *buf, size_t count)
2510 struct nct6775_data *data = dev_get_drvdata(dev);
2511 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2513 int point = sattr->index;
2518 err = kstrtoul(buf, 10, &val);
2524 if (point == data->auto_pwm_num) {
2525 if (data->kind != nct6775 && !val)
2527 if (data->kind != nct6779 && val)
2531 mutex_lock(&data->update_lock);
2532 data->auto_pwm[nr][point] = val;
2533 if (point < data->auto_pwm_num) {
2534 nct6775_write_value(data,
2535 NCT6775_AUTO_PWM(data, nr, point),
2536 data->auto_pwm[nr][point]);
2538 switch (data->kind) {
2540 /* disable if needed (pwm == 0) */
2541 reg = nct6775_read_value(data,
2542 NCT6775_REG_CRITICAL_ENAB[nr]);
2547 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2551 break; /* always enabled, nothing to do */
2553 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2555 reg = nct6775_read_value(data,
2556 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2561 nct6775_write_value(data,
2562 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2567 mutex_unlock(&data->update_lock);
2572 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2574 struct nct6775_data *data = nct6775_update_device(dev);
2575 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2577 int point = sattr->index;
2580 * We don't know for sure if the temperature is signed or unsigned.
2581 * Assume it is unsigned.
2583 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2587 store_auto_temp(struct device *dev, struct device_attribute *attr,
2588 const char *buf, size_t count)
2590 struct nct6775_data *data = dev_get_drvdata(dev);
2591 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2593 int point = sattr->index;
2597 err = kstrtoul(buf, 10, &val);
2603 mutex_lock(&data->update_lock);
2604 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2605 if (point < data->auto_pwm_num) {
2606 nct6775_write_value(data,
2607 NCT6775_AUTO_TEMP(data, nr, point),
2608 data->auto_temp[nr][point]);
2610 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2611 data->auto_temp[nr][point]);
2613 mutex_unlock(&data->update_lock);
2618 * The number of auto-point trip points is chip dependent.
2619 * Need to check support while generating/removing attribute files.
2621 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2622 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2623 show_auto_pwm, store_auto_pwm, 0, 0),
2624 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2625 show_auto_temp, store_auto_temp, 0, 0),
2626 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2627 show_auto_temp_hyst, store_auto_temp_hyst, 0, 0),
2628 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2629 show_auto_pwm, store_auto_pwm, 0, 1),
2630 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2631 show_auto_temp, store_auto_temp, 0, 1),
2632 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2633 show_auto_temp_hyst, store_auto_temp_hyst, 0, 1),
2634 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2635 show_auto_pwm, store_auto_pwm, 0, 2),
2636 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2637 show_auto_temp, store_auto_temp, 0, 2),
2638 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2639 show_auto_temp_hyst, store_auto_temp_hyst, 0, 2),
2640 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2641 show_auto_pwm, store_auto_pwm, 0, 3),
2642 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2643 show_auto_temp, store_auto_temp, 0, 3),
2644 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2645 show_auto_temp_hyst, store_auto_temp_hyst, 0, 3),
2646 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2647 show_auto_pwm, store_auto_pwm, 0, 4),
2648 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2649 show_auto_temp, store_auto_temp, 0, 4),
2650 SENSOR_ATTR_2(pwm1_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2651 show_auto_temp_hyst, store_auto_temp_hyst, 0, 4),
2652 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2653 show_auto_pwm, store_auto_pwm, 0, 5),
2654 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2655 show_auto_temp, store_auto_temp, 0, 5),
2656 SENSOR_ATTR_2(pwm1_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2657 show_auto_temp_hyst, store_auto_temp_hyst, 0, 5),
2658 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2659 show_auto_pwm, store_auto_pwm, 0, 6),
2660 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2661 show_auto_temp, store_auto_temp, 0, 6),
2662 SENSOR_ATTR_2(pwm1_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2663 show_auto_temp_hyst, store_auto_temp_hyst, 0, 6),
2665 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2666 show_auto_pwm, store_auto_pwm, 1, 0),
2667 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
2668 show_auto_temp, store_auto_temp, 1, 0),
2669 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2670 show_auto_temp_hyst, store_auto_temp_hyst, 1, 0),
2671 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
2672 show_auto_pwm, store_auto_pwm, 1, 1),
2673 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
2674 show_auto_temp, store_auto_temp, 1, 1),
2675 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2676 show_auto_temp_hyst, store_auto_temp_hyst, 1, 1),
2677 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
2678 show_auto_pwm, store_auto_pwm, 1, 2),
2679 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
2680 show_auto_temp, store_auto_temp, 1, 2),
2681 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2682 show_auto_temp_hyst, store_auto_temp_hyst, 1, 2),
2683 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
2684 show_auto_pwm, store_auto_pwm, 1, 3),
2685 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
2686 show_auto_temp, store_auto_temp, 1, 3),
2687 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2688 show_auto_temp_hyst, store_auto_temp_hyst, 1, 3),
2689 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
2690 show_auto_pwm, store_auto_pwm, 1, 4),
2691 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
2692 show_auto_temp, store_auto_temp, 1, 4),
2693 SENSOR_ATTR_2(pwm2_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2694 show_auto_temp_hyst, store_auto_temp_hyst, 1, 4),
2695 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
2696 show_auto_pwm, store_auto_pwm, 1, 5),
2697 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
2698 show_auto_temp, store_auto_temp, 1, 5),
2699 SENSOR_ATTR_2(pwm2_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2700 show_auto_temp_hyst, store_auto_temp_hyst, 1, 5),
2701 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
2702 show_auto_pwm, store_auto_pwm, 1, 6),
2703 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
2704 show_auto_temp, store_auto_temp, 1, 6),
2705 SENSOR_ATTR_2(pwm2_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2706 show_auto_temp_hyst, store_auto_temp_hyst, 1, 6),
2708 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
2709 show_auto_pwm, store_auto_pwm, 2, 0),
2710 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
2711 show_auto_temp, store_auto_temp, 2, 0),
2712 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2713 show_auto_temp_hyst, store_auto_temp_hyst, 2, 0),
2714 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
2715 show_auto_pwm, store_auto_pwm, 2, 1),
2716 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
2717 show_auto_temp, store_auto_temp, 2, 1),
2718 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2719 show_auto_temp_hyst, store_auto_temp_hyst, 2, 1),
2720 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
2721 show_auto_pwm, store_auto_pwm, 2, 2),
2722 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
2723 show_auto_temp, store_auto_temp, 2, 2),
2724 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2725 show_auto_temp_hyst, store_auto_temp_hyst, 2, 2),
2726 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
2727 show_auto_pwm, store_auto_pwm, 2, 3),
2728 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
2729 show_auto_temp, store_auto_temp, 2, 3),
2730 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2731 show_auto_temp_hyst, store_auto_temp_hyst, 2, 3),
2732 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
2733 show_auto_pwm, store_auto_pwm, 2, 4),
2734 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
2735 show_auto_temp, store_auto_temp, 2, 4),
2736 SENSOR_ATTR_2(pwm3_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2737 show_auto_temp_hyst, store_auto_temp_hyst, 2, 4),
2738 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
2739 show_auto_pwm, store_auto_pwm, 2, 5),
2740 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
2741 show_auto_temp, store_auto_temp, 2, 5),
2742 SENSOR_ATTR_2(pwm3_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2743 show_auto_temp_hyst, store_auto_temp_hyst, 2, 5),
2744 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
2745 show_auto_pwm, store_auto_pwm, 2, 6),
2746 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
2747 show_auto_temp, store_auto_temp, 2, 6),
2748 SENSOR_ATTR_2(pwm3_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2749 show_auto_temp_hyst, store_auto_temp_hyst, 2, 6),
2751 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
2752 show_auto_pwm, store_auto_pwm, 3, 0),
2753 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
2754 show_auto_temp, store_auto_temp, 3, 0),
2755 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2756 show_auto_temp_hyst, store_auto_temp_hyst, 3, 0),
2757 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
2758 show_auto_pwm, store_auto_pwm, 3, 1),
2759 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
2760 show_auto_temp, store_auto_temp, 3, 1),
2761 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2762 show_auto_temp_hyst, store_auto_temp_hyst, 3, 1),
2763 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
2764 show_auto_pwm, store_auto_pwm, 3, 2),
2765 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
2766 show_auto_temp, store_auto_temp, 3, 2),
2767 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2768 show_auto_temp_hyst, store_auto_temp_hyst, 3, 2),
2769 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
2770 show_auto_pwm, store_auto_pwm, 3, 3),
2771 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
2772 show_auto_temp, store_auto_temp, 3, 3),
2773 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2774 show_auto_temp_hyst, store_auto_temp_hyst, 3, 3),
2775 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
2776 show_auto_pwm, store_auto_pwm, 3, 4),
2777 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
2778 show_auto_temp, store_auto_temp, 3, 4),
2779 SENSOR_ATTR_2(pwm4_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2780 show_auto_temp_hyst, store_auto_temp_hyst, 3, 4),
2781 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
2782 show_auto_pwm, store_auto_pwm, 3, 5),
2783 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
2784 show_auto_temp, store_auto_temp, 3, 5),
2785 SENSOR_ATTR_2(pwm4_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2786 show_auto_temp_hyst, store_auto_temp_hyst, 3, 5),
2787 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
2788 show_auto_pwm, store_auto_pwm, 3, 6),
2789 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
2790 show_auto_temp, store_auto_temp, 3, 6),
2791 SENSOR_ATTR_2(pwm4_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2792 show_auto_temp_hyst, store_auto_temp_hyst, 3, 6),
2794 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
2795 show_auto_pwm, store_auto_pwm, 4, 0),
2796 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
2797 show_auto_temp, store_auto_temp, 4, 0),
2798 SENSOR_ATTR_2(pwm5_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2799 show_auto_temp_hyst, store_auto_temp_hyst, 4, 0),
2800 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
2801 show_auto_pwm, store_auto_pwm, 4, 1),
2802 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
2803 show_auto_temp, store_auto_temp, 4, 1),
2804 SENSOR_ATTR_2(pwm5_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2805 show_auto_temp_hyst, store_auto_temp_hyst, 4, 1),
2806 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
2807 show_auto_pwm, store_auto_pwm, 4, 2),
2808 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
2809 show_auto_temp, store_auto_temp, 4, 2),
2810 SENSOR_ATTR_2(pwm5_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2811 show_auto_temp_hyst, store_auto_temp_hyst, 4, 2),
2812 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
2813 show_auto_pwm, store_auto_pwm, 4, 3),
2814 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
2815 show_auto_temp, store_auto_temp, 4, 3),
2816 SENSOR_ATTR_2(pwm5_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2817 show_auto_temp_hyst, store_auto_temp_hyst, 4, 3),
2818 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
2819 show_auto_pwm, store_auto_pwm, 4, 4),
2820 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
2821 show_auto_temp, store_auto_temp, 4, 4),
2822 SENSOR_ATTR_2(pwm5_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2823 show_auto_temp_hyst, store_auto_temp_hyst, 4, 4),
2824 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
2825 show_auto_pwm, store_auto_pwm, 4, 5),
2826 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
2827 show_auto_temp, store_auto_temp, 4, 5),
2828 SENSOR_ATTR_2(pwm5_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2829 show_auto_temp_hyst, store_auto_temp_hyst, 4, 5),
2830 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
2831 show_auto_pwm, store_auto_pwm, 4, 6),
2832 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
2833 show_auto_temp, store_auto_temp, 4, 6),
2834 SENSOR_ATTR_2(pwm5_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2835 show_auto_temp_hyst, store_auto_temp_hyst, 4, 6),
2839 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2841 struct nct6775_data *data = dev_get_drvdata(dev);
2842 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2845 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2847 /* Case open detection */
2850 clear_caseopen(struct device *dev, struct device_attribute *attr,
2851 const char *buf, size_t count)
2853 struct nct6775_data *data = dev_get_drvdata(dev);
2854 struct nct6775_sio_data *sio_data = dev->platform_data;
2855 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2859 if (kstrtoul(buf, 10, &val) || val != 0)
2862 mutex_lock(&data->update_lock);
2865 * Use CR registers to clear caseopen status.
2866 * The CR registers are the same for all chips, and not all chips
2867 * support clearing the caseopen status through "regular" registers.
2869 superio_enter(sio_data->sioreg);
2870 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2871 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2872 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2873 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2874 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2875 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2876 superio_exit(sio_data->sioreg);
2878 data->valid = 0; /* Force cache refresh */
2880 mutex_unlock(&data->update_lock);
2885 static struct sensor_device_attribute sda_caseopen[] = {
2886 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2887 clear_caseopen, INTRUSION_ALARM_BASE),
2888 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2889 clear_caseopen, INTRUSION_ALARM_BASE + 1),
2893 * Driver and device management
2896 static void nct6775_device_remove_files(struct device *dev)
2899 * some entries in the following arrays may not have been used in
2900 * device_create_file(), but device_remove_file() will ignore them
2903 struct nct6775_data *data = dev_get_drvdata(dev);
2905 for (i = 0; i < data->pwm_num; i++)
2906 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
2908 for (i = 0; i < ARRAY_SIZE(sda_max_output); i++)
2909 device_remove_file(dev, &sda_max_output[i].dev_attr);
2911 for (i = 0; i < ARRAY_SIZE(sda_step_output); i++)
2912 device_remove_file(dev, &sda_max_output[i].dev_attr);
2914 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
2915 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
2917 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
2918 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
2920 for (i = 0; i < data->in_num; i++)
2921 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
2923 for (i = 0; i < 5; i++) {
2924 device_remove_file(dev, &sda_fan_input[i].dev_attr);
2925 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
2926 device_remove_file(dev, &sda_fan_div[i].dev_attr);
2927 device_remove_file(dev, &sda_fan_min[i].dev_attr);
2929 for (i = 0; i < NUM_TEMP; i++) {
2930 if (!(data->have_temp & (1 << i)))
2932 device_remove_file(dev, &sda_temp_input[i].dev_attr);
2933 device_remove_file(dev, &sda_temp_label[i].dev_attr);
2934 device_remove_file(dev, &sda_temp_max[i].dev_attr);
2935 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
2936 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
2937 if (!(data->have_temp_fixed & (1 << i)))
2939 device_remove_file(dev, &sda_temp_type[i].dev_attr);
2940 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
2941 if (i >= NUM_TEMP_ALARM)
2943 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
2946 device_remove_file(dev, &sda_caseopen[0].dev_attr);
2947 device_remove_file(dev, &sda_caseopen[1].dev_attr);
2949 device_remove_file(dev, &dev_attr_name);
2950 device_remove_file(dev, &dev_attr_cpu0_vid);
2953 /* Get the monitoring functions started */
2954 static inline void __devinit nct6775_init_device(struct nct6775_data *data)
2959 /* Start monitoring if needed */
2960 if (data->REG_CONFIG) {
2961 tmp = nct6775_read_value(data, data->REG_CONFIG);
2963 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2966 /* Enable temperature sensors if needed */
2967 for (i = 0; i < NUM_TEMP; i++) {
2968 if (!(data->have_temp & (1 << i)))
2970 if (!data->reg_temp_config[i])
2972 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2974 nct6775_write_value(data, data->reg_temp_config[i],
2978 /* Enable VBAT monitoring if needed */
2979 tmp = nct6775_read_value(data, data->REG_VBAT);
2981 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2983 diode = nct6775_read_value(data, data->REG_DIODE);
2985 for (i = 0; i < data->temp_fixed_num; i++) {
2986 if (!(data->have_temp_fixed & (1 << i)))
2988 if ((tmp & (0x02 << i))) /* diode */
2989 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
2990 else /* thermistor */
2991 data->temp_type[i] = 4;
2995 static void __devinit
2996 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2997 struct nct6775_data *data)
3000 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3001 bool pwm3pin, pwm4pin, pwm5pin;
3003 superio_enter(sio_data->sioreg);
3005 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3006 if (data->kind == nct6775) {
3007 regval = superio_inb(sio_data->sioreg, 0x2c);
3009 fan3pin = regval & (1 << 6);
3011 pwm3pin = regval & (1 << 7);
3013 /* On NCT6775, fan4 shares pins with the fdc interface */
3014 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3019 } else if (data->kind == nct6776) {
3020 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3022 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3023 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3028 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3033 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3038 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3045 } else { /* NCT6779D */
3046 regval = superio_inb(sio_data->sioreg, 0x1c);
3048 fan3pin = !(regval & (1 << 5));
3049 fan4pin = !(regval & (1 << 6));
3050 fan5pin = !(regval & (1 << 7));
3052 pwm3pin = !(regval & (1 << 0));
3053 pwm4pin = !(regval & (1 << 1));
3054 pwm5pin = !(regval & (1 << 2));
3060 superio_exit(sio_data->sioreg);
3062 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3063 data->has_fan |= fan3pin << 2;
3064 data->has_fan_min |= fan3min << 2;
3066 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3067 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3069 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3072 static int __devinit nct6775_probe(struct platform_device *pdev)
3074 struct device *dev = &pdev->dev;
3075 struct nct6775_sio_data *sio_data = dev->platform_data;
3076 struct nct6775_data *data;
3077 struct resource *res;
3079 int src, mask, available;
3080 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3081 const u16 *reg_temp_alternate, *reg_temp_crit;
3084 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3085 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
3087 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3088 (unsigned long)res->start,
3089 (unsigned long)res->start + IOREGION_LENGTH - 1);
3093 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3100 data->kind = sio_data->kind;
3101 data->addr = res->start;
3102 mutex_init(&data->lock);
3103 mutex_init(&data->update_lock);
3104 data->name = nct6775_device_names[data->kind];
3105 platform_set_drvdata(pdev, data);
3107 switch (data->kind) {
3111 data->auto_pwm_num = 6;
3112 data->has_fan_div = true;
3113 data->temp_fixed_num = 3;
3115 data->ALARM_BITS = NCT6775_ALARM_BITS;
3117 data->fan_from_reg = fan_from_reg16;
3118 data->fan_from_reg_min = fan_from_reg8;
3120 data->temp_label = nct6775_temp_label;
3121 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3123 data->REG_CONFIG = NCT6775_REG_CONFIG;
3124 data->REG_VBAT = NCT6775_REG_VBAT;
3125 data->REG_DIODE = NCT6775_REG_DIODE;
3126 data->REG_VIN = NCT6775_REG_IN;
3127 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3128 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3129 data->REG_TARGET = NCT6775_REG_TARGET;
3130 data->REG_FAN = NCT6775_REG_FAN;
3131 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3132 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3133 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3134 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3135 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3136 data->REG_PWM[0] = NCT6775_REG_PWM;
3137 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3138 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3139 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3140 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3141 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3142 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3143 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3144 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3145 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3146 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3147 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3148 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3149 data->REG_CRITICAL_TEMP_TOLERANCE
3150 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3151 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3152 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3153 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3154 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3155 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3156 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3157 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3158 data->REG_ALARM = NCT6775_REG_ALARM;
3160 reg_temp = NCT6775_REG_TEMP;
3161 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3162 reg_temp_over = NCT6775_REG_TEMP_OVER;
3163 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3164 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3165 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3166 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3172 data->auto_pwm_num = 4;
3173 data->has_fan_div = false;
3174 data->temp_fixed_num = 3;
3176 data->ALARM_BITS = NCT6776_ALARM_BITS;
3178 data->fan_from_reg = fan_from_reg13;
3179 data->fan_from_reg_min = fan_from_reg13;
3181 data->temp_label = nct6776_temp_label;
3182 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3184 data->REG_CONFIG = NCT6775_REG_CONFIG;
3185 data->REG_VBAT = NCT6775_REG_VBAT;
3186 data->REG_DIODE = NCT6775_REG_DIODE;
3187 data->REG_VIN = NCT6775_REG_IN;
3188 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3189 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3190 data->REG_TARGET = NCT6775_REG_TARGET;
3191 data->REG_FAN = NCT6775_REG_FAN;
3192 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3193 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3194 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3195 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3196 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3197 data->REG_PWM[0] = NCT6775_REG_PWM;
3198 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3199 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3200 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3201 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3202 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3203 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3204 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3205 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3206 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3207 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3208 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3209 data->REG_CRITICAL_TEMP_TOLERANCE
3210 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3211 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3212 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3213 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3214 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3215 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3216 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3217 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3218 data->REG_ALARM = NCT6775_REG_ALARM;
3220 reg_temp = NCT6775_REG_TEMP;
3221 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3222 reg_temp_over = NCT6775_REG_TEMP_OVER;
3223 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3224 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3225 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3226 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3232 data->auto_pwm_num = 4;
3233 data->has_fan_div = false;
3234 data->temp_fixed_num = 6;
3236 data->ALARM_BITS = NCT6779_ALARM_BITS;
3238 data->fan_from_reg = fan_from_reg13;
3239 data->fan_from_reg_min = fan_from_reg13;
3241 data->temp_label = nct6779_temp_label;
3242 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3244 data->REG_CONFIG = NCT6775_REG_CONFIG;
3245 data->REG_VBAT = NCT6775_REG_VBAT;
3246 data->REG_DIODE = NCT6775_REG_DIODE;
3247 data->REG_VIN = NCT6779_REG_IN;
3248 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3249 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3250 data->REG_TARGET = NCT6775_REG_TARGET;
3251 data->REG_FAN = NCT6779_REG_FAN;
3252 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3253 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3254 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3255 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3256 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3257 data->REG_PWM[0] = NCT6775_REG_PWM;
3258 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3259 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3260 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3261 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3262 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3263 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3264 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3265 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3266 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3267 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3268 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3269 data->REG_CRITICAL_TEMP_TOLERANCE
3270 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3271 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3272 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3273 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3274 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3275 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3276 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3277 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3278 data->REG_ALARM = NCT6779_REG_ALARM;
3280 reg_temp = NCT6779_REG_TEMP;
3281 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3282 reg_temp_over = NCT6775_REG_TEMP_OVER;
3283 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3284 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3285 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3286 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3293 data->have_in = (1 << data->in_num) - 1;
3294 data->have_temp = 0;
3297 * On some boards, not all available temperature sources are monitored,
3298 * even though some of the monitoring registers are unused.
3299 * Get list of unused monitoring registers, then detect if any fan
3300 * controls are configured to use unmonitored temperature sources.
3301 * If so, assign the unmonitored temperature sources to available
3302 * monitoring registers.
3306 for (i = 0; i < num_reg_temp; i++) {
3307 if (reg_temp[i] == 0)
3310 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3311 if (!src || (mask & (1 << src)))
3312 available |= 1 << i;
3318 * Now find unmonitored temperature registers and enable monitoring
3319 * if additional monitoring registers are available.
3321 for (i = 0; i < ARRAY_SIZE(data->REG_TEMP_SEL) && available; i++) {
3324 if (!data->REG_TEMP_SEL[i])
3326 for (j = 0; j < data->pwm_num && available; j++) {
3329 if (!data->REG_TEMP_SEL[i][j])
3331 src = nct6775_read_value(data,
3332 data->REG_TEMP_SEL[i][j]);
3334 if (!src || (mask & (1 << src)))
3336 if (src >= data->temp_label_num ||
3337 !strlen(data->temp_label[src])) {
3339 "Select source %d:%d reg 0x%x invalid (%d)\n",
3340 i, j, data->REG_TEMP_SEL[i][j], src);
3344 index = __ffs(available);
3345 nct6775_write_value(data,
3346 data->REG_TEMP_SOURCE[index],
3348 available &= ~(1 << index);
3354 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3355 for (i = 0; i < num_reg_temp; i++) {
3356 if (reg_temp[i] == 0)
3359 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3360 if (!src || (mask & (1 << src)))
3363 if (src >= data->temp_label_num ||
3364 !strlen(data->temp_label[src])) {
3366 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3367 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3373 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3374 if (src <= data->temp_fixed_num) {
3375 data->have_temp |= 1 << (src - 1);
3376 data->have_temp_fixed |= 1 << (src - 1);
3377 data->reg_temp[0][src - 1] = reg_temp[i];
3378 data->reg_temp[1][src - 1] = reg_temp_over[i];
3379 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3380 data->reg_temp_config[src - 1] = reg_temp_config[i];
3381 data->temp_src[src - 1] = src;
3388 /* Use dynamic index for other sources */
3389 data->have_temp |= 1 << s;
3390 data->reg_temp[0][s] = reg_temp[i];
3391 data->reg_temp[1][s] = reg_temp_over[i];
3392 data->reg_temp[2][s] = reg_temp_hyst[i];
3393 data->reg_temp_config[s] = reg_temp_config[i];
3394 if (reg_temp_crit[src - 1])
3395 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3397 data->temp_src[s] = src;
3403 * Go through the list of alternate temp registers and enable
3405 * The temperature is already monitored if the respective bit in <mask>
3408 for (i = 0; i < data->temp_label_num - 1; i++) {
3409 if (!reg_temp_alternate[i])
3411 if (mask & (1 << (i + 1)))
3413 if (i < data->temp_fixed_num) {
3414 if (data->have_temp & (1 << i))
3416 data->have_temp |= 1 << i;
3417 data->reg_temp[0][i] = reg_temp_alternate[i];
3418 data->temp_src[i] = i + 1;
3422 if (s >= NUM_TEMP) /* Abort if no more space */
3425 data->have_temp |= 1 << s;
3426 data->reg_temp[0][s] = reg_temp_alternate[i];
3427 data->temp_src[s] = i + 1;
3430 #endif /* TESTING */
3432 switch (data->kind) {
3437 * On NCT6776, AUXTIN and VIN3 pins are shared.
3438 * Only way to detect it is to check if AUXTIN is used
3439 * as a temperature source, and if that source is
3442 * If that is the case, disable in6, which reports VIN3.
3443 * Otherwise disable temp3.
3445 if (data->have_temp & (1 << 2)) {
3446 u8 reg = nct6775_read_value(data,
3447 data->reg_temp_config[2]);
3449 data->have_temp &= ~(1 << 2);
3451 data->have_in &= ~(1 << 6);
3461 * Assume voltage is disabled if the respective temperature is
3462 * used as temperature source.
3464 for (i = 0; i < ARRAY_SIZE(NCT6779_REG_TEMP); i++) {
3465 if (!(data->have_temp & (1 << i)))
3467 if (i == 2) /* AUXTIN0 */
3468 data->have_in &= ~(1 << 6); /* no VIN4 */
3469 if (i == 3) /* AUXTIN1 */
3470 data->have_in &= ~(1 << 10); /* no VIN5 */
3471 if (i == 4) /* AUXTIN2 */
3472 data->have_in &= ~(1 << 11); /* no VIN6 */
3473 if (i == 5) /* AUXTIN3 */
3474 data->have_in &= ~(1 << 14); /* no VIN7 */
3479 /* Initialize the chip */
3480 nct6775_init_device(data);
3482 data->vrm = vid_which_vrm();
3483 superio_enter(sio_data->sioreg);
3486 * We can get the VID input values directly at logical device D 0xe3.
3488 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3489 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3490 err = device_create_file(dev, &dev_attr_cpu0_vid);
3497 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3498 tmp = superio_inb(sio_data->sioreg,
3499 NCT6775_REG_CR_FAN_DEBOUNCE);
3500 switch (data->kind) {
3509 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3511 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3515 superio_exit(sio_data->sioreg);
3517 nct6775_check_fan_inputs(sio_data, data);
3519 /* Read fan clock dividers immediately */
3520 nct6775_update_fan_div_common(dev, data);
3522 /* Register sysfs hooks */
3523 for (i = 0; i < data->pwm_num; i++) {
3524 if (!(data->has_pwm & (1 << i)))
3527 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3531 if (data->REG_PWM[3]) {
3532 err = device_create_file(dev,
3533 &sda_max_output[i].dev_attr);
3537 if (data->REG_PWM[4]) {
3538 err = device_create_file(dev,
3539 &sda_step_output[i].dev_attr);
3543 if (data->REG_PWM[6]) {
3544 err = device_create_file(dev,
3545 &sda_weight_duty_base[i].dev_attr);
3550 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3551 struct sensor_device_attribute_2 *attr =
3552 &sda_auto_pwm_arrays[i];
3554 if (!(data->has_pwm & (1 << attr->nr)))
3556 if (attr->index > data->auto_pwm_num)
3558 err = device_create_file(dev, &attr->dev_attr);
3563 for (i = 0; i < data->in_num; i++) {
3564 if (!(data->have_in & (1 << i)))
3566 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3571 for (i = 0; i < 5; i++) {
3572 if (data->has_fan & (1 << i)) {
3573 err = device_create_file(dev,
3574 &sda_fan_input[i].dev_attr);
3577 err = device_create_file(dev,
3578 &sda_fan_alarm[i].dev_attr);
3581 if (data->kind != nct6776 &&
3582 data->kind != nct6779) {
3583 err = device_create_file(dev,
3584 &sda_fan_div[i].dev_attr);
3588 if (data->has_fan_min & (1 << i)) {
3589 err = device_create_file(dev,
3590 &sda_fan_min[i].dev_attr);
3597 for (i = 0; i < NUM_TEMP; i++) {
3598 if (!(data->have_temp & (1 << i)))
3600 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3603 if (data->temp_label) {
3604 err = device_create_file(dev,
3605 &sda_temp_label[i].dev_attr);
3609 if (data->reg_temp[1][i]) {
3610 err = device_create_file(dev,
3611 &sda_temp_max[i].dev_attr);
3615 if (data->reg_temp[2][i]) {
3616 err = device_create_file(dev,
3617 &sda_temp_max_hyst[i].dev_attr);
3621 if (data->reg_temp[3][i]) {
3622 err = device_create_file(dev,
3623 &sda_temp_crit[i].dev_attr);
3627 if (!(data->have_temp_fixed & (1 << i)))
3629 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3632 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3635 if (i >= NUM_TEMP_ALARM ||
3636 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3638 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3643 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3644 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3646 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3651 err = device_create_file(dev, &dev_attr_name);
3655 data->hwmon_dev = hwmon_device_register(dev);
3656 if (IS_ERR(data->hwmon_dev)) {
3657 err = PTR_ERR(data->hwmon_dev);
3664 nct6775_device_remove_files(dev);
3666 release_region(res->start, IOREGION_LENGTH);
3671 static int __devexit nct6775_remove(struct platform_device *pdev)
3673 struct nct6775_data *data = platform_get_drvdata(pdev);
3675 hwmon_device_unregister(data->hwmon_dev);
3676 nct6775_device_remove_files(&pdev->dev);
3677 release_region(data->addr, IOREGION_LENGTH);
3682 static struct platform_driver nct6775_driver = {
3684 .owner = THIS_MODULE,
3687 .probe = nct6775_probe,
3688 .remove = __devexit_p(nct6775_remove),
3691 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3692 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3693 struct nct6775_sio_data *sio_data)
3695 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
3696 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
3697 static const char __initdata sio_name_NCT6779[] = "NCT6779D";
3700 const char *sio_name;
3702 superio_enter(sioaddr);
3707 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3708 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3709 switch (val & SIO_ID_MASK) {
3710 case SIO_NCT6775_ID:
3711 sio_data->kind = nct6775;
3712 sio_name = sio_name_NCT6775;
3714 case SIO_NCT6776_ID:
3715 sio_data->kind = nct6776;
3716 sio_name = sio_name_NCT6776;
3718 case SIO_NCT6779_ID:
3719 sio_data->kind = nct6779;
3720 sio_name = sio_name_NCT6779;
3724 pr_debug("unsupported chip ID: 0x%04x\n", val);
3725 superio_exit(sioaddr);
3729 /* We have a known chip, find the HWM I/O address */
3730 superio_select(sioaddr, NCT6775_LD_HWM);
3731 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3732 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3733 *addr = val & IOREGION_ALIGNMENT;
3735 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3736 superio_exit(sioaddr);
3740 /* Activate logical device if needed */
3741 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3742 if (!(val & 0x01)) {
3743 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3744 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3747 superio_exit(sioaddr);
3748 pr_info("Found %s chip at %#x\n", sio_name, *addr);
3749 sio_data->sioreg = sioaddr;
3755 * when Super-I/O functions move to a separate file, the Super-I/O
3756 * bus will manage the lifetime of the device and this module will only keep
3757 * track of the nct6775 driver. But since we platform_device_alloc(), we
3758 * must keep track of the device
3760 static struct platform_device *pdev;
3762 static int __init sensors_nct6775_init(void)
3765 unsigned short address;
3766 struct resource res;
3767 struct nct6775_sio_data sio_data;
3770 * initialize sio_data->kind and sio_data->sioreg.
3772 * when Super-I/O functions move to a separate file, the Super-I/O
3773 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3774 * nct6775 hardware monitor, and call probe()
3776 if (nct6775_find(0x2e, &address, &sio_data) &&
3777 nct6775_find(0x4e, &address, &sio_data))
3780 err = platform_driver_register(&nct6775_driver);
3784 pdev = platform_device_alloc(DRVNAME, address);
3787 pr_err("Device allocation failed\n");
3788 goto exit_unregister;
3791 err = platform_device_add_data(pdev, &sio_data,
3792 sizeof(struct nct6775_sio_data));
3794 pr_err("Platform data allocation failed\n");
3795 goto exit_device_put;
3798 memset(&res, 0, sizeof(res));
3800 res.start = address + IOREGION_OFFSET;
3801 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3802 res.flags = IORESOURCE_IO;
3804 err = acpi_check_resource_conflict(&res);
3806 goto exit_device_put;
3808 err = platform_device_add_resources(pdev, &res, 1);
3810 pr_err("Device resource addition failed (%d)\n", err);
3811 goto exit_device_put;
3814 /* platform_device_add calls probe() */
3815 err = platform_device_add(pdev);
3817 pr_err("Device addition failed (%d)\n", err);
3818 goto exit_device_put;
3824 platform_device_put(pdev);
3826 platform_driver_unregister(&nct6775_driver);
3831 static void __exit sensors_nct6775_exit(void)
3833 platform_device_unregister(pdev);
3834 platform_driver_unregister(&nct6775_driver);
3837 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3838 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3839 MODULE_LICENSE("GPL");
3841 module_init(sensors_nct6775_init);
3842 module_exit(sensors_nct6775_exit);