git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
  44  *
  45  * #temp lists the number of monitored temperature sources (first value) plus
  46  * the number of directly connectable temperature sensors (second value).
  47  */
  48
  49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50
  51 #include <linux/module.h>
  52 #include <linux/init.h>
  53 #include <linux/slab.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/platform_device.h>
  56 #include <linux/hwmon.h>
  57 #include <linux/hwmon-sysfs.h>
  58 #include <linux/hwmon-vid.h>
  59 #include <linux/err.h>
  60 #include <linux/mutex.h>
  61 #include <linux/acpi.h>
  62 #include <linux/bitops.h>
  63 #include <linux/dmi.h>
  64 #include <linux/io.h>
  65 #include <linux/debugfs.h>
  66 #include "lm75.h"
  67 #include "compat.h"
  68
  69 #define USE_ALTERNATE
  70
  71 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
  72              nct6795 };
  73
  74 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  75 static const char * const nct6775_device_names[] = {
  76         "nct6106",
  77         "nct6775",
  78         "nct6776",
  79         "nct6779",
  80         "nct6791",
  81         "nct6792",
  82         "nct6793",
  83         "nct6795",
  84 };
  85
  86 static const char * const nct6775_sio_names[] __initconst = {
  87         "NCT6106D",
  88         "NCT6775F",
  89         "NCT6776D/F",
  90         "NCT6779D",
  91         "NCT6791D",
  92         "NCT6792D",
  93         "NCT6793D",
  94         "NCT6795D",
  95 };
  96
  97 static unsigned short force_id;
  98 module_param(force_id, ushort, 0);
  99 MODULE_PARM_DESC(force_id, "Override the detected device ID");
 100
 101 static unsigned short fan_debounce;
 102 module_param(fan_debounce, ushort, 0);
 103 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 104
 105 #define DRVNAME "nct6775"
 106
 107 /*
 108  * Super-I/O constants and functions
 109  */
 110
 111 #define NCT6775_LD_ACPI         0x0a
 112 #define NCT6775_LD_HWM          0x0b
 113 #define NCT6775_LD_VID          0x0d
 114 #define NCT6775_LD_12           0x12
 115
 116 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 117 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 118 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 119 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 120
 121 #define SIO_NCT6106_ID          0xc450
 122 #define SIO_NCT6775_ID          0xb470
 123 #define SIO_NCT6776_ID          0xc330
 124 #define SIO_NCT6779_ID          0xc560
 125 #define SIO_NCT6791_ID          0xc800
 126 #define SIO_NCT6792_ID          0xc910
 127 #define SIO_NCT6793_ID          0xd120
 128 #define SIO_NCT6795_ID          0xd350
 129 #define SIO_ID_MASK             0xFFF0
 130
 131 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 132
 133 static inline void
 134 superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static inline int
 141 superio_inb(int ioreg, int reg)
 142 {
 143         outb(reg, ioreg);
 144         return inb(ioreg + 1);
 145 }
 146
 147 static inline void
 148 superio_select(int ioreg, int ld)
 149 {
 150         outb(SIO_REG_LDSEL, ioreg);
 151         outb(ld, ioreg + 1);
 152 }
 153
 154 static inline int
 155 superio_enter(int ioreg)
 156 {
 157         /*
 158          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 159          */
 160         if (!request_muxed_region(ioreg, 2, DRVNAME))
 161                 return -EBUSY;
 162
 163         outb(0x87, ioreg);
 164         outb(0x87, ioreg);
 165
 166         return 0;
 167 }
 168
 169 static inline void
 170 superio_exit(int ioreg)
 171 {
 172         outb(0xaa, ioreg);
 173         outb(0x02, ioreg);
 174         outb(0x02, ioreg + 1);
 175         release_region(ioreg, 2);
 176 }
 177
 178 /*
 179  * ISA constants
 180  */
 181
 182 #define IOREGION_ALIGNMENT      (~7)
 183 #define IOREGION_OFFSET         5
 184 #define IOREGION_LENGTH         2
 185 #define ADDR_REG_OFFSET         0
 186 #define DATA_REG_OFFSET         1
 187
 188 #define NCT6775_REG_BANK        0x4E
 189 #define NCT6775_REG_CONFIG      0x40
 190
 191 /*
 192  * Not currently used:
 193  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 194  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 195  * REG_MAN_ID is at port 0x4f
 196  * REG_CHIP_ID is at port 0x58
 197  */
 198
 199 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 200 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 201
 202 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 203 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 204
 205 #define NUM_FAN         6
 206
 207 #define TEMP_SOURCE_VIRTUAL     0x1f
 208
 209 /* Common and NCT6775 specific data */
 210
 211 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 212
 213 static const u16 NCT6775_REG_IN_MAX[] = {
 214         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 215         0x55c, 0x55e, 0x560, 0x562 };
 216 static const u16 NCT6775_REG_IN_MIN[] = {
 217         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 218         0x55d, 0x55f, 0x561, 0x563 };
 219 static const u16 NCT6775_REG_IN[] = {
 220         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 221 };
 222
 223 #define NCT6775_REG_VBAT                0x5D
 224 #define NCT6775_REG_DIODE               0x5E
 225 #define NCT6775_DIODE_MASK              0x02
 226
 227 #define NCT6775_REG_FANDIV1             0x506
 228 #define NCT6775_REG_FANDIV2             0x507
 229
 230 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 231
 232 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 233
 234 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 235
 236 static const s8 NCT6775_ALARM_BITS[] = {
 237         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 238         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 239         -1,                             /* unused */
 240         6, 7, 11, -1, -1,               /* fan1..fan5 */
 241         -1, -1, -1,                     /* unused */
 242         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 243         12, -1 };                       /* intrusion0, intrusion1 */
 244
 245 #define FAN_ALARM_BASE          16
 246 #define TEMP_ALARM_BASE         24
 247 #define INTRUSION_ALARM_BASE    30
 248
 249 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 250
 251 /*
 252  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 253  * 30..31 intrusion
 254  */
 255 static const s8 NCT6775_BEEP_BITS[] = {
 256         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 257         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 258         21,                             /* global beep enable */
 259         6, 7, 11, 28, -1,               /* fan1..fan5 */
 260         -1, -1, -1,                     /* unused */
 261         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 262         12, -1 };                       /* intrusion0, intrusion1 */
 263
 264 #define BEEP_ENABLE_BASE                15
 265
 266 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 267 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 268
 269 /* DC or PWM output fan configuration */
 270 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 271 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 272
 273 /* Advanced Fan control, some values are common for all fans */
 274
 275 static const u16 NCT6775_REG_TARGET[] = {
 276         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 277 static const u16 NCT6775_REG_FAN_MODE[] = {
 278         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 279 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 280         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 281 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 282         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 283 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 284         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 285 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 286         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 287 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 288 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 289
 290 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 291         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 292 static const u16 NCT6775_REG_PWM[] = {
 293         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 294 static const u16 NCT6775_REG_PWM_READ[] = {
 295         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 296
 297 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 298 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 299 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 300 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 301
 302 static const u16 NCT6775_REG_TEMP[] = {
 303         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 304
 305 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 306
 307 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 308         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 309 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 310         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 311 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 312         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 313
 314 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 315         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 316
 317 static const u16 NCT6775_REG_TEMP_SEL[] = {
 318         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 319
 320 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 321         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 322 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 323         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 324 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 325         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 326 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 327         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 328 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 329         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 330
 331 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 332
 333 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 334         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 335 static const u16 NCT6775_REG_AUTO_PWM[] = {
 336         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 337
 338 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 339 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 340
 341 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 342
 343 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 344         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 345 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 346         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 347
 348 static const char *const nct6775_temp_label[] = {
 349         "",
 350         "SYSTIN",
 351         "CPUTIN",
 352         "AUXTIN",
 353         "AMD SB-TSI",
 354         "PECI Agent 0",
 355         "PECI Agent 1",
 356         "PECI Agent 2",
 357         "PECI Agent 3",
 358         "PECI Agent 4",
 359         "PECI Agent 5",
 360         "PECI Agent 6",
 361         "PECI Agent 7",
 362         "PCH_CHIP_CPU_MAX_TEMP",
 363         "PCH_CHIP_TEMP",
 364         "PCH_CPU_TEMP",
 365         "PCH_MCH_TEMP",
 366         "PCH_DIM0_TEMP",
 367         "PCH_DIM1_TEMP",
 368         "PCH_DIM2_TEMP",
 369         "PCH_DIM3_TEMP"
 370 };
 371
 372 #define NCT6775_TEMP_MASK       0x001ffffe
 373
 374 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 375         [13] = 0x661,
 376         [14] = 0x662,
 377         [15] = 0x664,
 378 };
 379
 380 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
 381         [4] = 0xa00,
 382         [5] = 0xa01,
 383         [6] = 0xa02,
 384         [7] = 0xa03,
 385         [8] = 0xa04,
 386         [9] = 0xa05,
 387         [10] = 0xa06,
 388         [11] = 0xa07
 389 };
 390
 391 /* NCT6776 specific data */
 392
 393 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 394 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 395 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 396
 397 static const s8 NCT6776_ALARM_BITS[] = {
 398         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 399         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 400         -1,                             /* unused */
 401         6, 7, 11, 10, 23,               /* fan1..fan5 */
 402         -1, -1, -1,                     /* unused */
 403         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 404         12, 9 };                        /* intrusion0, intrusion1 */
 405
 406 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 407
 408 static const s8 NCT6776_BEEP_BITS[] = {
 409         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 410         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 411         24,                             /* global beep enable */
 412         25, 26, 27, 28, 29,             /* fan1..fan5 */
 413         -1, -1, -1,                     /* unused */
 414         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 415         30, 31 };                       /* intrusion0, intrusion1 */
 416
 417 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 418         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 419
 420 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 421 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 422
 423 static const u16 NCT6776_REG_FAN_MIN[] = {
 424         0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a };
 425 static const u16 NCT6776_REG_FAN_PULSES[] = {
 426         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 427
 428 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 429         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 430
 431 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 432         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 433
 434 static const char *const nct6776_temp_label[] = {
 435         "",
 436         "SYSTIN",
 437         "CPUTIN",
 438         "AUXTIN",
 439         "SMBUSMASTER 0",
 440         "SMBUSMASTER 1",
 441         "SMBUSMASTER 2",
 442         "SMBUSMASTER 3",
 443         "SMBUSMASTER 4",
 444         "SMBUSMASTER 5",
 445         "SMBUSMASTER 6",
 446         "SMBUSMASTER 7",
 447         "PECI Agent 0",
 448         "PECI Agent 1",
 449         "PCH_CHIP_CPU_MAX_TEMP",
 450         "PCH_CHIP_TEMP",
 451         "PCH_CPU_TEMP",
 452         "PCH_MCH_TEMP",
 453         "PCH_DIM0_TEMP",
 454         "PCH_DIM1_TEMP",
 455         "PCH_DIM2_TEMP",
 456         "PCH_DIM3_TEMP",
 457         "BYTE_TEMP"
 458 };
 459
 460 #define NCT6776_TEMP_MASK       0x007ffffe
 461
 462 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 463         [14] = 0x401,
 464         [15] = 0x402,
 465         [16] = 0x404,
 466 };
 467
 468 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 469         [11] = 0x709,
 470         [12] = 0x70a,
 471 };
 472
 473 /* NCT6779 specific data */
 474
 475 static const u16 NCT6779_REG_IN[] = {
 476         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 477         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 478
 479 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 480         0x459, 0x45A, 0x45B, 0x568 };
 481
 482 static const s8 NCT6779_ALARM_BITS[] = {
 483         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 484         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 485         -1,                             /* unused */
 486         6, 7, 11, 10, 23,               /* fan1..fan5 */
 487         -1, -1, -1,                     /* unused */
 488         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 489         12, 9 };                        /* intrusion0, intrusion1 */
 490
 491 static const s8 NCT6779_BEEP_BITS[] = {
 492         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 493         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 494         24,                             /* global beep enable */
 495         25, 26, 27, 28, 29,             /* fan1..fan5 */
 496         -1, -1, -1,                     /* unused */
 497         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 498         30, 31 };                       /* intrusion0, intrusion1 */
 499
 500 static const u16 NCT6779_REG_FAN[] = {
 501         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 502 static const u16 NCT6779_REG_FAN_PULSES[] = {
 503         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 504
 505 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 506         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 507 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 508 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 509         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 510
 511 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 512 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 513 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 514         0x18, 0x152 };
 515 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 516         0x3a, 0x153 };
 517 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 518         0x39, 0x155 };
 519
 520 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 521         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 522
 523 static const char *const nct6779_temp_label[] = {
 524         "",
 525         "SYSTIN",
 526         "CPUTIN",
 527         "AUXTIN0",
 528         "AUXTIN1",
 529         "AUXTIN2",
 530         "AUXTIN3",
 531         "",
 532         "SMBUSMASTER 0",
 533         "SMBUSMASTER 1",
 534         "SMBUSMASTER 2",
 535         "SMBUSMASTER 3",
 536         "SMBUSMASTER 4",
 537         "SMBUSMASTER 5",
 538         "SMBUSMASTER 6",
 539         "SMBUSMASTER 7",
 540         "PECI Agent 0",
 541         "PECI Agent 1",
 542         "PCH_CHIP_CPU_MAX_TEMP",
 543         "PCH_CHIP_TEMP",
 544         "PCH_CPU_TEMP",
 545         "PCH_MCH_TEMP",
 546         "PCH_DIM0_TEMP",
 547         "PCH_DIM1_TEMP",
 548         "PCH_DIM2_TEMP",
 549         "PCH_DIM3_TEMP",
 550         "BYTE_TEMP",
 551         "",
 552         "",
 553         "",
 554         "",
 555         "Virtual_TEMP"
 556 };
 557
 558 #define NCT6779_TEMP_MASK       0x07ffff7e
 559 #define NCT6791_TEMP_MASK       0x87ffff7e
 560
 561 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 562         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 563             0, 0, 0, 0, 0, 0, 0, 0,
 564             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 565             0x408, 0 };
 566
 567 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 568         [15] = 0x709,
 569         [16] = 0x70a,
 570 };
 571
 572 /* NCT6791 specific data */
 573
 574 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 575
 576 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 577 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 578 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 579 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 580 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 581 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 582
 583 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 584         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 585
 586 static const s8 NCT6791_ALARM_BITS[] = {
 587         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 588         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 589         -1,                             /* unused */
 590         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 591         -1, -1,                         /* unused */
 592         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 593         12, 9 };                        /* intrusion0, intrusion1 */
 594
 595 /* NCT6792/NCT6793 specific data */
 596
 597 static const u16 NCT6792_REG_TEMP_MON[] = {
 598         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 599 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 600         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 601
 602 static const char *const nct6792_temp_label[] = {
 603         "",
 604         "SYSTIN",
 605         "CPUTIN",
 606         "AUXTIN0",
 607         "AUXTIN1",
 608         "AUXTIN2",
 609         "AUXTIN3",
 610         "",
 611         "SMBUSMASTER 0",
 612         "SMBUSMASTER 1",
 613         "SMBUSMASTER 2",
 614         "SMBUSMASTER 3",
 615         "SMBUSMASTER 4",
 616         "SMBUSMASTER 5",
 617         "SMBUSMASTER 6",
 618         "SMBUSMASTER 7",
 619         "PECI Agent 0",
 620         "PECI Agent 1",
 621         "PCH_CHIP_CPU_MAX_TEMP",
 622         "PCH_CHIP_TEMP",
 623         "PCH_CPU_TEMP",
 624         "PCH_MCH_TEMP",
 625         "PCH_DIM0_TEMP",
 626         "PCH_DIM1_TEMP",
 627         "PCH_DIM2_TEMP",
 628         "PCH_DIM3_TEMP",
 629         "BYTE_TEMP",
 630         "PECI Agent 0 Calibration",
 631         "PECI Agent 1 Calibration",
 632         "",
 633         "",
 634         "Virtual_TEMP"
 635 };
 636
 637 #define NCT6792_TEMP_MASK       0x9fffff7e
 638
 639 static const char *const nct6793_temp_label[] = {
 640         "",
 641         "SYSTIN",
 642         "CPUTIN",
 643         "AUXTIN0",
 644         "AUXTIN1",
 645         "AUXTIN2",
 646         "AUXTIN3",
 647         "",
 648         "SMBUSMASTER 0",
 649         "SMBUSMASTER 1",
 650         "",
 651         "",
 652         "",
 653         "",
 654         "",
 655         "",
 656         "PECI Agent 0",
 657         "PECI Agent 1",
 658         "PCH_CHIP_CPU_MAX_TEMP",
 659         "PCH_CHIP_TEMP",
 660         "PCH_CPU_TEMP",
 661         "PCH_MCH_TEMP",
 662         "Agent0 Dimm0 ",
 663         "Agent0 Dimm1",
 664         "Agent1 Dimm0",
 665         "Agent1 Dimm1",
 666         "BYTE_TEMP0",
 667         "BYTE_TEMP1",
 668         "PECI Agent 0 Calibration",
 669         "PECI Agent 1 Calibration",
 670         "",
 671         "Virtual_TEMP"
 672 };
 673
 674 #define NCT6793_TEMP_MASK       0xbfff037e
 675
 676 static const char *const nct6795_temp_label[] = {
 677         "",
 678         "SYSTIN",
 679         "CPUTIN",
 680         "AUXTIN0",
 681         "AUXTIN1",
 682         "AUXTIN2",
 683         "AUXTIN3",
 684         "",
 685         "SMBUSMASTER 0",
 686         "SMBUSMASTER 1",
 687         "SMBUSMASTER 2",
 688         "SMBUSMASTER 3",
 689         "SMBUSMASTER 4",
 690         "SMBUSMASTER 5",
 691         "SMBUSMASTER 6",
 692         "SMBUSMASTER 7",
 693         "PECI Agent 0",
 694         "PECI Agent 1",
 695         "PCH_CHIP_CPU_MAX_TEMP",
 696         "PCH_CHIP_TEMP",
 697         "PCH_CPU_TEMP",
 698         "PCH_MCH_TEMP",
 699         "PCH_DIM0_TEMP",
 700         "PCH_DIM1_TEMP",
 701         "PCH_DIM2_TEMP",
 702         "PCH_DIM3_TEMP",
 703         "BYTE_TEMP0",
 704         "BYTE_TEMP1",
 705         "PECI Agent 0 Calibration",
 706         "PECI Agent 1 Calibration",
 707         "",
 708         "Virtual_TEMP"
 709 };
 710
 711 #define NCT6795_TEMP_MASK       0xbfffff7e
 712
 713 /* NCT6102D/NCT6106D specific data */
 714
 715 #define NCT6106_REG_VBAT        0x318
 716 #define NCT6106_REG_DIODE       0x319
 717 #define NCT6106_DIODE_MASK      0x01
 718
 719 static const u16 NCT6106_REG_IN_MAX[] = {
 720         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 721 static const u16 NCT6106_REG_IN_MIN[] = {
 722         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 723 static const u16 NCT6106_REG_IN[] = {
 724         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 725
 726 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 727 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 728 static const u16 NCT6106_REG_TEMP_HYST[] = {
 729         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 730 static const u16 NCT6106_REG_TEMP_OVER[] = {
 731         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 732 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 733         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 734 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 735         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 736 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 737 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 738         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 739
 740 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 741 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 742 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 743 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 744
 745 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 746 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 747 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 748 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 749 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 750 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 751 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 752         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 753
 754 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 755 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 756         0x11b, 0x12b, 0x13b };
 757
 758 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 759 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 760 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 761
 762 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 763 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 764 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 765 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 766 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 767 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 768
 769 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 770
 771 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 772 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 773 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 774 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 775 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 776 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 777
 778 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 779 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 780
 781 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 782         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 783
 784 static const s8 NCT6106_ALARM_BITS[] = {
 785         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 786         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 787         -1,                             /* unused */
 788         32, 33, 34, -1, -1,             /* fan1..fan5 */
 789         -1, -1, -1,                     /* unused */
 790         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 791         48, -1                          /* intrusion0, intrusion1 */
 792 };
 793
 794 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 795         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 796
 797 static const s8 NCT6106_BEEP_BITS[] = {
 798         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 799         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 800         32,                             /* global beep enable */
 801         24, 25, 26, 27, 28,             /* fan1..fan5 */
 802         -1, -1, -1,                     /* unused */
 803         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 804         34, -1                          /* intrusion0, intrusion1 */
 805 };
 806
 807 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
 808         [14] = 0x51,
 809         [15] = 0x52,
 810         [16] = 0x54,
 811 };
 812
 813 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
 814         [11] = 0x204,
 815         [12] = 0x205,
 816 };
 817
 818 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 819 {
 820         if (mode == 0 && pwm == 255)
 821                 return off;
 822         return mode + 1;
 823 }
 824
 825 static int pwm_enable_to_reg(enum pwm_enable mode)
 826 {
 827         if (mode == off)
 828                 return 0;
 829         return mode - 1;
 830 }
 831
 832 /*
 833  * Conversions
 834  */
 835
 836 /* 1 is DC mode, output in ms */
 837 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 838 {
 839         return mode ? 400 * reg : 100 * reg;
 840 }
 841
 842 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 843 {
 844         return clamp_val((mode ? (msec + 200) / 400 :
 845                                         (msec + 50) / 100), 1, 255);
 846 }
 847
 848 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 849 {
 850         if (reg == 0 || reg == 255)
 851                 return 0;
 852         return 1350000U / (reg << divreg);
 853 }
 854
 855 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 856 {
 857         if ((reg & 0xff1f) == 0xff1f)
 858                 return 0;
 859
 860         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 861
 862         if (reg == 0)
 863                 return 0;
 864
 865         return 1350000U / reg;
 866 }
 867
 868 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 869 {
 870         if (reg == 0 || reg == 0xffff)
 871                 return 0;
 872
 873         /*
 874          * Even though the registers are 16 bit wide, the fan divisor
 875          * still applies.
 876          */
 877         return 1350000U / (reg << divreg);
 878 }
 879
 880 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 881 {
 882         if (!fan)
 883                 return 0;
 884
 885         return (1350000U / fan) >> divreg;
 886 }
 887
 888 static inline unsigned int
 889 div_from_reg(u8 reg)
 890 {
 891         return BIT(reg);
 892 }
 893
 894 /*
 895  * Some of the voltage inputs have internal scaling, the tables below
 896  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 897  */
 898 static const u16 scale_in[15] = {
 899         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 900         800, 800
 901 };
 902
 903 static inline long in_from_reg(u8 reg, u8 nr)
 904 {
 905         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 906 }
 907
 908 static inline u8 in_to_reg(u32 val, u8 nr)
 909 {
 910         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 911 }
 912
 913 /*
 914  * Data structures and manipulation thereof
 915  */
 916
 917 struct nct6775_data {
 918         int addr;       /* IO base of hw monitor block */
 919         int sioreg;     /* SIO register address */
 920         enum kinds kind;
 921         const char *name;
 922
 923 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 924         struct device *hwmon_dev;
 925 #endif
 926
 927         const struct attribute_group *groups[6];
 928
 929         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 930                                     * 3=temp_crit, 4=temp_lcrit
 931                                     */
 932         u8 temp_src[NUM_TEMP];
 933         u16 reg_temp_config[NUM_TEMP];
 934         const char * const *temp_label;
 935         u32 temp_mask;
 936
 937         u16 REG_CONFIG;
 938         u16 REG_VBAT;
 939         u16 REG_DIODE;
 940         u8 DIODE_MASK;
 941
 942         const s8 *ALARM_BITS;
 943         const s8 *BEEP_BITS;
 944
 945         const u16 *REG_VIN;
 946         const u16 *REG_IN_MINMAX[2];
 947
 948         const u16 *REG_TARGET;
 949         const u16 *REG_FAN;
 950         const u16 *REG_FAN_MODE;
 951         const u16 *REG_FAN_MIN;
 952         const u16 *REG_FAN_PULSES;
 953         const u16 *FAN_PULSE_SHIFT;
 954         const u16 *REG_FAN_TIME[3];
 955
 956         const u16 *REG_TOLERANCE_H;
 957
 958         const u8 *REG_PWM_MODE;
 959         const u8 *PWM_MODE_MASK;
 960
 961         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 962                                  * [3]=pwm_max, [4]=pwm_step,
 963                                  * [5]=weight_duty_step, [6]=weight_duty_base
 964                                  */
 965         const u16 *REG_PWM_READ;
 966
 967         const u16 *REG_CRITICAL_PWM_ENABLE;
 968         u8 CRITICAL_PWM_ENABLE_MASK;
 969         const u16 *REG_CRITICAL_PWM;
 970
 971         const u16 *REG_AUTO_TEMP;
 972         const u16 *REG_AUTO_PWM;
 973
 974         const u16 *REG_CRITICAL_TEMP;
 975         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 976
 977         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 978         const u16 *REG_TEMP_SEL;
 979         const u16 *REG_WEIGHT_TEMP_SEL;
 980         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 981
 982         const u16 *REG_TEMP_OFFSET;
 983
 984         const u16 *REG_ALARM;
 985         const u16 *REG_BEEP;
 986
 987         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 988         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 989
 990         struct mutex update_lock;
 991         bool valid;             /* true if following fields are valid */
 992         unsigned long last_updated;     /* In jiffies */
 993
 994         /* Register values */
 995         u8 bank;                /* current register bank */
 996         u8 in_num;              /* number of in inputs we have */
 997         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 998         unsigned int rpm[NUM_FAN];
 999         u16 fan_min[NUM_FAN];
1000         u8 fan_pulses[NUM_FAN];
1001         u8 fan_div[NUM_FAN];
1002         u8 has_pwm;
1003         u8 has_fan;             /* some fan inputs can be disabled */
1004         u8 has_fan_min;         /* some fans don't have min register */
1005         bool has_fan_div;
1006
1007         u8 num_temp_alarms;     /* 2, 3, or 6 */
1008         u8 num_temp_beeps;      /* 2, 3, or 6 */
1009         u8 temp_fixed_num;      /* 3 or 6 */
1010         u8 temp_type[NUM_TEMP_FIXED];
1011         s8 temp_offset[NUM_TEMP_FIXED];
1012         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1013                                 * 3=temp_crit, 4=temp_lcrit */
1014         u64 alarms;
1015         u64 beeps;
1016
1017         u8 pwm_num;     /* number of pwm */
1018         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
1019                                  * 0->PWM variable duty cycle
1020                                  */
1021         enum pwm_enable pwm_enable[NUM_FAN];
1022                         /* 0->off
1023                          * 1->manual
1024                          * 2->thermal cruise mode (also called SmartFan I)
1025                          * 3->fan speed cruise mode
1026                          * 4->SmartFan III
1027                          * 5->enhanced variable thermal cruise (SmartFan IV)
1028                          */
1029         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1030                                  * [3]=pwm_max, [4]=pwm_step,
1031                                  * [5]=weight_duty_step, [6]=weight_duty_base
1032                                  */
1033
1034         u8 target_temp[NUM_FAN];
1035         u8 target_temp_mask;
1036         u32 target_speed[NUM_FAN];
1037         u32 target_speed_tolerance[NUM_FAN];
1038         u8 speed_tolerance_limit;
1039
1040         u8 temp_tolerance[2][NUM_FAN];
1041         u8 tolerance_mask;
1042
1043         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1044
1045         /* Automatic fan speed control registers */
1046         int auto_pwm_num;
1047         u8 auto_pwm[NUM_FAN][7];
1048         u8 auto_temp[NUM_FAN][7];
1049         u8 pwm_temp_sel[NUM_FAN];
1050         u8 pwm_weight_temp_sel[NUM_FAN];
1051         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1052                                          * 2->temp_base
1053                                          */
1054
1055         u8 vid;
1056         u8 vrm;
1057
1058         bool have_vid;
1059
1060         u16 have_temp;
1061         u16 have_temp_fixed;
1062         u16 have_in;
1063
1064         /* Remember extra register values over suspend/resume */
1065         u8 vbat;
1066         u8 fandiv1;
1067         u8 fandiv2;
1068         u8 sio_reg_enable;
1069 };
1070
1071 struct nct6775_sio_data {
1072         int sioreg;
1073         enum kinds kind;
1074 };
1075
1076 #ifdef CONFIG_DEBUG_FS
1077
1078 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg);
1079 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg);
1080
1081 static const char *temp_attr_names[5] = {
1082         "input",
1083         "max",
1084         "hyst",
1085         "crit",
1086         "lcrit",
1087 };
1088
1089 static int nct6775_seq_show(struct seq_file *s, void *v)
1090 {
1091         struct device *dev = (struct device *)s->private;
1092         struct nct6775_data *data = dev_get_drvdata(dev);
1093         int i, j;
1094
1095         seq_printf(s, "Temperatures:\n");
1096         for (i = 0; i < NUM_TEMP; i++) {
1097                 if (!(data->have_temp & BIT(i)))
1098                         continue;
1099                 seq_printf(s, "  temp%d [source %d, %s]:\n", i + 1,
1100                            data->temp_src[i],
1101                            data->temp_label[data->temp_src[i]]);
1102                 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1103                         if (data->reg_temp[j][i]) {
1104                                 seq_printf(s, "    %s: reg=0x%x val=0x%x cached 0x%x\n",
1105                                            temp_attr_names[j],
1106                                            data->reg_temp[j][i],
1107                                            nct6775_read_temp(data, data->reg_temp[j][i]),
1108                                            (u16)data->temp[j][i]);
1109                         }
1110                 }
1111         }
1112         seq_printf(s, "Temperature sources:\n");
1113         for (i = 0; i < data->num_temp_alarms; i++) {
1114                 seq_printf(s, "  index %d register 0x%x: val=0x%x\n",
1115                            i, data->REG_TEMP_SOURCE[i],
1116                            nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f);
1117         }
1118         return 0;
1119 }
1120
1121 static int nct6775_debug_open(struct inode *inode, struct file *file)
1122 {
1123         return single_open(file, nct6775_seq_show, inode->i_private);
1124 }
1125
1126 static const struct file_operations nct6775_debug_operations = {
1127         .open           = nct6775_debug_open,
1128         .llseek         = seq_lseek,
1129         .read           = seq_read,
1130         .release        = single_release,
1131 };
1132
1133 static void nct6775_debugfs_exit(void *data)
1134 {
1135         debugfs_remove_recursive(data);
1136 }
1137
1138 static int nct6775_debugfs_init(struct device *dev)
1139 {
1140         struct dentry *rootdir;
1141
1142         rootdir = debugfs_create_dir(dev_name(dev), NULL);
1143         if (!rootdir)
1144                 return -ENOMEM;
1145
1146         devm_add_action(dev, nct6775_debugfs_exit, rootdir);
1147
1148         debugfs_create_file("registers", S_IFREG | 0444, rootdir,
1149                             dev, &nct6775_debug_operations);
1150
1151         return 0;
1152 }
1153
1154 #else
1155 static int nct6775_debugfs_init(struct device *dev) { return 0; }
1156 #endif
1157
1158 struct sensor_device_template {
1159         struct device_attribute dev_attr;
1160         union {
1161                 struct {
1162                         u8 nr;
1163                         u8 index;
1164                 } s;
1165                 int index;
1166         } u;
1167         bool s2;        /* true if both index and nr are used */
1168 };
1169
1170 struct sensor_device_attr_u {
1171         union {
1172                 struct sensor_device_attribute a1;
1173                 struct sensor_device_attribute_2 a2;
1174         } u;
1175         char name[32];
1176 };
1177
1178 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1179         .attr = {.name = _template, .mode = _mode },            \
1180         .show   = _show,                                        \
1181         .store  = _store,                                       \
1182 }
1183
1184 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1185         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1186           .u.index = _index,                                            \
1187           .s2 = false }
1188
1189 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1190                                  _nr, _index)                           \
1191         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1192           .u.s.index = _index,                                          \
1193           .u.s.nr = _nr,                                                \
1194           .s2 = true }
1195
1196 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1197 static struct sensor_device_template sensor_dev_template_##_name        \
1198         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1199                                  _index)
1200
1201 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1202                           _nr, _index)                                  \
1203 static struct sensor_device_template sensor_dev_template_##_name        \
1204         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1205                                  _nr, _index)
1206
1207 struct sensor_template_group {
1208         struct sensor_device_template **templates;
1209         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1210         int base;
1211 };
1212
1213 static struct attribute_group *
1214 nct6775_create_attr_group(struct device *dev,
1215                           const struct sensor_template_group *tg,
1216                           int repeat)
1217 {
1218         struct attribute_group *group;
1219         struct sensor_device_attr_u *su;
1220         struct sensor_device_attribute *a;
1221         struct sensor_device_attribute_2 *a2;
1222         struct attribute **attrs;
1223         struct sensor_device_template **t;
1224         int i, count;
1225
1226         if (repeat <= 0)
1227                 return ERR_PTR(-EINVAL);
1228
1229         t = tg->templates;
1230         for (count = 0; *t; t++, count++)
1231                 ;
1232
1233         if (count == 0)
1234                 return ERR_PTR(-EINVAL);
1235
1236         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1237         if (group == NULL)
1238                 return ERR_PTR(-ENOMEM);
1239
1240         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1241                              GFP_KERNEL);
1242         if (attrs == NULL)
1243                 return ERR_PTR(-ENOMEM);
1244
1245         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1246                                GFP_KERNEL);
1247         if (su == NULL)
1248                 return ERR_PTR(-ENOMEM);
1249
1250         group->attrs = attrs;
1251         group->is_visible = tg->is_visible;
1252
1253         for (i = 0; i < repeat; i++) {
1254                 t = tg->templates;
1255                 while (*t != NULL) {
1256                         snprintf(su->name, sizeof(su->name),
1257                                  (*t)->dev_attr.attr.name, tg->base + i);
1258                         if ((*t)->s2) {
1259                                 a2 = &su->u.a2;
1260                                 sysfs_attr_init(&a2->dev_attr.attr);
1261                                 a2->dev_attr.attr.name = su->name;
1262                                 a2->nr = (*t)->u.s.nr + i;
1263                                 a2->index = (*t)->u.s.index;
1264                                 a2->dev_attr.attr.mode =
1265                                   (*t)->dev_attr.attr.mode;
1266                                 a2->dev_attr.show = (*t)->dev_attr.show;
1267                                 a2->dev_attr.store = (*t)->dev_attr.store;
1268                                 *attrs = &a2->dev_attr.attr;
1269                         } else {
1270                                 a = &su->u.a1;
1271                                 sysfs_attr_init(&a->dev_attr.attr);
1272                                 a->dev_attr.attr.name = su->name;
1273                                 a->index = (*t)->u.index + i;
1274                                 a->dev_attr.attr.mode =
1275                                   (*t)->dev_attr.attr.mode;
1276                                 a->dev_attr.show = (*t)->dev_attr.show;
1277                                 a->dev_attr.store = (*t)->dev_attr.store;
1278                                 *attrs = &a->dev_attr.attr;
1279                         }
1280                         attrs++;
1281                         su++;
1282                         t++;
1283                 }
1284         }
1285
1286         return group;
1287 }
1288
1289 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1290 {
1291         switch (data->kind) {
1292         case nct6106:
1293                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1294                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1295                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1296         case nct6775:
1297                 return (((reg & 0xff00) == 0x100 ||
1298                     (reg & 0xff00) == 0x200) &&
1299                    ((reg & 0x00ff) == 0x50 ||
1300                     (reg & 0x00ff) == 0x53 ||
1301                     (reg & 0x00ff) == 0x55)) ||
1302                   (reg & 0xfff0) == 0x630 ||
1303                   reg == 0x640 || reg == 0x642 ||
1304                   reg == 0x662 ||
1305                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1306                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1307         case nct6776:
1308                 return (((reg & 0xff00) == 0x100 ||
1309                     (reg & 0xff00) == 0x200) &&
1310                    ((reg & 0x00ff) == 0x50 ||
1311                     (reg & 0x00ff) == 0x53 ||
1312                     (reg & 0x00ff) == 0x55)) ||
1313                   (reg & 0xfff0) == 0x630 ||
1314                   reg == 0x402 ||
1315                   reg == 0x640 || reg == 0x642 ||
1316                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1317                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1318         case nct6779:
1319         case nct6791:
1320         case nct6792:
1321         case nct6793:
1322         case nct6795:
1323                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1324                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1325                   reg == 0x402 ||
1326                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1327                   reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1328                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1329                   reg == 0x7b || reg == 0x7d;
1330         }
1331         return false;
1332 }
1333
1334 /*
1335  * On older chips, only registers 0x50-0x5f are banked.
1336  * On more recent chips, all registers are banked.
1337  * Assume that is the case and set the bank number for each access.
1338  * Cache the bank number so it only needs to be set if it changes.
1339  */
1340 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1341 {
1342         u8 bank = reg >> 8;
1343
1344         if (data->bank != bank) {
1345                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1346                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1347                 data->bank = bank;
1348         }
1349 }
1350
1351 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1352 {
1353         int res, word_sized = is_word_sized(data, reg);
1354
1355         nct6775_set_bank(data, reg);
1356         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1357         res = inb_p(data->addr + DATA_REG_OFFSET);
1358         if (word_sized) {
1359                 outb_p((reg & 0xff) + 1,
1360                        data->addr + ADDR_REG_OFFSET);
1361                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1362         }
1363         return res;
1364 }
1365
1366 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1367 {
1368         int word_sized = is_word_sized(data, reg);
1369
1370         nct6775_set_bank(data, reg);
1371         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1372         if (word_sized) {
1373                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1374                 outb_p((reg & 0xff) + 1,
1375                        data->addr + ADDR_REG_OFFSET);
1376         }
1377         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1378         return 0;
1379 }
1380
1381 /* We left-align 8-bit temperature values to make the code simpler */
1382 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1383 {
1384         u16 res;
1385
1386         res = nct6775_read_value(data, reg);
1387         if (!is_word_sized(data, reg))
1388                 res <<= 8;
1389
1390         return res;
1391 }
1392
1393 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1394 {
1395         if (!is_word_sized(data, reg))
1396                 value >>= 8;
1397         return nct6775_write_value(data, reg, value);
1398 }
1399
1400 /* This function assumes that the caller holds data->update_lock */
1401 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1402 {
1403         u8 reg;
1404
1405         switch (nr) {
1406         case 0:
1407                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1408                     | (data->fan_div[0] & 0x7);
1409                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1410                 break;
1411         case 1:
1412                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1413                     | ((data->fan_div[1] << 4) & 0x70);
1414                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1415                 break;
1416         case 2:
1417                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1418                     | (data->fan_div[2] & 0x7);
1419                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1420                 break;
1421         case 3:
1422                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1423                     | ((data->fan_div[3] << 4) & 0x70);
1424                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1425                 break;
1426         }
1427 }
1428
1429 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1430 {
1431         if (data->kind == nct6775)
1432                 nct6775_write_fan_div(data, nr);
1433 }
1434
1435 static void nct6775_update_fan_div(struct nct6775_data *data)
1436 {
1437         u8 i;
1438
1439         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1440         data->fan_div[0] = i & 0x7;
1441         data->fan_div[1] = (i & 0x70) >> 4;
1442         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1443         data->fan_div[2] = i & 0x7;
1444         if (data->has_fan & BIT(3))
1445                 data->fan_div[3] = (i & 0x70) >> 4;
1446 }
1447
1448 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1449 {
1450         if (data->kind == nct6775)
1451                 nct6775_update_fan_div(data);
1452 }
1453
1454 static void nct6775_init_fan_div(struct nct6775_data *data)
1455 {
1456         int i;
1457
1458         nct6775_update_fan_div_common(data);
1459         /*
1460          * For all fans, start with highest divider value if the divider
1461          * register is not initialized. This ensures that we get a
1462          * reading from the fan count register, even if it is not optimal.
1463          * We'll compute a better divider later on.
1464          */
1465         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1466                 if (!(data->has_fan & BIT(i)))
1467                         continue;
1468                 if (data->fan_div[i] == 0) {
1469                         data->fan_div[i] = 7;
1470                         nct6775_write_fan_div_common(data, i);
1471                 }
1472         }
1473 }
1474
1475 static void nct6775_init_fan_common(struct device *dev,
1476                                     struct nct6775_data *data)
1477 {
1478         int i;
1479         u8 reg;
1480
1481         if (data->has_fan_div)
1482                 nct6775_init_fan_div(data);
1483
1484         /*
1485          * If fan_min is not set (0), set it to 0xff to disable it. This
1486          * prevents the unnecessary warning when fanX_min is reported as 0.
1487          */
1488         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1489                 if (data->has_fan_min & BIT(i)) {
1490                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1491                         if (!reg)
1492                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1493                                                     data->has_fan_div ? 0xff
1494                                                                       : 0xff1f);
1495                 }
1496         }
1497 }
1498
1499 static void nct6775_select_fan_div(struct device *dev,
1500                                    struct nct6775_data *data, int nr, u16 reg)
1501 {
1502         u8 fan_div = data->fan_div[nr];
1503         u16 fan_min;
1504
1505         if (!data->has_fan_div)
1506                 return;
1507
1508         /*
1509          * If we failed to measure the fan speed, or the reported value is not
1510          * in the optimal range, and the clock divider can be modified,
1511          * let's try that for next time.
1512          */
1513         if (reg == 0x00 && fan_div < 0x07)
1514                 fan_div++;
1515         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1516                 fan_div--;
1517
1518         if (fan_div != data->fan_div[nr]) {
1519                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1520                         nr + 1, div_from_reg(data->fan_div[nr]),
1521                         div_from_reg(fan_div));
1522
1523                 /* Preserve min limit if possible */
1524                 if (data->has_fan_min & BIT(nr)) {
1525                         fan_min = data->fan_min[nr];
1526                         if (fan_div > data->fan_div[nr]) {
1527                                 if (fan_min != 255 && fan_min > 1)
1528                                         fan_min >>= 1;
1529                         } else {
1530                                 if (fan_min != 255) {
1531                                         fan_min <<= 1;
1532                                         if (fan_min > 254)
1533                                                 fan_min = 254;
1534                                 }
1535                         }
1536                         if (fan_min != data->fan_min[nr]) {
1537                                 data->fan_min[nr] = fan_min;
1538                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1539                                                     fan_min);
1540                         }
1541                 }
1542                 data->fan_div[nr] = fan_div;
1543                 nct6775_write_fan_div_common(data, nr);
1544         }
1545 }
1546
1547 static void nct6775_update_pwm(struct device *dev)
1548 {
1549         struct nct6775_data *data = dev_get_drvdata(dev);
1550         int i, j;
1551         int fanmodecfg, reg;
1552         bool duty_is_dc;
1553
1554         for (i = 0; i < data->pwm_num; i++) {
1555                 if (!(data->has_pwm & BIT(i)))
1556                         continue;
1557
1558                 duty_is_dc = data->REG_PWM_MODE[i] &&
1559                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1560                    & data->PWM_MODE_MASK[i]);
1561                 data->pwm_mode[i] = duty_is_dc;
1562
1563                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1564                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1565                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1566                                 data->pwm[j][i]
1567                                   = nct6775_read_value(data,
1568                                                        data->REG_PWM[j][i]);
1569                         }
1570                 }
1571
1572                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1573                                                         (fanmodecfg >> 4) & 7);
1574
1575                 if (!data->temp_tolerance[0][i] ||
1576                     data->pwm_enable[i] != speed_cruise)
1577                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1578                 if (!data->target_speed_tolerance[i] ||
1579                     data->pwm_enable[i] == speed_cruise) {
1580                         u8 t = fanmodecfg & 0x0f;
1581
1582                         if (data->REG_TOLERANCE_H) {
1583                                 t |= (nct6775_read_value(data,
1584                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1585                         }
1586                         data->target_speed_tolerance[i] = t;
1587                 }
1588
1589                 data->temp_tolerance[1][i] =
1590                         nct6775_read_value(data,
1591                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1592
1593                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1594                 data->pwm_temp_sel[i] = reg & 0x1f;
1595                 /* If fan can stop, report floor as 0 */
1596                 if (reg & 0x80)
1597                         data->pwm[2][i] = 0;
1598
1599                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1600                         continue;
1601
1602                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1603                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1604                 /* If weight is disabled, report weight source as 0 */
1605                 if (j == 1 && !(reg & 0x80))
1606                         data->pwm_weight_temp_sel[i] = 0;
1607
1608                 /* Weight temp data */
1609                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1610                         data->weight_temp[j][i]
1611                           = nct6775_read_value(data,
1612                                                data->REG_WEIGHT_TEMP[j][i]);
1613                 }
1614         }
1615 }
1616
1617 static void nct6775_update_pwm_limits(struct device *dev)
1618 {
1619         struct nct6775_data *data = dev_get_drvdata(dev);
1620         int i, j;
1621         u8 reg;
1622         u16 reg_t;
1623
1624         for (i = 0; i < data->pwm_num; i++) {
1625                 if (!(data->has_pwm & BIT(i)))
1626                         continue;
1627
1628                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1629                         data->fan_time[j][i] =
1630                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1631                 }
1632
1633                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1634                 /* Update only in matching mode or if never updated */
1635                 if (!data->target_temp[i] ||
1636                     data->pwm_enable[i] == thermal_cruise)
1637                         data->target_temp[i] = reg_t & data->target_temp_mask;
1638                 if (!data->target_speed[i] ||
1639                     data->pwm_enable[i] == speed_cruise) {
1640                         if (data->REG_TOLERANCE_H) {
1641                                 reg_t |= (nct6775_read_value(data,
1642                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1643                         }
1644                         data->target_speed[i] = reg_t;
1645                 }
1646
1647                 for (j = 0; j < data->auto_pwm_num; j++) {
1648                         data->auto_pwm[i][j] =
1649                           nct6775_read_value(data,
1650                                              NCT6775_AUTO_PWM(data, i, j));
1651                         data->auto_temp[i][j] =
1652                           nct6775_read_value(data,
1653                                              NCT6775_AUTO_TEMP(data, i, j));
1654                 }
1655
1656                 /* critical auto_pwm temperature data */
1657                 data->auto_temp[i][data->auto_pwm_num] =
1658                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1659
1660                 switch (data->kind) {
1661                 case nct6775:
1662                         reg = nct6775_read_value(data,
1663                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1664                         data->auto_pwm[i][data->auto_pwm_num] =
1665                                                 (reg & 0x02) ? 0xff : 0x00;
1666                         break;
1667                 case nct6776:
1668                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1669                         break;
1670                 case nct6106:
1671                 case nct6779:
1672                 case nct6791:
1673                 case nct6792:
1674                 case nct6793:
1675                 case nct6795:
1676                         reg = nct6775_read_value(data,
1677                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1678                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1679                                 reg = nct6775_read_value(data,
1680                                         data->REG_CRITICAL_PWM[i]);
1681                         else
1682                                 reg = 0xff;
1683                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1684                         break;
1685                 }
1686         }
1687 }
1688
1689 static struct nct6775_data *nct6775_update_device(struct device *dev)
1690 {
1691         struct nct6775_data *data = dev_get_drvdata(dev);
1692         int i, j;
1693
1694         mutex_lock(&data->update_lock);
1695
1696         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1697             || !data->valid) {
1698                 /* Fan clock dividers */
1699                 nct6775_update_fan_div_common(data);
1700
1701                 /* Measured voltages and limits */
1702                 for (i = 0; i < data->in_num; i++) {
1703                         if (!(data->have_in & BIT(i)))
1704                                 continue;
1705
1706                         data->in[i][0] = nct6775_read_value(data,
1707                                                             data->REG_VIN[i]);
1708                         data->in[i][1] = nct6775_read_value(data,
1709                                           data->REG_IN_MINMAX[0][i]);
1710                         data->in[i][2] = nct6775_read_value(data,
1711                                           data->REG_IN_MINMAX[1][i]);
1712                 }
1713
1714                 /* Measured fan speeds and limits */
1715                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1716                         u16 reg;
1717
1718                         if (!(data->has_fan & BIT(i)))
1719                                 continue;
1720
1721                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1722                         data->rpm[i] = data->fan_from_reg(reg,
1723                                                           data->fan_div[i]);
1724
1725                         if (data->has_fan_min & BIT(i))
1726                                 data->fan_min[i] = nct6775_read_value(data,
1727                                            data->REG_FAN_MIN[i]);
1728                         data->fan_pulses[i] =
1729                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1730                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1731
1732                         nct6775_select_fan_div(dev, data, i, reg);
1733                 }
1734
1735                 nct6775_update_pwm(dev);
1736                 nct6775_update_pwm_limits(dev);
1737
1738                 /* Measured temperatures and limits */
1739                 for (i = 0; i < NUM_TEMP; i++) {
1740                         if (!(data->have_temp & BIT(i)))
1741                                 continue;
1742                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1743                                 if (data->reg_temp[j][i])
1744                                         data->temp[j][i]
1745                                           = nct6775_read_temp(data,
1746                                                 data->reg_temp[j][i]);
1747                         }
1748                         if (i >= NUM_TEMP_FIXED ||
1749                             !(data->have_temp_fixed & BIT(i)))
1750                                 continue;
1751                         data->temp_offset[i]
1752                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1753                 }
1754
1755                 data->alarms = 0;
1756                 for (i = 0; i < NUM_REG_ALARM; i++) {
1757                         u8 alarm;
1758
1759                         if (!data->REG_ALARM[i])
1760                                 continue;
1761                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1762                         data->alarms |= ((u64)alarm) << (i << 3);
1763                 }
1764
1765                 data->beeps = 0;
1766                 for (i = 0; i < NUM_REG_BEEP; i++) {
1767                         u8 beep;
1768
1769                         if (!data->REG_BEEP[i])
1770                                 continue;
1771                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1772                         data->beeps |= ((u64)beep) << (i << 3);
1773                 }
1774
1775                 data->last_updated = jiffies;
1776                 data->valid = true;
1777         }
1778
1779         mutex_unlock(&data->update_lock);
1780         return data;
1781 }
1782
1783 /*
1784  * Sysfs callback functions
1785  */
1786 static ssize_t
1787 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1788 {
1789         struct nct6775_data *data = nct6775_update_device(dev);
1790         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1791         int index = sattr->index;
1792         int nr = sattr->nr;
1793
1794         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1795 }
1796
1797 static ssize_t
1798 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1799              size_t count)
1800 {
1801         struct nct6775_data *data = dev_get_drvdata(dev);
1802         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1803         int index = sattr->index;
1804         int nr = sattr->nr;
1805         unsigned long val;
1806         int err;
1807
1808         err = kstrtoul(buf, 10, &val);
1809         if (err < 0)
1810                 return err;
1811         mutex_lock(&data->update_lock);
1812         data->in[nr][index] = in_to_reg(val, nr);
1813         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1814                             data->in[nr][index]);
1815         mutex_unlock(&data->update_lock);
1816         return count;
1817 }
1818
1819 static ssize_t
1820 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1821 {
1822         struct nct6775_data *data = nct6775_update_device(dev);
1823         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1824         int nr = data->ALARM_BITS[sattr->index];
1825
1826         return sprintf(buf, "%u\n",
1827                        (unsigned int)((data->alarms >> nr) & 0x01));
1828 }
1829
1830 static int find_temp_source(struct nct6775_data *data, int index, int count)
1831 {
1832         int source = data->temp_src[index];
1833         int nr;
1834
1835         for (nr = 0; nr < count; nr++) {
1836                 int src;
1837
1838                 src = nct6775_read_value(data,
1839                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1840                 if (src == source)
1841                         return nr;
1842         }
1843         return -ENODEV;
1844 }
1845
1846 static ssize_t
1847 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1848 {
1849         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1850         struct nct6775_data *data = nct6775_update_device(dev);
1851         unsigned int alarm = 0;
1852         int nr;
1853
1854         /*
1855          * For temperatures, there is no fixed mapping from registers to alarm
1856          * bits. Alarm bits are determined by the temperature source mapping.
1857          */
1858         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1859         if (nr >= 0) {
1860                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1861
1862                 alarm = (data->alarms >> bit) & 0x01;
1863         }
1864         return sprintf(buf, "%u\n", alarm);
1865 }
1866
1867 static ssize_t
1868 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1869 {
1870         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1871         struct nct6775_data *data = nct6775_update_device(dev);
1872         int nr = data->BEEP_BITS[sattr->index];
1873
1874         return sprintf(buf, "%u\n",
1875                        (unsigned int)((data->beeps >> nr) & 0x01));
1876 }
1877
1878 static ssize_t
1879 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1880            size_t count)
1881 {
1882         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1883         struct nct6775_data *data = dev_get_drvdata(dev);
1884         int nr = data->BEEP_BITS[sattr->index];
1885         int regindex = nr >> 3;
1886         unsigned long val;
1887         int err;
1888
1889         err = kstrtoul(buf, 10, &val);
1890         if (err < 0)
1891                 return err;
1892         if (val > 1)
1893                 return -EINVAL;
1894
1895         mutex_lock(&data->update_lock);
1896         if (val)
1897                 data->beeps |= (1ULL << nr);
1898         else
1899                 data->beeps &= ~(1ULL << nr);
1900         nct6775_write_value(data, data->REG_BEEP[regindex],
1901                             (data->beeps >> (regindex << 3)) & 0xff);
1902         mutex_unlock(&data->update_lock);
1903         return count;
1904 }
1905
1906 static ssize_t
1907 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1908 {
1909         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1910         struct nct6775_data *data = nct6775_update_device(dev);
1911         unsigned int beep = 0;
1912         int nr;
1913
1914         /*
1915          * For temperatures, there is no fixed mapping from registers to beep
1916          * enable bits. Beep enable bits are determined by the temperature
1917          * source mapping.
1918          */
1919         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1920         if (nr >= 0) {
1921                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1922
1923                 beep = (data->beeps >> bit) & 0x01;
1924         }
1925         return sprintf(buf, "%u\n", beep);
1926 }
1927
1928 static ssize_t
1929 store_temp_beep(struct device *dev, struct device_attribute *attr,
1930                 const char *buf, size_t count)
1931 {
1932         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1933         struct nct6775_data *data = dev_get_drvdata(dev);
1934         int nr, bit, regindex;
1935         unsigned long val;
1936         int err;
1937
1938         err = kstrtoul(buf, 10, &val);
1939         if (err < 0)
1940                 return err;
1941         if (val > 1)
1942                 return -EINVAL;
1943
1944         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1945         if (nr < 0)
1946                 return nr;
1947
1948         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1949         regindex = bit >> 3;
1950
1951         mutex_lock(&data->update_lock);
1952         if (val)
1953                 data->beeps |= (1ULL << bit);
1954         else
1955                 data->beeps &= ~(1ULL << bit);
1956         nct6775_write_value(data, data->REG_BEEP[regindex],
1957                             (data->beeps >> (regindex << 3)) & 0xff);
1958         mutex_unlock(&data->update_lock);
1959
1960         return count;
1961 }
1962
1963 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1964                                      struct attribute *attr, int index)
1965 {
1966         struct device *dev = container_of(kobj, struct device, kobj);
1967         struct nct6775_data *data = dev_get_drvdata(dev);
1968         int in = index / 5;     /* voltage index */
1969
1970         if (!(data->have_in & BIT(in)))
1971                 return 0;
1972
1973         return attr->mode;
1974 }
1975
1976 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1977 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1978 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1979                 0);
1980 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1981                   store_in_reg, 0, 1);
1982 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1983                   store_in_reg, 0, 2);
1984
1985 /*
1986  * nct6775_in_is_visible uses the index into the following array
1987  * to determine if attributes should be created or not.
1988  * Any change in order or content must be matched.
1989  */
1990 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1991         &sensor_dev_template_in_input,
1992         &sensor_dev_template_in_alarm,
1993         &sensor_dev_template_in_beep,
1994         &sensor_dev_template_in_min,
1995         &sensor_dev_template_in_max,
1996         NULL
1997 };
1998
1999 static const struct sensor_template_group nct6775_in_template_group = {
2000         .templates = nct6775_attributes_in_template,
2001         .is_visible = nct6775_in_is_visible,
2002 };
2003
2004 static ssize_t
2005 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
2006 {
2007         struct nct6775_data *data = nct6775_update_device(dev);
2008         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2009         int nr = sattr->index;
2010
2011         return sprintf(buf, "%d\n", data->rpm[nr]);
2012 }
2013
2014 static ssize_t
2015 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
2016 {
2017         struct nct6775_data *data = nct6775_update_device(dev);
2018         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2019         int nr = sattr->index;
2020
2021         return sprintf(buf, "%d\n",
2022                        data->fan_from_reg_min(data->fan_min[nr],
2023                                               data->fan_div[nr]));
2024 }
2025
2026 static ssize_t
2027 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
2028 {
2029         struct nct6775_data *data = nct6775_update_device(dev);
2030         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2031         int nr = sattr->index;
2032
2033         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
2034 }
2035
2036 static ssize_t
2037 store_fan_min(struct device *dev, struct device_attribute *attr,
2038               const char *buf, size_t count)
2039 {
2040         struct nct6775_data *data = dev_get_drvdata(dev);
2041         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2042         int nr = sattr->index;
2043         unsigned long val;
2044         unsigned int reg;
2045         u8 new_div;
2046         int err;
2047
2048         err = kstrtoul(buf, 10, &val);
2049         if (err < 0)
2050                 return err;
2051
2052         mutex_lock(&data->update_lock);
2053         if (!data->has_fan_div) {
2054                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
2055                 if (!val) {
2056                         val = 0xff1f;
2057                 } else {
2058                         if (val > 1350000U)
2059                                 val = 135000U;
2060                         val = 1350000U / val;
2061                         val = (val & 0x1f) | ((val << 3) & 0xff00);
2062                 }
2063                 data->fan_min[nr] = val;
2064                 goto write_min; /* Leave fan divider alone */
2065         }
2066         if (!val) {
2067                 /* No min limit, alarm disabled */
2068                 data->fan_min[nr] = 255;
2069                 new_div = data->fan_div[nr]; /* No change */
2070                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2071                 goto write_div;
2072         }
2073         reg = 1350000U / val;
2074         if (reg >= 128 * 255) {
2075                 /*
2076                  * Speed below this value cannot possibly be represented,
2077                  * even with the highest divider (128)
2078                  */
2079                 data->fan_min[nr] = 254;
2080                 new_div = 7; /* 128 == BIT(7) */
2081                 dev_warn(dev,
2082                          "fan%u low limit %lu below minimum %u, set to minimum\n",
2083                          nr + 1, val, data->fan_from_reg_min(254, 7));
2084         } else if (!reg) {
2085                 /*
2086                  * Speed above this value cannot possibly be represented,
2087                  * even with the lowest divider (1)
2088                  */
2089                 data->fan_min[nr] = 1;
2090                 new_div = 0; /* 1 == BIT(0) */
2091                 dev_warn(dev,
2092                          "fan%u low limit %lu above maximum %u, set to maximum\n",
2093                          nr + 1, val, data->fan_from_reg_min(1, 0));
2094         } else {
2095                 /*
2096                  * Automatically pick the best divider, i.e. the one such
2097                  * that the min limit will correspond to a register value
2098                  * in the 96..192 range
2099                  */
2100                 new_div = 0;
2101                 while (reg > 192 && new_div < 7) {
2102                         reg >>= 1;
2103                         new_div++;
2104                 }
2105                 data->fan_min[nr] = reg;
2106         }
2107
2108 write_div:
2109         /*
2110          * Write both the fan clock divider (if it changed) and the new
2111          * fan min (unconditionally)
2112          */
2113         if (new_div != data->fan_div[nr]) {
2114                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2115                         nr + 1, div_from_reg(data->fan_div[nr]),
2116                         div_from_reg(new_div));
2117                 data->fan_div[nr] = new_div;
2118                 nct6775_write_fan_div_common(data, nr);
2119                 /* Give the chip time to sample a new speed value */
2120                 data->last_updated = jiffies;
2121         }
2122
2123 write_min:
2124         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2125         mutex_unlock(&data->update_lock);
2126
2127         return count;
2128 }
2129
2130 static ssize_t
2131 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2132 {
2133         struct nct6775_data *data = nct6775_update_device(dev);
2134         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2135         int p = data->fan_pulses[sattr->index];
2136
2137         return sprintf(buf, "%d\n", p ? : 4);
2138 }
2139
2140 static ssize_t
2141 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2142                  const char *buf, size_t count)
2143 {
2144         struct nct6775_data *data = dev_get_drvdata(dev);
2145         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2146         int nr = sattr->index;
2147         unsigned long val;
2148         int err;
2149         u8 reg;
2150
2151         err = kstrtoul(buf, 10, &val);
2152         if (err < 0)
2153                 return err;
2154
2155         if (val > 4)
2156                 return -EINVAL;
2157
2158         mutex_lock(&data->update_lock);
2159         data->fan_pulses[nr] = val & 3;
2160         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2161         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2162         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2163         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2164         mutex_unlock(&data->update_lock);
2165
2166         return count;
2167 }
2168
2169 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2170                                       struct attribute *attr, int index)
2171 {
2172         struct device *dev = container_of(kobj, struct device, kobj);
2173         struct nct6775_data *data = dev_get_drvdata(dev);
2174         int fan = index / 6;    /* fan index */
2175         int nr = index % 6;     /* attribute index */
2176
2177         if (!(data->has_fan & BIT(fan)))
2178                 return 0;
2179
2180         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2181                 return 0;
2182         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2183                 return 0;
2184         if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2185                 return 0;
2186         if (nr == 5 && data->kind != nct6775)
2187                 return 0;
2188
2189         return attr->mode;
2190 }
2191
2192 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2193 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2194                 FAN_ALARM_BASE);
2195 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2196                 store_beep, FAN_ALARM_BASE);
2197 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2198                 store_fan_pulses, 0);
2199 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2200                 store_fan_min, 0);
2201 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2202
2203 /*
2204  * nct6775_fan_is_visible uses the index into the following array
2205  * to determine if attributes should be created or not.
2206  * Any change in order or content must be matched.
2207  */
2208 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2209         &sensor_dev_template_fan_input,
2210         &sensor_dev_template_fan_alarm, /* 1 */
2211         &sensor_dev_template_fan_beep,  /* 2 */
2212         &sensor_dev_template_fan_pulses,
2213         &sensor_dev_template_fan_min,   /* 4 */
2214         &sensor_dev_template_fan_div,   /* 5 */
2215         NULL
2216 };
2217
2218 static const struct sensor_template_group nct6775_fan_template_group = {
2219         .templates = nct6775_attributes_fan_template,
2220         .is_visible = nct6775_fan_is_visible,
2221         .base = 1,
2222 };
2223
2224 static ssize_t
2225 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2226 {
2227         struct nct6775_data *data = nct6775_update_device(dev);
2228         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2229         int nr = sattr->index;
2230
2231         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2232 }
2233
2234 static ssize_t
2235 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2236 {
2237         struct nct6775_data *data = nct6775_update_device(dev);
2238         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2239         int nr = sattr->nr;
2240         int index = sattr->index;
2241
2242         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2243 }
2244
2245 static ssize_t
2246 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2247            size_t count)
2248 {
2249         struct nct6775_data *data = dev_get_drvdata(dev);
2250         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2251         int nr = sattr->nr;
2252         int index = sattr->index;
2253         int err;
2254         long val;
2255
2256         err = kstrtol(buf, 10, &val);
2257         if (err < 0)
2258                 return err;
2259
2260         mutex_lock(&data->update_lock);
2261         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2262         nct6775_write_temp(data, data->reg_temp[index][nr],
2263                            data->temp[index][nr]);
2264         mutex_unlock(&data->update_lock);
2265         return count;
2266 }
2267
2268 static ssize_t
2269 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2270 {
2271         struct nct6775_data *data = nct6775_update_device(dev);
2272         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2273
2274         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2275 }
2276
2277 static ssize_t
2278 store_temp_offset(struct device *dev, struct device_attribute *attr,
2279                   const char *buf, size_t count)
2280 {
2281         struct nct6775_data *data = dev_get_drvdata(dev);
2282         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2283         int nr = sattr->index;
2284         long val;
2285         int err;
2286
2287         err = kstrtol(buf, 10, &val);
2288         if (err < 0)
2289                 return err;
2290
2291         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2292
2293         mutex_lock(&data->update_lock);
2294         data->temp_offset[nr] = val;
2295         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2296         mutex_unlock(&data->update_lock);
2297
2298         return count;
2299 }
2300
2301 static ssize_t
2302 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2303 {
2304         struct nct6775_data *data = nct6775_update_device(dev);
2305         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2306         int nr = sattr->index;
2307
2308         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2309 }
2310
2311 static ssize_t
2312 store_temp_type(struct device *dev, struct device_attribute *attr,
2313                 const char *buf, size_t count)
2314 {
2315         struct nct6775_data *data = nct6775_update_device(dev);
2316         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2317         int nr = sattr->index;
2318         unsigned long val;
2319         int err;
2320         u8 vbat, diode, vbit, dbit;
2321
2322         err = kstrtoul(buf, 10, &val);
2323         if (err < 0)
2324                 return err;
2325
2326         if (val != 1 && val != 3 && val != 4)
2327                 return -EINVAL;
2328
2329         mutex_lock(&data->update_lock);
2330
2331         data->temp_type[nr] = val;
2332         vbit = 0x02 << nr;
2333         dbit = data->DIODE_MASK << nr;
2334         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2335         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2336         switch (val) {
2337         case 1: /* CPU diode (diode, current mode) */
2338                 vbat |= vbit;
2339                 diode |= dbit;
2340                 break;
2341         case 3: /* diode, voltage mode */
2342                 vbat |= dbit;
2343                 break;
2344         case 4: /* thermistor */
2345                 break;
2346         }
2347         nct6775_write_value(data, data->REG_VBAT, vbat);
2348         nct6775_write_value(data, data->REG_DIODE, diode);
2349
2350         mutex_unlock(&data->update_lock);
2351         return count;
2352 }
2353
2354 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2355                                        struct attribute *attr, int index)
2356 {
2357         struct device *dev = container_of(kobj, struct device, kobj);
2358         struct nct6775_data *data = dev_get_drvdata(dev);
2359         int temp = index / 10;  /* temp index */
2360         int nr = index % 10;    /* attribute index */
2361
2362         if (!(data->have_temp & BIT(temp)))
2363                 return 0;
2364
2365         if (nr == 1 && !data->temp_label)
2366                 return 0;
2367
2368         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2369                 return 0;                               /* alarm */
2370
2371         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2372                 return 0;                               /* beep */
2373
2374         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2375                 return 0;
2376
2377         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2378                 return 0;
2379
2380         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2381                 return 0;
2382
2383         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2384                 return 0;
2385
2386         /* offset and type only apply to fixed sensors */
2387         if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2388                 return 0;
2389
2390         return attr->mode;
2391 }
2392
2393 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2394 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2395 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2396                   store_temp, 0, 1);
2397 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2398                   show_temp, store_temp, 0, 2);
2399 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2400                   store_temp, 0, 3);
2401 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2402                   store_temp, 0, 4);
2403 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2404                 show_temp_offset, store_temp_offset, 0);
2405 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2406                 store_temp_type, 0);
2407 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2408 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2409                 store_temp_beep, 0);
2410
2411 /*
2412  * nct6775_temp_is_visible uses the index into the following array
2413  * to determine if attributes should be created or not.
2414  * Any change in order or content must be matched.
2415  */
2416 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2417         &sensor_dev_template_temp_input,
2418         &sensor_dev_template_temp_label,
2419         &sensor_dev_template_temp_alarm,        /* 2 */
2420         &sensor_dev_template_temp_beep,         /* 3 */
2421         &sensor_dev_template_temp_max,          /* 4 */
2422         &sensor_dev_template_temp_max_hyst,     /* 5 */
2423         &sensor_dev_template_temp_crit,         /* 6 */
2424         &sensor_dev_template_temp_lcrit,        /* 7 */
2425         &sensor_dev_template_temp_offset,       /* 8 */
2426         &sensor_dev_template_temp_type,         /* 9 */
2427         NULL
2428 };
2429
2430 static const struct sensor_template_group nct6775_temp_template_group = {
2431         .templates = nct6775_attributes_temp_template,
2432         .is_visible = nct6775_temp_is_visible,
2433         .base = 1,
2434 };
2435
2436 static ssize_t
2437 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2438 {
2439         struct nct6775_data *data = nct6775_update_device(dev);
2440         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2441
2442         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2443 }
2444
2445 static ssize_t
2446 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2447                const char *buf, size_t count)
2448 {
2449         struct nct6775_data *data = dev_get_drvdata(dev);
2450         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2451         int nr = sattr->index;
2452         unsigned long val;
2453         int err;
2454         u8 reg;
2455
2456         err = kstrtoul(buf, 10, &val);
2457         if (err < 0)
2458                 return err;
2459
2460         if (val > 1)
2461                 return -EINVAL;
2462
2463         /* Setting DC mode is not supported for all chips/channels */
2464         if (data->REG_PWM_MODE[nr] == 0) {
2465                 if (val)
2466                         return -EINVAL;
2467                 return count;
2468         }
2469
2470         mutex_lock(&data->update_lock);
2471         data->pwm_mode[nr] = val;
2472         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2473         reg &= ~data->PWM_MODE_MASK[nr];
2474         if (val)
2475                 reg |= data->PWM_MODE_MASK[nr];
2476         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2477         mutex_unlock(&data->update_lock);
2478         return count;
2479 }
2480
2481 static ssize_t
2482 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2483 {
2484         struct nct6775_data *data = nct6775_update_device(dev);
2485         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2486         int nr = sattr->nr;
2487         int index = sattr->index;
2488         int pwm;
2489
2490         /*
2491          * For automatic fan control modes, show current pwm readings.
2492          * Otherwise, show the configured value.
2493          */
2494         if (index == 0 && data->pwm_enable[nr] > manual)
2495                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2496         else
2497                 pwm = data->pwm[index][nr];
2498
2499         return sprintf(buf, "%d\n", pwm);
2500 }
2501
2502 static ssize_t
2503 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2504           size_t count)
2505 {
2506         struct nct6775_data *data = dev_get_drvdata(dev);
2507         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2508         int nr = sattr->nr;
2509         int index = sattr->index;
2510         unsigned long val;
2511         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2512         int maxval[7]
2513           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2514         int err;
2515         u8 reg;
2516
2517         err = kstrtoul(buf, 10, &val);
2518         if (err < 0)
2519                 return err;
2520         val = clamp_val(val, minval[index], maxval[index]);
2521
2522         mutex_lock(&data->update_lock);
2523         data->pwm[index][nr] = val;
2524         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2525         if (index == 2) { /* floor: disable if val == 0 */
2526                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2527                 reg &= 0x7f;
2528                 if (val)
2529                         reg |= 0x80;
2530                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2531         }
2532         mutex_unlock(&data->update_lock);
2533         return count;
2534 }
2535
2536 /* Returns 0 if OK, -EINVAL otherwise */
2537 static int check_trip_points(struct nct6775_data *data, int nr)
2538 {
2539         int i;
2540
2541         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2542                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2543                         return -EINVAL;
2544         }
2545         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2546                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2547                         return -EINVAL;
2548         }
2549         /* validate critical temperature and pwm if enabled (pwm > 0) */
2550         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2551                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2552                                 data->auto_temp[nr][data->auto_pwm_num] ||
2553                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2554                                 data->auto_pwm[nr][data->auto_pwm_num])
2555                         return -EINVAL;
2556         }
2557         return 0;
2558 }
2559
2560 static void pwm_update_registers(struct nct6775_data *data, int nr)
2561 {
2562         u8 reg;
2563
2564         switch (data->pwm_enable[nr]) {
2565         case off:
2566         case manual:
2567                 break;
2568         case speed_cruise:
2569                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2570                 reg = (reg & ~data->tolerance_mask) |
2571                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2572                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2573                 nct6775_write_value(data, data->REG_TARGET[nr],
2574                                     data->target_speed[nr] & 0xff);
2575                 if (data->REG_TOLERANCE_H) {
2576                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2577                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2578                         nct6775_write_value(data,
2579                                             data->REG_TOLERANCE_H[nr],
2580                                             reg);
2581                 }
2582                 break;
2583         case thermal_cruise:
2584                 nct6775_write_value(data, data->REG_TARGET[nr],
2585                                     data->target_temp[nr]);
2586                 /* intentional */
2587         default:
2588                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2589                 reg = (reg & ~data->tolerance_mask) |
2590                   data->temp_tolerance[0][nr];
2591                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2592                 break;
2593         }
2594 }
2595
2596 static ssize_t
2597 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2598 {
2599         struct nct6775_data *data = nct6775_update_device(dev);
2600         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2601
2602         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2603 }
2604
2605 static ssize_t
2606 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2607                  const char *buf, size_t count)
2608 {
2609         struct nct6775_data *data = dev_get_drvdata(dev);
2610         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2611         int nr = sattr->index;
2612         unsigned long val;
2613         int err;
2614         u16 reg;
2615
2616         err = kstrtoul(buf, 10, &val);
2617         if (err < 0)
2618                 return err;
2619
2620         if (val > sf4)
2621                 return -EINVAL;
2622
2623         if (val == sf3 && data->kind != nct6775)
2624                 return -EINVAL;
2625
2626         if (val == sf4 && check_trip_points(data, nr)) {
2627                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2628                 dev_err(dev, "Adjust trip points and try again\n");
2629                 return -EINVAL;
2630         }
2631
2632         mutex_lock(&data->update_lock);
2633         data->pwm_enable[nr] = val;
2634         if (val == off) {
2635                 /*
2636                  * turn off pwm control: select manual mode, set pwm to maximum
2637                  */
2638                 data->pwm[0][nr] = 255;
2639                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2640         }
2641         pwm_update_registers(data, nr);
2642         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2643         reg &= 0x0f;
2644         reg |= pwm_enable_to_reg(val) << 4;
2645         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2646         mutex_unlock(&data->update_lock);
2647         return count;
2648 }
2649
2650 static ssize_t
2651 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2652 {
2653         int i, sel = 0;
2654
2655         for (i = 0; i < NUM_TEMP; i++) {
2656                 if (!(data->have_temp & BIT(i)))
2657                         continue;
2658                 if (src == data->temp_src[i]) {
2659                         sel = i + 1;
2660                         break;
2661                 }
2662         }
2663
2664         return sprintf(buf, "%d\n", sel);
2665 }
2666
2667 static ssize_t
2668 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2669 {
2670         struct nct6775_data *data = nct6775_update_device(dev);
2671         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2672         int index = sattr->index;
2673
2674         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2675 }
2676
2677 static ssize_t
2678 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2679                    const char *buf, size_t count)
2680 {
2681         struct nct6775_data *data = nct6775_update_device(dev);
2682         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2683         int nr = sattr->index;
2684         unsigned long val;
2685         int err, reg, src;
2686
2687         err = kstrtoul(buf, 10, &val);
2688         if (err < 0)
2689                 return err;
2690         if (val == 0 || val > NUM_TEMP)
2691                 return -EINVAL;
2692         if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2693                 return -EINVAL;
2694
2695         mutex_lock(&data->update_lock);
2696         src = data->temp_src[val - 1];
2697         data->pwm_temp_sel[nr] = src;
2698         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2699         reg &= 0xe0;
2700         reg |= src;
2701         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2702         mutex_unlock(&data->update_lock);
2703
2704         return count;
2705 }
2706
2707 static ssize_t
2708 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2709                          char *buf)
2710 {
2711         struct nct6775_data *data = nct6775_update_device(dev);
2712         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2713         int index = sattr->index;
2714
2715         return show_pwm_temp_sel_common(data, buf,
2716                                         data->pwm_weight_temp_sel[index]);
2717 }
2718
2719 static ssize_t
2720 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2721                           const char *buf, size_t count)
2722 {
2723         struct nct6775_data *data = nct6775_update_device(dev);
2724         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2725         int nr = sattr->index;
2726         unsigned long val;
2727         int err, reg, src;
2728
2729         err = kstrtoul(buf, 10, &val);
2730         if (err < 0)
2731                 return err;
2732         if (val > NUM_TEMP)
2733                 return -EINVAL;
2734         if (val && (!(data->have_temp & BIT(val - 1)) ||
2735                     !data->temp_src[val - 1]))
2736                 return -EINVAL;
2737
2738         mutex_lock(&data->update_lock);
2739         if (val) {
2740                 src = data->temp_src[val - 1];
2741                 data->pwm_weight_temp_sel[nr] = src;
2742                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2743                 reg &= 0xe0;
2744                 reg |= (src | 0x80);
2745                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2746         } else {
2747                 data->pwm_weight_temp_sel[nr] = 0;
2748                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2749                 reg &= 0x7f;
2750                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2751         }
2752         mutex_unlock(&data->update_lock);
2753
2754         return count;
2755 }
2756
2757 static ssize_t
2758 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2759 {
2760         struct nct6775_data *data = nct6775_update_device(dev);
2761         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2762
2763         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2764 }
2765
2766 static ssize_t
2767 store_target_temp(struct device *dev, struct device_attribute *attr,
2768                   const char *buf, size_t count)
2769 {
2770         struct nct6775_data *data = dev_get_drvdata(dev);
2771         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2772         int nr = sattr->index;
2773         unsigned long val;
2774         int err;
2775
2776         err = kstrtoul(buf, 10, &val);
2777         if (err < 0)
2778                 return err;
2779
2780         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2781                         data->target_temp_mask);
2782
2783         mutex_lock(&data->update_lock);
2784         data->target_temp[nr] = val;
2785         pwm_update_registers(data, nr);
2786         mutex_unlock(&data->update_lock);
2787         return count;
2788 }
2789
2790 static ssize_t
2791 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2792 {
2793         struct nct6775_data *data = nct6775_update_device(dev);
2794         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2795         int nr = sattr->index;
2796
2797         return sprintf(buf, "%d\n",
2798                        fan_from_reg16(data->target_speed[nr],
2799                                       data->fan_div[nr]));
2800 }
2801
2802 static ssize_t
2803 store_target_speed(struct device *dev, struct device_attribute *attr,
2804                    const char *buf, size_t count)
2805 {
2806         struct nct6775_data *data = dev_get_drvdata(dev);
2807         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2808         int nr = sattr->index;
2809         unsigned long val;
2810         int err;
2811         u16 speed;
2812
2813         err = kstrtoul(buf, 10, &val);
2814         if (err < 0)
2815                 return err;
2816
2817         val = clamp_val(val, 0, 1350000U);
2818         speed = fan_to_reg(val, data->fan_div[nr]);
2819
2820         mutex_lock(&data->update_lock);
2821         data->target_speed[nr] = speed;
2822         pwm_update_registers(data, nr);
2823         mutex_unlock(&data->update_lock);
2824         return count;
2825 }
2826
2827 static ssize_t
2828 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2829                     char *buf)
2830 {
2831         struct nct6775_data *data = nct6775_update_device(dev);
2832         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2833         int nr = sattr->nr;
2834         int index = sattr->index;
2835
2836         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2837 }
2838
2839 static ssize_t
2840 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2841                      const char *buf, size_t count)
2842 {
2843         struct nct6775_data *data = dev_get_drvdata(dev);
2844         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2845         int nr = sattr->nr;
2846         int index = sattr->index;
2847         unsigned long val;
2848         int err;
2849
2850         err = kstrtoul(buf, 10, &val);
2851         if (err < 0)
2852                 return err;
2853
2854         /* Limit tolerance as needed */
2855         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2856
2857         mutex_lock(&data->update_lock);
2858         data->temp_tolerance[index][nr] = val;
2859         if (index)
2860                 pwm_update_registers(data, nr);
2861         else
2862                 nct6775_write_value(data,
2863                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2864                                     val);
2865         mutex_unlock(&data->update_lock);
2866         return count;
2867 }
2868
2869 /*
2870  * Fan speed tolerance is a tricky beast, since the associated register is
2871  * a tick counter, but the value is reported and configured as rpm.
2872  * Compute resulting low and high rpm values and report the difference.
2873  */
2874 static ssize_t
2875 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2876                      char *buf)
2877 {
2878         struct nct6775_data *data = nct6775_update_device(dev);
2879         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2880         int nr = sattr->index;
2881         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2882         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2883         int tolerance;
2884
2885         if (low <= 0)
2886                 low = 1;
2887         if (high > 0xffff)
2888                 high = 0xffff;
2889         if (high < low)
2890                 high = low;
2891
2892         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2893                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2894
2895         return sprintf(buf, "%d\n", tolerance);
2896 }
2897
2898 static ssize_t
2899 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2900                       const char *buf, size_t count)
2901 {
2902         struct nct6775_data *data = dev_get_drvdata(dev);
2903         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2904         int nr = sattr->index;
2905         unsigned long val;
2906         int err;
2907         int low, high;
2908
2909         err = kstrtoul(buf, 10, &val);
2910         if (err < 0)
2911                 return err;
2912
2913         high = fan_from_reg16(data->target_speed[nr],
2914                               data->fan_div[nr]) + val;
2915         low = fan_from_reg16(data->target_speed[nr],
2916                              data->fan_div[nr]) - val;
2917         if (low <= 0)
2918                 low = 1;
2919         if (high < low)
2920                 high = low;
2921
2922         val = (fan_to_reg(low, data->fan_div[nr]) -
2923                fan_to_reg(high, data->fan_div[nr])) / 2;
2924
2925         /* Limit tolerance as needed */
2926         val = clamp_val(val, 0, data->speed_tolerance_limit);
2927
2928         mutex_lock(&data->update_lock);
2929         data->target_speed_tolerance[nr] = val;
2930         pwm_update_registers(data, nr);
2931         mutex_unlock(&data->update_lock);
2932         return count;
2933 }
2934
2935 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2936 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2937                 store_pwm_mode, 0);
2938 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2939                 store_pwm_enable, 0);
2940 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2941                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2942 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2943                 show_target_temp, store_target_temp, 0);
2944 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2945                 show_target_speed, store_target_speed, 0);
2946 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2947                 show_speed_tolerance, store_speed_tolerance, 0);
2948
2949 /* Smart Fan registers */
2950
2951 static ssize_t
2952 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2953 {
2954         struct nct6775_data *data = nct6775_update_device(dev);
2955         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2956         int nr = sattr->nr;
2957         int index = sattr->index;
2958
2959         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2960 }
2961
2962 static ssize_t
2963 store_weight_temp(struct device *dev, struct device_attribute *attr,
2964                   const char *buf, size_t count)
2965 {
2966         struct nct6775_data *data = dev_get_drvdata(dev);
2967         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2968         int nr = sattr->nr;
2969         int index = sattr->index;
2970         unsigned long val;
2971         int err;
2972
2973         err = kstrtoul(buf, 10, &val);
2974         if (err < 0)
2975                 return err;
2976
2977         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2978
2979         mutex_lock(&data->update_lock);
2980         data->weight_temp[index][nr] = val;
2981         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2982         mutex_unlock(&data->update_lock);
2983         return count;
2984 }
2985
2986 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2987                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2988 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2989                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2990 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2991                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2992 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2993                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2994 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2995                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2996 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2997                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2998
2999 static ssize_t
3000 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3001 {
3002         struct nct6775_data *data = nct6775_update_device(dev);
3003         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3004         int nr = sattr->nr;
3005         int index = sattr->index;
3006
3007         return sprintf(buf, "%d\n",
3008                        step_time_from_reg(data->fan_time[index][nr],
3009                                           data->pwm_mode[nr]));
3010 }
3011
3012 static ssize_t
3013 store_fan_time(struct device *dev, struct device_attribute *attr,
3014                const char *buf, size_t count)
3015 {
3016         struct nct6775_data *data = dev_get_drvdata(dev);
3017         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3018         int nr = sattr->nr;
3019         int index = sattr->index;
3020         unsigned long val;
3021         int err;
3022
3023         err = kstrtoul(buf, 10, &val);
3024         if (err < 0)
3025                 return err;
3026
3027         val = step_time_to_reg(val, data->pwm_mode[nr]);
3028         mutex_lock(&data->update_lock);
3029         data->fan_time[index][nr] = val;
3030         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3031         mutex_unlock(&data->update_lock);
3032         return count;
3033 }
3034
3035 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3036 static ssize_t
3037 show_name(struct device *dev, struct device_attribute *attr, char *buf)
3038 {
3039         struct nct6775_data *data = dev_get_drvdata(dev);
3040
3041         return sprintf(buf, "%s\n", data->name);
3042 }
3043
3044 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
3045 #endif
3046
3047 static ssize_t
3048 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3049 {
3050         struct nct6775_data *data = nct6775_update_device(dev);
3051         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3052
3053         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3054 }
3055
3056 static ssize_t
3057 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3058                const char *buf, size_t count)
3059 {
3060         struct nct6775_data *data = dev_get_drvdata(dev);
3061         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3062         int nr = sattr->nr;
3063         int point = sattr->index;
3064         unsigned long val;
3065         int err;
3066         u8 reg;
3067
3068         err = kstrtoul(buf, 10, &val);
3069         if (err < 0)
3070                 return err;
3071         if (val > 255)
3072                 return -EINVAL;
3073
3074         if (point == data->auto_pwm_num) {
3075                 if (data->kind != nct6775 && !val)
3076                         return -EINVAL;
3077                 if (data->kind != nct6779 && val)
3078                         val = 0xff;
3079         }
3080
3081         mutex_lock(&data->update_lock);
3082         data->auto_pwm[nr][point] = val;
3083         if (point < data->auto_pwm_num) {
3084                 nct6775_write_value(data,
3085                                     NCT6775_AUTO_PWM(data, nr, point),
3086                                     data->auto_pwm[nr][point]);
3087         } else {
3088                 switch (data->kind) {
3089                 case nct6775:
3090                         /* disable if needed (pwm == 0) */
3091                         reg = nct6775_read_value(data,
3092                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
3093                         if (val)
3094                                 reg |= 0x02;
3095                         else
3096                                 reg &= ~0x02;
3097                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3098                                             reg);
3099                         break;
3100                 case nct6776:
3101                         break; /* always enabled, nothing to do */
3102                 case nct6106:
3103                 case nct6779:
3104                 case nct6791:
3105                 case nct6792:
3106                 case nct6793:
3107                 case nct6795:
3108                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3109                                             val);
3110                         reg = nct6775_read_value(data,
3111                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
3112                         if (val == 255)
3113                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3114                         else
3115                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3116                         nct6775_write_value(data,
3117                                             data->REG_CRITICAL_PWM_ENABLE[nr],
3118                                             reg);
3119                         break;
3120                 }
3121         }
3122         mutex_unlock(&data->update_lock);
3123         return count;
3124 }
3125
3126 static ssize_t
3127 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3128 {
3129         struct nct6775_data *data = nct6775_update_device(dev);
3130         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3131         int nr = sattr->nr;
3132         int point = sattr->index;
3133
3134         /*
3135          * We don't know for sure if the temperature is signed or unsigned.
3136          * Assume it is unsigned.
3137          */
3138         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3139 }
3140
3141 static ssize_t
3142 store_auto_temp(struct device *dev, struct device_attribute *attr,
3143                 const char *buf, size_t count)
3144 {
3145         struct nct6775_data *data = dev_get_drvdata(dev);
3146         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3147         int nr = sattr->nr;
3148         int point = sattr->index;
3149         unsigned long val;
3150         int err;
3151
3152         err = kstrtoul(buf, 10, &val);
3153         if (err)
3154                 return err;
3155         if (val > 255000)
3156                 return -EINVAL;
3157
3158         mutex_lock(&data->update_lock);
3159         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3160         if (point < data->auto_pwm_num) {
3161                 nct6775_write_value(data,
3162                                     NCT6775_AUTO_TEMP(data, nr, point),
3163                                     data->auto_temp[nr][point]);
3164         } else {
3165                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3166                                     data->auto_temp[nr][point]);
3167         }
3168         mutex_unlock(&data->update_lock);
3169         return count;
3170 }
3171
3172 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3173                                       struct attribute *attr, int index)
3174 {
3175         struct device *dev = container_of(kobj, struct device, kobj);
3176         struct nct6775_data *data = dev_get_drvdata(dev);
3177         int pwm = index / 36;   /* pwm index */
3178         int nr = index % 36;    /* attribute index */
3179
3180         if (!(data->has_pwm & BIT(pwm)))
3181                 return 0;
3182
3183         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3184                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3185                         return 0;
3186         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3187                 return 0;
3188         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3189                 return 0;
3190         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3191                 return 0;
3192
3193         if (nr >= 22 && nr <= 35) {             /* auto point */
3194                 int api = (nr - 22) / 2;        /* auto point index */
3195
3196                 if (api > data->auto_pwm_num)
3197                         return 0;
3198         }
3199         return attr->mode;
3200 }
3201
3202 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3203                   show_fan_time, store_fan_time, 0, 0);
3204 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3205                   show_fan_time, store_fan_time, 0, 1);
3206 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3207                   show_fan_time, store_fan_time, 0, 2);
3208 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3209                   store_pwm, 0, 1);
3210 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3211                   store_pwm, 0, 2);
3212 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3213                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3214 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3215                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3216                   0, 1);
3217
3218 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3219                   0, 3);
3220
3221 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3222                   store_pwm, 0, 4);
3223
3224 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3225                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3226 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3227                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3228
3229 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3230                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3231 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3232                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3233
3234 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3235                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3236 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3237                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3238
3239 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3240                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3241 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3242                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3243
3244 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3245                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3246 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3247                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3248
3249 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3250                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3251 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3252                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3253
3254 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3255                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3256 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3257                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3258
3259 /*
3260  * nct6775_pwm_is_visible uses the index into the following array
3261  * to determine if attributes should be created or not.
3262  * Any change in order or content must be matched.
3263  */
3264 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3265         &sensor_dev_template_pwm,
3266         &sensor_dev_template_pwm_mode,
3267         &sensor_dev_template_pwm_enable,
3268         &sensor_dev_template_pwm_temp_sel,
3269         &sensor_dev_template_pwm_temp_tolerance,
3270         &sensor_dev_template_pwm_crit_temp_tolerance,
3271         &sensor_dev_template_pwm_target_temp,
3272         &sensor_dev_template_fan_target,
3273         &sensor_dev_template_fan_tolerance,
3274         &sensor_dev_template_pwm_stop_time,
3275         &sensor_dev_template_pwm_step_up_time,
3276         &sensor_dev_template_pwm_step_down_time,
3277         &sensor_dev_template_pwm_start,
3278         &sensor_dev_template_pwm_floor,
3279         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3280         &sensor_dev_template_pwm_weight_temp_step,
3281         &sensor_dev_template_pwm_weight_temp_step_tol,
3282         &sensor_dev_template_pwm_weight_temp_step_base,
3283         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3284         &sensor_dev_template_pwm_max,                   /* 19 */
3285         &sensor_dev_template_pwm_step,                  /* 20 */
3286         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3287         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3288         &sensor_dev_template_pwm_auto_point1_temp,
3289         &sensor_dev_template_pwm_auto_point2_pwm,
3290         &sensor_dev_template_pwm_auto_point2_temp,
3291         &sensor_dev_template_pwm_auto_point3_pwm,
3292         &sensor_dev_template_pwm_auto_point3_temp,
3293         &sensor_dev_template_pwm_auto_point4_pwm,
3294         &sensor_dev_template_pwm_auto_point4_temp,
3295         &sensor_dev_template_pwm_auto_point5_pwm,
3296         &sensor_dev_template_pwm_auto_point5_temp,
3297         &sensor_dev_template_pwm_auto_point6_pwm,
3298         &sensor_dev_template_pwm_auto_point6_temp,
3299         &sensor_dev_template_pwm_auto_point7_pwm,
3300         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3301
3302         NULL
3303 };
3304
3305 static const struct sensor_template_group nct6775_pwm_template_group = {
3306         .templates = nct6775_attributes_pwm_template,
3307         .is_visible = nct6775_pwm_is_visible,
3308         .base = 1,
3309 };
3310
3311 static ssize_t
3312 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3313 {
3314         struct nct6775_data *data = dev_get_drvdata(dev);
3315
3316         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3317 }
3318
3319 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3320
3321 /* Case open detection */
3322
3323 static ssize_t
3324 clear_caseopen(struct device *dev, struct device_attribute *attr,
3325                const char *buf, size_t count)
3326 {
3327         struct nct6775_data *data = dev_get_drvdata(dev);
3328         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3329         unsigned long val;
3330         u8 reg;
3331         int ret;
3332
3333         if (kstrtoul(buf, 10, &val) || val != 0)
3334                 return -EINVAL;
3335
3336         mutex_lock(&data->update_lock);
3337
3338         /*
3339          * Use CR registers to clear caseopen status.
3340          * The CR registers are the same for all chips, and not all chips
3341          * support clearing the caseopen status through "regular" registers.
3342          */
3343         ret = superio_enter(data->sioreg);
3344         if (ret) {
3345                 count = ret;
3346                 goto error;
3347         }
3348
3349         superio_select(data->sioreg, NCT6775_LD_ACPI);
3350         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3351         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3352         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3353         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3354         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3355         superio_exit(data->sioreg);
3356
3357         data->valid = false;    /* Force cache refresh */
3358 error:
3359         mutex_unlock(&data->update_lock);
3360         return count;
3361 }
3362
3363 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3364                           clear_caseopen, INTRUSION_ALARM_BASE);
3365 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3366                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3367 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3368                           store_beep, INTRUSION_ALARM_BASE);
3369 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3370                           store_beep, INTRUSION_ALARM_BASE + 1);
3371 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3372                           store_beep, BEEP_ENABLE_BASE);
3373
3374 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3375                                         struct attribute *attr, int index)
3376 {
3377         struct device *dev = container_of(kobj, struct device, kobj);
3378         struct nct6775_data *data = dev_get_drvdata(dev);
3379
3380         if (index == 0 && !data->have_vid)
3381                 return 0;
3382
3383         if (index == 1 || index == 2) {
3384                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3385                         return 0;
3386         }
3387
3388         if (index == 3 || index == 4) {
3389                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3390                         return 0;
3391         }
3392
3393         return attr->mode;
3394 }
3395
3396 /*
3397  * nct6775_other_is_visible uses the index into the following array
3398  * to determine if attributes should be created or not.
3399  * Any change in order or content must be matched.
3400  */
3401 static struct attribute *nct6775_attributes_other[] = {
3402         &dev_attr_cpu0_vid.attr,                                /* 0 */
3403         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3404         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3405         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3406         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3407         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3408 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3409         &dev_attr_name.attr,
3410 #endif
3411         NULL
3412 };
3413
3414 static const struct attribute_group nct6775_group_other = {
3415         .attrs = nct6775_attributes_other,
3416         .is_visible = nct6775_other_is_visible,
3417 };
3418
3419 static inline void nct6775_init_device(struct nct6775_data *data)
3420 {
3421         int i;
3422         u8 tmp, diode;
3423
3424         /* Start monitoring if needed */
3425         if (data->REG_CONFIG) {
3426                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3427                 if (!(tmp & 0x01))
3428                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3429         }
3430
3431         /* Enable temperature sensors if needed */
3432         for (i = 0; i < NUM_TEMP; i++) {
3433                 if (!(data->have_temp & BIT(i)))
3434                         continue;
3435                 if (!data->reg_temp_config[i])
3436                         continue;
3437                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3438                 if (tmp & 0x01)
3439                         nct6775_write_value(data, data->reg_temp_config[i],
3440                                             tmp & 0xfe);
3441         }
3442
3443         /* Enable VBAT monitoring if needed */
3444         tmp = nct6775_read_value(data, data->REG_VBAT);
3445         if (!(tmp & 0x01))
3446                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3447
3448         diode = nct6775_read_value(data, data->REG_DIODE);
3449
3450         for (i = 0; i < data->temp_fixed_num; i++) {
3451                 if (!(data->have_temp_fixed & BIT(i)))
3452                         continue;
3453                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3454                         data->temp_type[i]
3455                           = 3 - ((diode >> i) & data->DIODE_MASK);
3456                 else                            /* thermistor */
3457                         data->temp_type[i] = 4;
3458         }
3459 }
3460
3461 static void
3462 nct6775_check_fan_inputs(struct nct6775_data *data)
3463 {
3464         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3465         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3466         int sioreg = data->sioreg;
3467         int regval;
3468
3469         /* Store SIO_REG_ENABLE for use during resume */
3470         superio_select(sioreg, NCT6775_LD_HWM);
3471         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3472
3473         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3474         if (data->kind == nct6775) {
3475                 regval = superio_inb(sioreg, 0x2c);
3476
3477                 fan3pin = regval & BIT(6);
3478                 pwm3pin = regval & BIT(7);
3479
3480                 /* On NCT6775, fan4 shares pins with the fdc interface */
3481                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3482                 fan4min = false;
3483                 fan5pin = false;
3484                 fan6pin = false;
3485                 pwm4pin = false;
3486                 pwm5pin = false;
3487                 pwm6pin = false;
3488         } else if (data->kind == nct6776) {
3489                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3490                 const char *board_vendor, *board_name;
3491
3492                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3493                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3494
3495                 if (board_name && board_vendor &&
3496                     !strcmp(board_vendor, "ASRock")) {
3497                         /*
3498                          * Auxiliary fan monitoring is not enabled on ASRock
3499                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3500                          * Observed with BIOS version 2.00.
3501                          */
3502                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3503                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3504                                         data->sio_reg_enable |= 0xe0;
3505                                         superio_outb(sioreg, SIO_REG_ENABLE,
3506                                                      data->sio_reg_enable);
3507                                 }
3508                         }
3509                 }
3510
3511                 if (data->sio_reg_enable & 0x80)
3512                         fan3pin = gpok;
3513                 else
3514                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3515
3516                 if (data->sio_reg_enable & 0x40)
3517                         fan4pin = gpok;
3518                 else
3519                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3520
3521                 if (data->sio_reg_enable & 0x20)
3522                         fan5pin = gpok;
3523                 else
3524                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3525
3526                 fan4min = fan4pin;
3527                 fan6pin = false;
3528                 pwm3pin = fan3pin;
3529                 pwm4pin = false;
3530                 pwm5pin = false;
3531                 pwm6pin = false;
3532         } else if (data->kind == nct6106) {
3533                 regval = superio_inb(sioreg, 0x24);
3534                 fan3pin = !(regval & 0x80);
3535                 pwm3pin = regval & 0x08;
3536
3537                 fan4pin = false;
3538                 fan4min = false;
3539                 fan5pin = false;
3540                 fan6pin = false;
3541                 pwm4pin = false;
3542                 pwm5pin = false;
3543                 pwm6pin = false;
3544         } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3545                 int regval_1b, regval_2a, regval_2f, regval_eb;
3546                 bool dsw_en;
3547
3548                 regval = superio_inb(sioreg, 0x1c);
3549
3550                 fan3pin = !(regval & BIT(5));
3551                 fan4pin = !(regval & BIT(6));
3552                 fan5pin = !(regval & BIT(7));
3553
3554                 pwm3pin = !(regval & BIT(0));
3555                 pwm4pin = !(regval & BIT(1));
3556                 pwm5pin = !(regval & BIT(2));
3557
3558                 regval = superio_inb(sioreg, 0x2d);
3559                 switch (data->kind) {
3560                 case nct6791:
3561                 case nct6792:
3562                         fan6pin = regval & BIT(1);
3563                         pwm6pin = regval & BIT(0);
3564                         break;
3565                 case nct6793:
3566                 case nct6795:
3567                         regval_1b = superio_inb(sioreg, 0x1b);
3568                         regval_2a = superio_inb(sioreg, 0x2a);
3569                         regval_2f = superio_inb(sioreg, 0x2f);
3570                         dsw_en = regval_2f & BIT(3);
3571
3572                         if (!pwm5pin)
3573                                 pwm5pin = regval & BIT(7);
3574
3575                         if (!fan5pin)
3576                                 fan5pin = regval_1b & BIT(5);
3577
3578                         fan6pin = false;
3579                         pwm6pin = false;
3580                         if (!dsw_en) {
3581                                 fan6pin = regval & BIT(1);
3582                                 pwm6pin = regval & BIT(0);
3583                         }
3584
3585                         superio_select(sioreg, NCT6775_LD_12);
3586                         regval_eb = superio_inb(sioreg, 0xeb);
3587                         if (!fan5pin)
3588                                 fan5pin = regval_eb & BIT(5);
3589                         if (!pwm5pin)
3590                                 pwm5pin = (regval_eb & BIT(4)) &&
3591                                            !(regval_2a & BIT(0));
3592                         if (!fan6pin)
3593                                 fan6pin = regval_eb & BIT(3);
3594                         if (!pwm6pin)
3595                                 pwm6pin = regval_eb & BIT(2);
3596
3597                         if (data->kind == nct6795) {
3598                                 int regval_ed = superio_inb(sioreg, 0xed);
3599
3600                                 if (!fan6pin)
3601                                         fan6pin = (regval_2a & BIT(4)) &&
3602                                           (!dsw_en ||
3603                                            (dsw_en && (regval_ed & BIT(4))));
3604                                 if (!pwm6pin)
3605                                         pwm6pin = (regval_2a & BIT(3)) &&
3606                                           (regval_ed & BIT(2));
3607                         }
3608                         break;
3609                 default:        /* NCT6779D */
3610                         fan6pin = false;
3611                         pwm6pin = false;
3612                         break;
3613                 }
3614
3615                 fan4min = fan4pin;
3616         }
3617
3618         /* fan 1 and 2 (0x03) are always present */
3619         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3620                 (fan5pin << 4) | (fan6pin << 5);
3621         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3622                 (fan5pin << 4) | (fan6pin << 5);
3623         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3624                 (pwm5pin << 4) | (pwm6pin << 5);
3625 }
3626
3627 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3628                              int *available, int *mask)
3629 {
3630         int i;
3631         u8 src;
3632
3633         for (i = 0; i < data->pwm_num && *available; i++) {
3634                 int index;
3635
3636                 if (!regp[i])
3637                         continue;
3638                 src = nct6775_read_value(data, regp[i]);
3639                 src &= 0x1f;
3640                 if (!src || (*mask & BIT(src)))
3641                         continue;
3642                 if (!(data->temp_mask & BIT(src)))
3643                         continue;
3644
3645                 index = __ffs(*available);
3646                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3647                 *available &= ~BIT(index);
3648                 *mask |= BIT(src);
3649         }
3650 }
3651
3652 static int nct6775_probe(struct platform_device *pdev)
3653 {
3654         struct device *dev = &pdev->dev;
3655         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3656         struct nct6775_data *data;
3657         struct resource *res;
3658         int i, s, err = 0;
3659         int src, mask, available;
3660         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3661         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3662         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3663         int num_reg_temp, num_reg_temp_mon;
3664         u8 cr2a;
3665         struct attribute_group *group;
3666         struct device *hwmon_dev;
3667         int num_attr_groups = 0;
3668
3669         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3670         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3671                                  DRVNAME))
3672                 return -EBUSY;
3673
3674         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3675                             GFP_KERNEL);
3676         if (!data)
3677                 return -ENOMEM;
3678
3679         data->kind = sio_data->kind;
3680         data->sioreg = sio_data->sioreg;
3681         data->addr = res->start;
3682         mutex_init(&data->update_lock);
3683         data->name = nct6775_device_names[data->kind];
3684         data->bank = 0xff;              /* Force initial bank selection */
3685         platform_set_drvdata(pdev, data);
3686
3687         switch (data->kind) {
3688         case nct6106:
3689                 data->in_num = 9;
3690                 data->pwm_num = 3;
3691                 data->auto_pwm_num = 4;
3692                 data->temp_fixed_num = 3;
3693                 data->num_temp_alarms = 6;
3694                 data->num_temp_beeps = 6;
3695
3696                 data->fan_from_reg = fan_from_reg13;
3697                 data->fan_from_reg_min = fan_from_reg13;
3698
3699                 data->temp_label = nct6776_temp_label;
3700                 data->temp_mask = NCT6776_TEMP_MASK;
3701
3702                 data->REG_VBAT = NCT6106_REG_VBAT;
3703                 data->REG_DIODE = NCT6106_REG_DIODE;
3704                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3705                 data->REG_VIN = NCT6106_REG_IN;
3706                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3707                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3708                 data->REG_TARGET = NCT6106_REG_TARGET;
3709                 data->REG_FAN = NCT6106_REG_FAN;
3710                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3711                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3712                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3713                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3714                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3715                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3716                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3717                 data->REG_PWM[0] = NCT6106_REG_PWM;
3718                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3719                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3720                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3721                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3722                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3723                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3724                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3725                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3726                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3727                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3728                 data->REG_CRITICAL_TEMP_TOLERANCE
3729                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3730                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3731                 data->CRITICAL_PWM_ENABLE_MASK
3732                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3733                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3734                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3735                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3736                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3737                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3738                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3739                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3740                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3741                 data->REG_ALARM = NCT6106_REG_ALARM;
3742                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3743                 data->REG_BEEP = NCT6106_REG_BEEP;
3744                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3745
3746                 reg_temp = NCT6106_REG_TEMP;
3747                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3748                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3749                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3750                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3751                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3752                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3753                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3754                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3755                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3756                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3757
3758                 break;
3759         case nct6775:
3760                 data->in_num = 9;
3761                 data->pwm_num = 3;
3762                 data->auto_pwm_num = 6;
3763                 data->has_fan_div = true;
3764                 data->temp_fixed_num = 3;
3765                 data->num_temp_alarms = 3;
3766                 data->num_temp_beeps = 3;
3767
3768                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3769                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3770
3771                 data->fan_from_reg = fan_from_reg16;
3772                 data->fan_from_reg_min = fan_from_reg8;
3773                 data->target_temp_mask = 0x7f;
3774                 data->tolerance_mask = 0x0f;
3775                 data->speed_tolerance_limit = 15;
3776
3777                 data->temp_label = nct6775_temp_label;
3778                 data->temp_mask = NCT6775_TEMP_MASK;
3779
3780                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3781                 data->REG_VBAT = NCT6775_REG_VBAT;
3782                 data->REG_DIODE = NCT6775_REG_DIODE;
3783                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3784                 data->REG_VIN = NCT6775_REG_IN;
3785                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3786                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3787                 data->REG_TARGET = NCT6775_REG_TARGET;
3788                 data->REG_FAN = NCT6775_REG_FAN;
3789                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3790                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3791                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3792                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3793                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3794                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3795                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3796                 data->REG_PWM[0] = NCT6775_REG_PWM;
3797                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3798                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3799                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3800                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3801                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3802                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3803                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3804                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3805                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3806                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3807                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3808                 data->REG_CRITICAL_TEMP_TOLERANCE
3809                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3810                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3811                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3812                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3813                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3814                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3815                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3816                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3817                 data->REG_ALARM = NCT6775_REG_ALARM;
3818                 data->REG_BEEP = NCT6775_REG_BEEP;
3819
3820                 reg_temp = NCT6775_REG_TEMP;
3821                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3822                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3823                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3824                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3825                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3826                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3827                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3828                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3829
3830                 break;
3831         case nct6776:
3832                 data->in_num = 9;
3833                 data->pwm_num = 3;
3834                 data->auto_pwm_num = 4;
3835                 data->has_fan_div = false;
3836                 data->temp_fixed_num = 3;
3837                 data->num_temp_alarms = 3;
3838                 data->num_temp_beeps = 6;
3839
3840                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3841                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3842
3843                 data->fan_from_reg = fan_from_reg13;
3844                 data->fan_from_reg_min = fan_from_reg13;
3845                 data->target_temp_mask = 0xff;
3846                 data->tolerance_mask = 0x07;
3847                 data->speed_tolerance_limit = 63;
3848
3849                 data->temp_label = nct6776_temp_label;
3850                 data->temp_mask = NCT6776_TEMP_MASK;
3851
3852                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3853                 data->REG_VBAT = NCT6775_REG_VBAT;
3854                 data->REG_DIODE = NCT6775_REG_DIODE;
3855                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3856                 data->REG_VIN = NCT6775_REG_IN;
3857                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3858                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3859                 data->REG_TARGET = NCT6775_REG_TARGET;
3860                 data->REG_FAN = NCT6775_REG_FAN;
3861                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3862                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3863                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3864                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3865                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3866                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3867                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3868                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3869                 data->REG_PWM[0] = NCT6775_REG_PWM;
3870                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3871                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3872                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3873                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3874                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3875                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3876                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3877                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3878                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3879                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3880                 data->REG_CRITICAL_TEMP_TOLERANCE
3881                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3882                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3883                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3884                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3885                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3886                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3887                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3888                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3889                 data->REG_ALARM = NCT6775_REG_ALARM;
3890                 data->REG_BEEP = NCT6776_REG_BEEP;
3891
3892                 reg_temp = NCT6775_REG_TEMP;
3893                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3894                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3895                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3896                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3897                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3898                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3899                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3900                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3901
3902                 break;
3903         case nct6779:
3904                 data->in_num = 15;
3905                 data->pwm_num = 5;
3906                 data->auto_pwm_num = 4;
3907                 data->has_fan_div = false;
3908                 data->temp_fixed_num = 6;
3909                 data->num_temp_alarms = 2;
3910                 data->num_temp_beeps = 2;
3911
3912                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3913                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3914
3915                 data->fan_from_reg = fan_from_reg13;
3916                 data->fan_from_reg_min = fan_from_reg13;
3917                 data->target_temp_mask = 0xff;
3918                 data->tolerance_mask = 0x07;
3919                 data->speed_tolerance_limit = 63;
3920
3921                 data->temp_label = nct6779_temp_label;
3922                 data->temp_mask = NCT6779_TEMP_MASK;
3923
3924                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3925                 data->REG_VBAT = NCT6775_REG_VBAT;
3926                 data->REG_DIODE = NCT6775_REG_DIODE;
3927                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3928                 data->REG_VIN = NCT6779_REG_IN;
3929                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3930                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3931                 data->REG_TARGET = NCT6775_REG_TARGET;
3932                 data->REG_FAN = NCT6779_REG_FAN;
3933                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3934                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3935                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3936                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3937                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3938                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3939                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3940                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3941                 data->REG_PWM[0] = NCT6775_REG_PWM;
3942                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3943                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3944                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3945                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3946                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3947                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3948                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3949                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3950                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3951                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3952                 data->REG_CRITICAL_TEMP_TOLERANCE
3953                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3954                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3955                 data->CRITICAL_PWM_ENABLE_MASK
3956                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3957                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3958                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3959                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3960                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3961                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3962                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3963                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3964                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3965                 data->REG_ALARM = NCT6779_REG_ALARM;
3966                 data->REG_BEEP = NCT6776_REG_BEEP;
3967
3968                 reg_temp = NCT6779_REG_TEMP;
3969                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3970                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3971                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3972                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3973                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3974                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3975                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3976                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3977
3978                 break;
3979         case nct6791:
3980         case nct6792:
3981         case nct6793:
3982         case nct6795:
3983                 data->in_num = 15;
3984                 data->pwm_num = 6;
3985                 data->auto_pwm_num = 4;
3986                 data->has_fan_div = false;
3987                 data->temp_fixed_num = 6;
3988                 data->num_temp_alarms = 2;
3989                 data->num_temp_beeps = 2;
3990
3991                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3992                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3993
3994                 data->fan_from_reg = fan_from_reg13;
3995                 data->fan_from_reg_min = fan_from_reg13;
3996                 data->target_temp_mask = 0xff;
3997                 data->tolerance_mask = 0x07;
3998                 data->speed_tolerance_limit = 63;
3999
4000                 switch (data->kind) {
4001                 default:
4002                 case nct6791:
4003                         data->temp_label = nct6779_temp_label;
4004                         data->temp_mask = NCT6791_TEMP_MASK;
4005                         break;
4006                 case nct6792:
4007                         data->temp_label = nct6792_temp_label;
4008                         data->temp_mask = NCT6792_TEMP_MASK;
4009                         break;
4010                 case nct6793:
4011                         data->temp_label = nct6793_temp_label;
4012                         data->temp_mask = NCT6793_TEMP_MASK;
4013                         break;
4014                 case nct6795:
4015                         data->temp_label = nct6795_temp_label;
4016                         data->temp_mask = NCT6795_TEMP_MASK;
4017                         break;
4018                 }
4019
4020                 data->REG_CONFIG = NCT6775_REG_CONFIG;
4021                 data->REG_VBAT = NCT6775_REG_VBAT;
4022                 data->REG_DIODE = NCT6775_REG_DIODE;
4023                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4024                 data->REG_VIN = NCT6779_REG_IN;
4025                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4026                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4027                 data->REG_TARGET = NCT6775_REG_TARGET;
4028                 data->REG_FAN = NCT6779_REG_FAN;
4029                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4030                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4031                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4032                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4033                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4034                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4035                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4036                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4037                 data->REG_PWM[0] = NCT6775_REG_PWM;
4038                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4039                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4040                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4041                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4042                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4043                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4044                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4045                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4046                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4047                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4048                 data->REG_CRITICAL_TEMP_TOLERANCE
4049                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4050                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4051                 data->CRITICAL_PWM_ENABLE_MASK
4052                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4053                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4054                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4055                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4056                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4057                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4058                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4059                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4060                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4061                 data->REG_ALARM = NCT6791_REG_ALARM;
4062                 if (data->kind == nct6791)
4063                         data->REG_BEEP = NCT6776_REG_BEEP;
4064                 else
4065                         data->REG_BEEP = NCT6792_REG_BEEP;
4066
4067                 reg_temp = NCT6779_REG_TEMP;
4068                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4069                 if (data->kind == nct6791) {
4070                         reg_temp_mon = NCT6779_REG_TEMP_MON;
4071                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4072                 } else {
4073                         reg_temp_mon = NCT6792_REG_TEMP_MON;
4074                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4075                 }
4076                 reg_temp_over = NCT6779_REG_TEMP_OVER;
4077                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4078                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4079                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4080                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4081
4082                 break;
4083         default:
4084                 return -ENODEV;
4085         }
4086         data->have_in = BIT(data->in_num) - 1;
4087         data->have_temp = 0;
4088
4089         /*
4090          * On some boards, not all available temperature sources are monitored,
4091          * even though some of the monitoring registers are unused.
4092          * Get list of unused monitoring registers, then detect if any fan
4093          * controls are configured to use unmonitored temperature sources.
4094          * If so, assign the unmonitored temperature sources to available
4095          * monitoring registers.
4096          */
4097         mask = 0;
4098         available = 0;
4099         for (i = 0; i < num_reg_temp; i++) {
4100                 if (reg_temp[i] == 0)
4101                         continue;
4102
4103                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4104                 if (!src || (mask & BIT(src)))
4105                         available |= BIT(i);
4106
4107                 mask |= BIT(src);
4108         }
4109
4110         /*
4111          * Now find unmonitored temperature registers and enable monitoring
4112          * if additional monitoring registers are available.
4113          */
4114         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4115         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4116
4117         mask = 0;
4118         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
4119         for (i = 0; i < num_reg_temp; i++) {
4120                 if (reg_temp[i] == 0)
4121                         continue;
4122
4123                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4124                 if (!src || (mask & BIT(src)))
4125                         continue;
4126
4127                 if (!(data->temp_mask & BIT(src))) {
4128                         dev_info(dev,
4129                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4130                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4131                         continue;
4132                 }
4133
4134                 mask |= BIT(src);
4135
4136                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4137                 if (src <= data->temp_fixed_num) {
4138                         data->have_temp |= BIT(src - 1);
4139                         data->have_temp_fixed |= BIT(src - 1);
4140                         data->reg_temp[0][src - 1] = reg_temp[i];
4141                         data->reg_temp[1][src - 1] = reg_temp_over[i];
4142                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4143                         if (reg_temp_crit_h && reg_temp_crit_h[i])
4144                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4145                         else if (reg_temp_crit[src - 1])
4146                                 data->reg_temp[3][src - 1]
4147                                   = reg_temp_crit[src - 1];
4148                         if (reg_temp_crit_l && reg_temp_crit_l[i])
4149                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4150                         data->reg_temp_config[src - 1] = reg_temp_config[i];
4151                         data->temp_src[src - 1] = src;
4152                         continue;
4153                 }
4154
4155                 if (s >= NUM_TEMP)
4156                         continue;
4157
4158                 /* Use dynamic index for other sources */
4159                 data->have_temp |= BIT(s);
4160                 data->reg_temp[0][s] = reg_temp[i];
4161                 data->reg_temp[1][s] = reg_temp_over[i];
4162                 data->reg_temp[2][s] = reg_temp_hyst[i];
4163                 data->reg_temp_config[s] = reg_temp_config[i];
4164                 if (reg_temp_crit_h && reg_temp_crit_h[i])
4165                         data->reg_temp[3][s] = reg_temp_crit_h[i];
4166                 else if (reg_temp_crit[src - 1])
4167                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
4168                 if (reg_temp_crit_l && reg_temp_crit_l[i])
4169                         data->reg_temp[4][s] = reg_temp_crit_l[i];
4170
4171                 data->temp_src[s] = src;
4172                 s++;
4173         }
4174
4175         /*
4176          * Repeat with temperatures used for fan control.
4177          * This set of registers does not support limits.
4178          */
4179         for (i = 0; i < num_reg_temp_mon; i++) {
4180                 if (reg_temp_mon[i] == 0)
4181                         continue;
4182
4183                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4184                 if (!src)
4185                         continue;
4186
4187                 if (!(data->temp_mask & BIT(src))) {
4188                         dev_info(dev,
4189                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4190                                  src, i, data->REG_TEMP_SEL[i],
4191                                  reg_temp_mon[i]);
4192                         continue;
4193                 }
4194
4195                 /*
4196                  * For virtual temperature sources, the 'virtual' temperature
4197                  * for each fan reflects a different temperature, and there
4198                  * are no duplicates.
4199                  */
4200                 if (src != TEMP_SOURCE_VIRTUAL) {
4201                         if (mask & BIT(src))
4202                                 continue;
4203                         mask |= BIT(src);
4204                 }
4205
4206                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4207                 if (src <= data->temp_fixed_num) {
4208                         if (data->have_temp & BIT(src - 1))
4209                                 continue;
4210                         data->have_temp |= BIT(src - 1);
4211                         data->have_temp_fixed |= BIT(src - 1);
4212                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
4213                         data->temp_src[src - 1] = src;
4214                         continue;
4215                 }
4216
4217                 if (s >= NUM_TEMP)
4218                         continue;
4219
4220                 /* Use dynamic index for other sources */
4221                 data->have_temp |= BIT(s);
4222                 data->reg_temp[0][s] = reg_temp_mon[i];
4223                 data->temp_src[s] = src;
4224                 s++;
4225         }
4226
4227 #ifdef USE_ALTERNATE
4228         /*
4229          * Go through the list of alternate temp registers and enable
4230          * if possible.
4231          * The temperature is already monitored if the respective bit in <mask>
4232          * is set.
4233          */
4234         for (i = 0; i < 32; i++) {
4235                 if (!(data->temp_mask & BIT(i + 1)))
4236                         continue;
4237                 if (!reg_temp_alternate[i])
4238                         continue;
4239                 if (mask & BIT(i + 1))
4240                         continue;
4241                 if (i < data->temp_fixed_num) {
4242                         if (data->have_temp & BIT(i))
4243                                 continue;
4244                         data->have_temp |= BIT(i);
4245                         data->have_temp_fixed |= BIT(i);
4246                         data->reg_temp[0][i] = reg_temp_alternate[i];
4247                         if (i < num_reg_temp) {
4248                                 data->reg_temp[1][i] = reg_temp_over[i];
4249                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4250                         }
4251                         data->temp_src[i] = i + 1;
4252                         continue;
4253                 }
4254
4255                 if (s >= NUM_TEMP)      /* Abort if no more space */
4256                         break;
4257
4258                 data->have_temp |= BIT(s);
4259                 data->reg_temp[0][s] = reg_temp_alternate[i];
4260                 data->temp_src[s] = i + 1;
4261                 s++;
4262         }
4263 #endif /* USE_ALTERNATE */
4264
4265         /* Initialize the chip */
4266         nct6775_init_device(data);
4267
4268         err = superio_enter(sio_data->sioreg);
4269         if (err)
4270                 return err;
4271
4272         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4273         switch (data->kind) {
4274         case nct6775:
4275                 data->have_vid = (cr2a & 0x40);
4276                 break;
4277         case nct6776:
4278                 data->have_vid = (cr2a & 0x60) == 0x40;
4279                 break;
4280         case nct6106:
4281         case nct6779:
4282         case nct6791:
4283         case nct6792:
4284         case nct6793:
4285         case nct6795:
4286                 break;
4287         }
4288
4289         /*
4290          * Read VID value
4291          * We can get the VID input values directly at logical device D 0xe3.
4292          */
4293         if (data->have_vid) {
4294                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4295                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4296                 data->vrm = vid_which_vrm();
4297         }
4298
4299         if (fan_debounce) {
4300                 u8 tmp;
4301
4302                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4303                 tmp = superio_inb(sio_data->sioreg,
4304                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4305                 switch (data->kind) {
4306                 case nct6106:
4307                         tmp |= 0xe0;
4308                         break;
4309                 case nct6775:
4310                         tmp |= 0x1e;
4311                         break;
4312                 case nct6776:
4313                 case nct6779:
4314                         tmp |= 0x3e;
4315                         break;
4316                 case nct6791:
4317                 case nct6792:
4318                 case nct6793:
4319                 case nct6795:
4320                         tmp |= 0x7e;
4321                         break;
4322                 }
4323                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4324                              tmp);
4325                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4326                          data->name);
4327         }
4328
4329         nct6775_check_fan_inputs(data);
4330
4331         superio_exit(sio_data->sioreg);
4332
4333         /* Read fan clock dividers immediately */
4334         nct6775_init_fan_common(dev, data);
4335
4336         /* Register sysfs hooks */
4337         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4338                                           data->pwm_num);
4339         if (IS_ERR(group))
4340                 return PTR_ERR(group);
4341
4342         data->groups[num_attr_groups++] = group;
4343
4344         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4345                                           fls(data->have_in));
4346         if (IS_ERR(group))
4347                 return PTR_ERR(group);
4348
4349         data->groups[num_attr_groups++] = group;
4350
4351         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4352                                           fls(data->has_fan));
4353         if (IS_ERR(group))
4354                 return PTR_ERR(group);
4355
4356         data->groups[num_attr_groups++] = group;
4357
4358         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4359                                           fls(data->have_temp));
4360         if (IS_ERR(group))
4361                 return PTR_ERR(group);
4362
4363         data->groups[num_attr_groups++] = group;
4364         data->groups[num_attr_groups++] = &nct6775_group_other;
4365
4366 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4367         err = sysfs_create_groups(&dev->kobj, data->groups);
4368         if (err < 0)
4369                 return err;
4370         hwmon_dev = hwmon_device_register(dev);
4371         if (IS_ERR(hwmon_dev)) {
4372                 sysfs_remove_groups(&dev->kobj, data->groups);
4373                 return PTR_ERR(hwmon_dev);
4374         }
4375         data->hwmon_dev = hwmon_dev;
4376 #else
4377         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4378                                                            data, data->groups);
4379         if (!IS_ERR(hwmon_dev))
4380                 nct6775_debugfs_init(hwmon_dev);
4381 #endif
4382         return PTR_ERR_OR_ZERO(hwmon_dev);
4383 }
4384
4385 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4386 static int nct6775_remove(struct platform_device *pdev)
4387 {
4388         struct nct6775_data *data = platform_get_drvdata(pdev);
4389
4390         hwmon_device_unregister(data->hwmon_dev);
4391         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4392         return 0;
4393 }
4394 #endif
4395
4396 static void nct6791_enable_io_mapping(int sioaddr)
4397 {
4398         int val;
4399
4400         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4401         if (val & 0x10) {
4402                 pr_info("Enabling hardware monitor logical device mappings.\n");
4403                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4404                              val & ~0x10);
4405         }
4406 }
4407
4408 static int __maybe_unused nct6775_suspend(struct device *dev)
4409 {
4410         struct nct6775_data *data = nct6775_update_device(dev);
4411
4412         mutex_lock(&data->update_lock);
4413         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4414         if (data->kind == nct6775) {
4415                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4416                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4417         }
4418         mutex_unlock(&data->update_lock);
4419
4420         return 0;
4421 }
4422
4423 static int __maybe_unused nct6775_resume(struct device *dev)
4424 {
4425         struct nct6775_data *data = dev_get_drvdata(dev);
4426         int sioreg = data->sioreg;
4427         int i, j, err = 0;
4428         u8 reg;
4429
4430         mutex_lock(&data->update_lock);
4431         data->bank = 0xff;              /* Force initial bank selection */
4432
4433         err = superio_enter(sioreg);
4434         if (err)
4435                 goto abort;
4436
4437         superio_select(sioreg, NCT6775_LD_HWM);
4438         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4439         if (reg != data->sio_reg_enable)
4440                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4441
4442         if (data->kind == nct6791 || data->kind == nct6792 ||
4443             data->kind == nct6793 || data->kind == nct6795)
4444                 nct6791_enable_io_mapping(sioreg);
4445
4446         superio_exit(sioreg);
4447
4448         /* Restore limits */
4449         for (i = 0; i < data->in_num; i++) {
4450                 if (!(data->have_in & BIT(i)))
4451                         continue;
4452
4453                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4454                                     data->in[i][1]);
4455                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4456                                     data->in[i][2]);
4457         }
4458
4459         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4460                 if (!(data->has_fan_min & BIT(i)))
4461                         continue;
4462
4463                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4464                                     data->fan_min[i]);
4465         }
4466
4467         for (i = 0; i < NUM_TEMP; i++) {
4468                 if (!(data->have_temp & BIT(i)))
4469                         continue;
4470
4471                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4472                         if (data->reg_temp[j][i])
4473                                 nct6775_write_temp(data, data->reg_temp[j][i],
4474                                                    data->temp[j][i]);
4475         }
4476
4477         /* Restore other settings */
4478         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4479         if (data->kind == nct6775) {
4480                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4481                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4482         }
4483
4484 abort:
4485         /* Force re-reading all values */
4486         data->valid = false;
4487         mutex_unlock(&data->update_lock);
4488
4489         return err;
4490 }
4491
4492 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4493
4494 static struct platform_driver nct6775_driver = {
4495         .driver = {
4496                 .owner  = THIS_MODULE,
4497                 .name   = DRVNAME,
4498                 .pm     = &nct6775_dev_pm_ops,
4499         },
4500         .probe          = nct6775_probe,
4501 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4502         .remove         = nct6775_remove,
4503 #endif
4504 };
4505
4506 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4507 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4508 {
4509         u16 val;
4510         int err;
4511         int addr;
4512
4513         err = superio_enter(sioaddr);
4514         if (err)
4515                 return err;
4516
4517         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4518                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4519         if (force_id && val != 0xffff)
4520                 val = force_id;
4521
4522         switch (val & SIO_ID_MASK) {
4523         case SIO_NCT6106_ID:
4524                 sio_data->kind = nct6106;
4525                 break;
4526         case SIO_NCT6775_ID:
4527                 sio_data->kind = nct6775;
4528                 break;
4529         case SIO_NCT6776_ID:
4530                 sio_data->kind = nct6776;
4531                 break;
4532         case SIO_NCT6779_ID:
4533                 sio_data->kind = nct6779;
4534                 break;
4535         case SIO_NCT6791_ID:
4536                 sio_data->kind = nct6791;
4537                 break;
4538         case SIO_NCT6792_ID:
4539                 sio_data->kind = nct6792;
4540                 break;
4541         case SIO_NCT6793_ID:
4542                 sio_data->kind = nct6793;
4543                 break;
4544         case SIO_NCT6795_ID:
4545                 sio_data->kind = nct6795;
4546                 break;
4547         default:
4548                 if (val != 0xffff)
4549                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4550                 superio_exit(sioaddr);
4551                 return -ENODEV;
4552         }
4553
4554         /* We have a known chip, find the HWM I/O address */
4555         superio_select(sioaddr, NCT6775_LD_HWM);
4556         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4557             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4558         addr = val & IOREGION_ALIGNMENT;
4559         if (addr == 0) {
4560                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4561                 superio_exit(sioaddr);
4562                 return -ENODEV;
4563         }
4564
4565         /* Activate logical device if needed */
4566         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4567         if (!(val & 0x01)) {
4568                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4569                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4570         }
4571
4572         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4573             sio_data->kind == nct6793 || sio_data->kind == nct6795)
4574                 nct6791_enable_io_mapping(sioaddr);
4575
4576         superio_exit(sioaddr);
4577         pr_info("Found %s or compatible chip at %#x:%#x\n",
4578                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4579         sio_data->sioreg = sioaddr;
4580
4581         return addr;
4582 }
4583
4584 /*
4585  * when Super-I/O functions move to a separate file, the Super-I/O
4586  * bus will manage the lifetime of the device and this module will only keep
4587  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4588  * must keep track of the device
4589  */
4590 static struct platform_device *pdev[2];
4591
4592 static int __init sensors_nct6775_init(void)
4593 {
4594         int i, err;
4595         bool found = false;
4596         int address;
4597         struct resource res;
4598         struct nct6775_sio_data sio_data;
4599         int sioaddr[2] = { 0x2e, 0x4e };
4600
4601         err = platform_driver_register(&nct6775_driver);
4602         if (err)
4603                 return err;
4604
4605         /*
4606          * initialize sio_data->kind and sio_data->sioreg.
4607          *
4608          * when Super-I/O functions move to a separate file, the Super-I/O
4609          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4610          * nct6775 hardware monitor, and call probe()
4611          */
4612         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4613                 address = nct6775_find(sioaddr[i], &sio_data);
4614                 if (address <= 0)
4615                         continue;
4616
4617                 found = true;
4618
4619                 pdev[i] = platform_device_alloc(DRVNAME, address);
4620                 if (!pdev[i]) {
4621                         err = -ENOMEM;
4622                         goto exit_device_unregister;
4623                 }
4624
4625                 err = platform_device_add_data(pdev[i], &sio_data,
4626                                                sizeof(struct nct6775_sio_data));
4627                 if (err)
4628                         goto exit_device_put;
4629
4630                 memset(&res, 0, sizeof(res));
4631                 res.name = DRVNAME;
4632                 res.start = address + IOREGION_OFFSET;
4633                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4634                 res.flags = IORESOURCE_IO;
4635
4636                 err = acpi_check_resource_conflict(&res);
4637                 if (err) {
4638                         platform_device_put(pdev[i]);
4639                         pdev[i] = NULL;
4640                         continue;
4641                 }
4642
4643                 err = platform_device_add_resources(pdev[i], &res, 1);
4644                 if (err)
4645                         goto exit_device_put;
4646
4647                 /* platform_device_add calls probe() */
4648                 err = platform_device_add(pdev[i]);
4649                 if (err)
4650                         goto exit_device_put;
4651         }
4652         if (!found) {
4653                 err = -ENODEV;
4654                 goto exit_unregister;
4655         }
4656
4657         return 0;
4658
4659 exit_device_put:
4660         platform_device_put(pdev[i]);
4661 exit_device_unregister:
4662         while (--i >= 0) {
4663                 if (pdev[i])
4664                         platform_device_unregister(pdev[i]);
4665         }
4666 exit_unregister:
4667         platform_driver_unregister(&nct6775_driver);
4668         return err;
4669 }
4670
4671 static void __exit sensors_nct6775_exit(void)
4672 {
4673         int i;
4674
4675         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4676                 if (pdev[i])
4677                         platform_device_unregister(pdev[i]);
4678         }
4679         platform_driver_unregister(&nct6775_driver);
4680 }
4681
4682 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4683 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4684 MODULE_LICENSE("GPL");
4685
4686 module_init(sensors_nct6775_init);
4687 module_exit(sensors_nct6775_exit);