git.sur5r.net Git - openocd/blob - src/flash/nand/s3c2412.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2412 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx.h"
  32
  33 NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
  34 {
  35         struct s3c24xx_nand_controller *info;
  36         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  37
  38         /* fill in the address fields for the core device */
  39         info->cmd = S3C2440_NFCMD;
  40         info->addr = S3C2440_NFADDR;
  41         info->data = S3C2440_NFDATA;
  42         info->nfstat = S3C2412_NFSTAT;
  43
  44         return ERROR_OK;
  45 }
  46
  47 static int s3c2412_init(struct nand_device *nand)
  48 {
  49         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  50         struct target *target = s3c24xx_info->target;
  51
  52         target_write_u32(target, S3C2410_NFCONF,
  53                          S3C2440_NFCONF_TACLS(3) |
  54                          S3C2440_NFCONF_TWRPH0(7) |
  55                          S3C2440_NFCONF_TWRPH1(7));
  56
  57         target_write_u32(target, S3C2440_NFCONT,
  58                          S3C2412_NFCONT_INIT_MAIN_ECC |
  59                          S3C2440_NFCONT_ENABLE);
  60
  61         return ERROR_OK;
  62 }
  63
  64 struct nand_flash_controller s3c2412_nand_controller = {
  65                 .name = "s3c2412",
  66                 .nand_device_command = &s3c2412_nand_device_command,
  67                 .init = &s3c2412_init,
  68                 .reset = &s3c24xx_reset,
  69                 .command = &s3c24xx_command,
  70                 .address = &s3c24xx_address,
  71                 .write_data = &s3c24xx_write_data,
  72                 .read_data = &s3c24xx_read_data,
  73                 .write_page = s3c24xx_write_page,
  74                 .read_page = s3c24xx_read_page,
  75                 .write_block_data = &s3c2440_write_block_data,
  76                 .read_block_data = &s3c2440_read_block_data,
  77                 .controller_ready = &s3c24xx_controller_ready,
  78                 .nand_ready = &s3c2440_nand_ready,
  79         };