git.sur5r.net Git - openocd/blob - src/flash/nand/s3c6400.c

   1 /***************************************************************************
   2  *   Copyright (C) 2010 by Peter Korsgaard <jacmet@sunsite.dk>             *
   3  *   Heavily based on s3c2412.c by Ben Dooks <ben@fluff.org>               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 #ifdef HAVE_CONFIG_H
  22 #include "config.h"
  23 #endif
  24
  25 #include "s3c24xx.h"
  26 /* s3c64xx uses another base address for the nand controller than 24xx */
  27 #undef S3C2410_NFREG
  28 #define S3C2410_NFREG(x) ((x) + 0x70200000)
  29
  30 NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command)
  31 {
  32         struct s3c24xx_nand_controller *info;
  33         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  34
  35         /* fill in the address fields for the core device */
  36         info->cmd = S3C2440_NFCMD;
  37         info->addr = S3C2440_NFADDR;
  38         info->data = S3C2440_NFDATA;
  39         info->nfstat = S3C2412_NFSTAT;
  40
  41         return ERROR_OK;
  42 }
  43
  44 static int s3c6400_init(struct nand_device *nand)
  45 {
  46         struct target *target = nand->target;
  47
  48         target_write_u32(target, S3C2410_NFCONF,
  49                          S3C2440_NFCONF_TACLS(3) |
  50                          S3C2440_NFCONF_TWRPH0(7) |
  51                          S3C2440_NFCONF_TWRPH1(7) | 4);
  52
  53         target_write_u32(target, S3C2440_NFCONT,
  54                          S3C2412_NFCONT_INIT_MAIN_ECC |
  55                          S3C2440_NFCONT_ENABLE);
  56
  57         return ERROR_OK;
  58 }
  59
  60 struct nand_flash_controller s3c6400_nand_controller = {
  61         .name = "s3c6400",
  62         .nand_device_command = &s3c6400_nand_device_command,
  63         .init = &s3c6400_init,
  64         .reset = &s3c24xx_reset,
  65         .command = &s3c24xx_command,
  66         .address = &s3c24xx_address,
  67         .write_data = &s3c24xx_write_data,
  68         .read_data = &s3c24xx_read_data,
  69         .write_page = s3c24xx_write_page,
  70         .read_page = s3c24xx_read_page,
  71         .write_block_data = &s3c2440_write_block_data,
  72         .read_block_data = &s3c2440_read_block_data,
  73         .nand_ready = &s3c2440_nand_ready,
  74 };