git.sur5r.net Git - openocd/blob - src/target/Makefile.am

   1 include $(top_srcdir)/common.mk
   2
   3 if OOCD_TRACE
   4 OOCD_TRACE_FILES = oocd_trace.c
   5 else
   6 OOCD_TRACE_FILES =
   7 endif
   8
   9 SUBDIRS = openrisc
  10 libtarget_la_LIBADD = $(top_builddir)/src/target/openrisc/libopenrisc.la
  11
  12 BIN2C           = $(top_srcdir)/src/helper/bin2char.sh
  13
  14 DEBUG_HANDLER   = $(srcdir)/xscale/debug_handler.bin
  15 EXTRA_DIST = \
  16         startup.tcl \
  17         $(wildcard $(srcdir)/xscale/*)
  18
  19 DEBUG_HEADER    = xscale_debug.inc
  20 BUILT_SOURCES = $(DEBUG_HEADER)
  21 CLEANFILES = $(DEBUG_HEADER)
  22
  23 $(DEBUG_HEADER): $(DEBUG_HANDLER) $(BIN2C)
  24         $(BIN2C) < $< > $@ || { rm -f $@; false; }
  25
  26 METASOURCES = AUTO
  27 noinst_LTLIBRARIES = libtarget.la
  28 libtarget_la_SOURCES = \
  29         $(TARGET_CORE_SRC) \
  30         $(ARM_DEBUG_SRC) \
  31         $(ARMV4_5_SRC) \
  32         $(ARMV6_SRC) \
  33         $(ARMV7_SRC) \
  34         $(ARM_MISC_SRC) \
  35         $(AVR32_SRC) \
  36         $(MIPS32_SRC) \
  37         $(NDS32_SRC) \
  38         $(INTEL_IA32_SRC) \
  39         avrt.c \
  40         dsp563xx.c \
  41         dsp563xx_once.c \
  42         dsp5680xx.c \
  43         hla_target.c
  44
  45 TARGET_CORE_SRC = \
  46         algorithm.c \
  47         register.c \
  48         image.c \
  49         breakpoints.c \
  50         target.c \
  51         target_request.c \
  52         testee.c \
  53         smp.c
  54
  55 ARMV4_5_SRC = \
  56         armv4_5.c \
  57         armv4_5_mmu.c \
  58         armv4_5_cache.c \
  59         $(ARM7_9_SRC)
  60
  61 ARM7_9_SRC = \
  62         arm7_9_common.c \
  63         arm7tdmi.c \
  64         arm720t.c \
  65         arm9tdmi.c \
  66         arm920t.c \
  67         arm966e.c \
  68         arm946e.c \
  69         arm926ejs.c \
  70         feroceon.c
  71
  72 ARM_MISC_SRC = \
  73         fa526.c \
  74         xscale.c
  75
  76 ARMV6_SRC = \
  77         arm11.c \
  78         arm11_dbgtap.c
  79
  80 ARMV7_SRC = \
  81         armv7m.c \
  82         armv7m_trace.c \
  83         cortex_m.c \
  84         armv7a.c \
  85         cortex_a.c \
  86         ls1_sap.c
  87
  88 ARM_DEBUG_SRC = \
  89         arm_dpm.c \
  90         arm_jtag.c \
  91         arm_disassembler.c \
  92         arm_simulator.c \
  93         arm_semihosting.c \
  94         arm_adi_v5.c \
  95         armv7a_cache.c \
  96         armv7a_cache_l2x.c \
  97         adi_v5_jtag.c \
  98         adi_v5_swd.c \
  99         embeddedice.c \
 100         trace.c \
 101         etb.c \
 102         etm.c \
 103         $(OOCD_TRACE_FILES) \
 104         etm_dummy.c
 105
 106 AVR32_SRC = \
 107         avr32_ap7k.c \
 108         avr32_jtag.c \
 109         avr32_mem.c \
 110         avr32_regs.c
 111
 112 MIPS32_SRC = \
 113         mips32.c \
 114         mips_m4k.c \
 115         mips32_pracc.c \
 116         mips32_dmaacc.c \
 117         mips_ejtag.c
 118
 119 NDS32_SRC = \
 120         nds32.c \
 121         nds32_reg.c \
 122         nds32_cmd.c \
 123         nds32_disassembler.c \
 124         nds32_tlb.c \
 125         nds32_v2.c \
 126         nds32_v3_common.c \
 127         nds32_v3.c \
 128         nds32_v3m.c \
 129         nds32_aice.c
 130
 131 INTEL_IA32_SRC = \
 132         quark_x10xx.c \
 133         quark_d20xx.c \
 134         lakemont.c \
 135         x86_32_common.c
 136
 137 noinst_HEADERS = \
 138         algorithm.h \
 139         arm.h \
 140         arm_dpm.h \
 141         arm_jtag.h \
 142         arm_adi_v5.h \
 143         armv7a_cache.h \
 144         armv7a_cache_l2x.h \
 145         arm_disassembler.h \
 146         arm_opcodes.h \
 147         arm_simulator.h \
 148         arm_semihosting.h \
 149         arm7_9_common.h \
 150         arm7tdmi.h \
 151         arm720t.h \
 152         arm9tdmi.h \
 153         arm920t.h \
 154         arm926ejs.h \
 155         arm966e.h \
 156         arm946e.h \
 157         arm11.h \
 158         arm11_dbgtap.h \
 159         armv4_5.h \
 160         armv4_5_mmu.h \
 161         armv4_5_cache.h \
 162         armv7a.h \
 163         armv7m.h \
 164         armv7m_trace.h \
 165         avrt.h \
 166         dsp563xx.h \
 167         dsp563xx_once.h \
 168         dsp5680xx.h \
 169         breakpoints.h \
 170         cortex_m.h \
 171         cortex_a.h \
 172         embeddedice.h \
 173         etb.h \
 174         etm.h \
 175         etm_dummy.h \
 176         image.h \
 177         mips32.h \
 178         mips_m4k.h \
 179         mips_ejtag.h \
 180         mips32_pracc.h \
 181         mips32_dmaacc.h \
 182         oocd_trace.h \
 183         register.h \
 184         target.h \
 185         target_type.h \
 186         trace.h \
 187         target_request.h \
 188         trace.h \
 189         xscale.h \
 190         smp.h \
 191         avr32_ap7k.h \
 192         avr32_jtag.h \
 193         avr32_mem.h \
 194         avr32_regs.h \
 195         nds32.h \
 196         nds32_cmd.h \
 197         nds32_disassembler.h \
 198         nds32_edm.h \
 199         nds32_insn.h \
 200         nds32_reg.h \
 201         nds32_tlb.h \
 202         nds32_v2.h \
 203         nds32_v3_common.h \
 204         nds32_v3.h \
 205         nds32_v3m.h \
 206         nds32_aice.h \
 207         lakemont.h \
 208         x86_32_common.h
 209
 210 ocddatadir = $(pkglibdir)
 211 nobase_dist_ocddata_DATA =
 212
 213 MAINTAINERCLEANFILES = $(srcdir)/Makefile.in