]> git.sur5r.net Git - openocd/blobdiff - TODO
ARM: rename "arm9tdmi vector_catch" to "arm9 ..."
[openocd] / TODO
diff --git a/TODO b/TODO
index fa9477ac84d7bd03af7293ad227d140bb7fb3818..611bdd3cd37730d54b4233dd31f1d136776937b0 100644 (file)
--- a/TODO
+++ b/TODO
@@ -138,9 +138,8 @@ Once the above are completed:
 - regression: "reset halt" between 729(works) and 788(fails): @par
 https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
 - ARM7/9:
-  - clean up "arm9tdmi vector_catch". Should be available for other arm9
-  (e.g. arm926ejs) and some(???) arm7 cores. @par 
-https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html  
+  - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
+https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
 https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
   - add reset option to allow programming embedded ice while srst is asserted.
   Some CPUs will gate the JTAG clock when srst is asserted and in this case,