]> git.sur5r.net Git - openocd/blobdiff - src/rtos/rtos_ucos_iii_stackings.c
esirisc: support eSi-RISC targets
[openocd] / src / rtos / rtos_ucos_iii_stackings.c
index 0a7411eddb23f66568eba646ce5cb75e1a695b63..d093563bae899e8ee1a9b8ae48919651f855ad88 100644 (file)
@@ -24,6 +24,7 @@
 #include <rtos/rtos.h>
 #include <rtos/rtos_standard_stackings.h>
 #include <target/armv7m.h>
+#include <target/esirisc.h>
 
 static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[] = {
        { ARMV7M_R0,   0x20, 32 },      /* r0   */
@@ -45,6 +46,27 @@ static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[]
        { ARMV7M_xPSR, 0x3c, 32 },      /* xPSR */
 };
 
+static const struct stack_register_offset rtos_uCOS_III_eSi_RISC_stack_offsets[] = {
+       { ESIRISC_SP,  -2,   32 },      /* sp   */
+       { ESIRISC_RA,  0x48, 32 },      /* ra   */
+       { ESIRISC_R2,  0x44, 32 },      /* r2   */
+       { ESIRISC_R3,  0x40, 32 },      /* r3   */
+       { ESIRISC_R4,  0x3c, 32 },      /* r4   */
+       { ESIRISC_R5,  0x38, 32 },      /* r5   */
+       { ESIRISC_R6,  0x34, 32 },      /* r6   */
+       { ESIRISC_R7,  0x30, 32 },      /* r7   */
+       { ESIRISC_R8,  0x2c, 32 },      /* r8   */
+       { ESIRISC_R9,  0x28, 32 },      /* r9   */
+       { ESIRISC_R10, 0x24, 32 },      /* r10  */
+       { ESIRISC_R11, 0x20, 32 },      /* r11  */
+       { ESIRISC_R12, 0x1c, 32 },      /* r12  */
+       { ESIRISC_R13, 0x18, 32 },      /* r13  */
+       { ESIRISC_R14, 0x14, 32 },      /* r14  */
+       { ESIRISC_R15, 0x10, 32 },      /* r15  */
+       { ESIRISC_PC,  0x04, 32 },      /* PC   */
+       { ESIRISC_CAS, 0x08, 32 },      /* CAS  */
+};
+
 const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = {
        0x40,                                                                                           /* stack_registers_size */
        -1,                                                                                                     /* stack_growth_direction */
@@ -52,3 +74,11 @@ const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = {
        rtos_generic_stack_align8,                                                      /* stack_alignment */
        rtos_uCOS_III_Cortex_M_stack_offsets                            /* register_offsets */
 };
+
+const struct rtos_register_stacking rtos_uCOS_III_eSi_RISC_stacking = {
+       0x4c,                                                                                           /* stack_registers_size */
+       -1,                                                                                                     /* stack_growth_direction */
+       ARRAY_SIZE(rtos_uCOS_III_eSi_RISC_stack_offsets),       /* num_output_registers */
+       NULL,                                                                                           /* stack_alignment */
+       rtos_uCOS_III_eSi_RISC_stack_offsets                            /* register_offsets */
+};