target/cortex_a: remove buggy memory AP accesses

[openocd] / src / target / armv7a.h

diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index c5c03c895a667888a047d245d6ee77df006e7594..cf938809a221781a986bf4d004a78532d64c0032 100644 (file)
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -87,10 +87,11 @@ struct armv7a_mmu_common {
        /* following field mmu working way */
        int32_t cached;     /* 0: not initialized, 1: initialized */
        uint32_t ttbcr;     /* cache for ttbcr register */
+       uint32_t ttbr[2];
        uint32_t ttbr_mask[2];
        uint32_t ttbr_range[2];
 
-       int (*read_physical_memory)(struct target *target, uint32_t address, uint32_t size,
+       int (*read_physical_memory)(struct target *target, target_addr_t address, uint32_t size,
                        uint32_t count, uint8_t *buffer);
        struct armv7a_cache_common armv7a_cache;
        uint32_t mmu_enabled;
@@ -105,8 +106,6 @@ struct armv7a_common {
        struct arm_dpm dpm;
        uint32_t debug_base;
        struct adiv5_ap *debug_ap;
-       struct adiv5_ap *memory_ap;
-       bool memory_ap_available;
        /* mdir */
        uint8_t multi_processor_system;
        uint8_t cluster_id;
@@ -193,6 +192,7 @@ int armv7a_mmu_translate_va(struct target *target,  uint32_t va, uint32_t *val);
 
 int armv7a_handle_cache_info_command(struct command_context *cmd_ctx,
                struct armv7a_cache_common *armv7a_cache);
+int armv7a_read_ttbcr(struct target *target);
 
 extern const struct command_registration armv7a_command_handlers[];