]> git.sur5r.net Git - openocd/blobdiff - tcl/chip/st/spear/spear3xx.tcl
TCL/SPEAr: Join two initialization files.
[openocd] / tcl / chip / st / spear / spear3xx.tcl
index f807c25a5892934113bc8296af9049540878bd0c..17ab228e091eb1506c05ffd9c0e330b7a7d33065 100644 (file)
@@ -78,3 +78,39 @@ proc sp3xx_common_init {} {
        mww 0xfca80098 0x80000007
        mww 0xfca8009c 0x80000007
 }
+
+
+# Specific init scripts for ST SPEAr310 system on chip
+proc sp310_init {} {
+       mww 0xb4000008 0x00002ff4       ;# RAS function enable
+
+       mww 0xfca80050 0x00000001       ;# Enable clk mem port 1
+
+       mww 0xfca8013c 0x2f7bc210       ;# plgpio_pad_drv
+       mww 0xfca80140 0x017bdef6
+}
+
+proc sp310_emi_init {} {
+       # set EMI pad strength
+       mmw 0xfca80134 0x0e000000 0x00000000
+       mmw 0xfca80138 0x0e739ce7 0x00000000
+       mmw 0xfca8013c 0x00039ce7 0x00000000
+
+       # set safe EMI timing as in BootROM
+       #mww 0x4f000000 0x0000000f      ;# tAP_0_reg
+       #mww 0x4f000004 0x00000000      ;# tSDP_0_reg
+       #mww 0x4f000008 0x000000ff      ;# tDPw_0_reg
+       #mww 0x4f00000c 0x00000111      ;# tDPr_0_reg
+       #mww 0x4f000010 0x00000002      ;# tDCS_0_reg
+
+       # set fast EMI timing as in Linux
+       mww 0x4f000000 0x00000010       ;# tAP_0_reg
+       mww 0x4f000004 0x00000005       ;# tSDP_0_reg
+       mww 0x4f000008 0x0000000a       ;# tDPw_0_reg
+       mww 0x4f00000c 0x0000000a       ;# tDPr_0_reg
+       mww 0x4f000010 0x00000005       ;# tDCS_0_re
+
+       # 32bit wide, 8/16/32bit access
+       mww 0x4f000014 0x0000000e       ;# control_0_reg
+       mww 0x4f000094 0x0000003f       ;# ack_reg
+}