cfg: update for target's that support cortex_m AIRCR SYSRESETREQ

[openocd] / tcl / target / lpc4350.cfg

diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
index 63d130796a773d792f4c9cfdbb68dccc735e5788..6614383b89dff72a0e71f3f1ee2e1d9c9f075dcb 100644 (file)
--- a/tcl/target/lpc4350.cfg
+++ b/tcl/target/lpc4350.cfg
@@ -42,3 +42,7 @@ jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
 
 target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4
 target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m3 reset_config sysresetreq