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[u-boot] / arch / arm / dts / imx7-colibri.dts
1 // SPDX-License-Identifier: GPL-2.0+ OR X11
2 /*
3  * Copyright 2016 Toradex AG
4  */
5
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include "imx7d.dtsi"
9
10 / {
11         model = "Toradex Colibri iMX7S/D";
12         compatible = "toradex,imx7-colibri", "fsl,imx7";
13
14         chosen {
15                 stdout-path = &uart1;
16         };
17 };
18
19 &i2c1 {
20         pinctrl-names = "default", "gpio";
21         pinctrl-0 = <&pinctrl_i2c1>;
22         pinctrl-1 = <&pinctrl_i2c1_gpio>;
23         sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
24         scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
25         status = "okay";
26
27         rn5t567@33 {
28                 compatible = "ricoh,rn5t567";
29                 reg = <0x33>;
30         };
31 };
32
33 &i2c4 {
34         pinctrl-names = "default", "gpio";
35         pinctrl-0 = <&pinctrl_i2c4>;
36         pinctrl-1 = <&pinctrl_i2c4_gpio>;
37         sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
38         scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
39         status = "okay";
40 };
41
42 &uart1 {
43         pinctrl-names = "default";
44         pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
45         uart-has-rtscts;
46         fsl,dte-mode;
47         status = "okay";
48 };
49
50 &iomuxc {
51         pinctrl_i2c4: i2c4-grp {
52                 fsl,pins = <
53                         MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
54                         MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
55                 >;
56         };
57
58         pinctrl_i2c4_gpio: i2c4-gpio-grp {
59                         fsl,pins = <
60                         MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
61                         MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
62                 >;
63         };
64
65         pinctrl_uart1: uart1-grp {
66                 fsl,pins = <
67                         MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
68                         MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
69                         MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
70                         MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
71                 >;
72         };
73
74         pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
75                 fsl,pins = <
76                         MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
77                         MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
78                 >;
79         };
80 };
81
82 &iomuxc_lpsr {
83         pinctrl_i2c1: i2c1-grp {
84                 fsl,pins = <
85                         MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
86                         MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL      0x4000007f
87                 >;
88         };
89
90         pinctrl_i2c1_gpio: i2c1-gpio-grp {
91                 fsl,pins = <
92                         MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x4000007f
93                         MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x4000007f
94                 >;
95         };
96 };