git.sur5r.net Git - u-boot/blob - arch/arm/dts/r8a7793.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7793 SoC
   4  *
   5  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   6  */
   7
   8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/power/r8a7793-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7793";
  15         interrupt-parent = <&gic>;
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c7;
  28                 i2c8 = &i2c8;
  29                 spi0 = &qspi;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35                 enable-method = "renesas,apmu";
  36
  37                 cpu0: cpu@0 {
  38                         device_type = "cpu";
  39                         compatible = "arm,cortex-a15";
  40                         reg = <0>;
  41                         clock-frequency = <1500000000>;
  42                         voltage-tolerance = <1>; /* 1% */
  43                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  44                         clock-latency = <300000>; /* 300 us */
  45                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  46
  47                         /* kHz - uV - OPPs unknown yet */
  48                         operating-points = <1500000 1000000>,
  49                                            <1312500 1000000>,
  50                                            <1125000 1000000>,
  51                                            < 937500 1000000>,
  52                                            < 750000 1000000>,
  53                                            < 375000 1000000>;
  54                         next-level-cache = <&L2_CA15>;
  55                 };
  56
  57                 cpu1: cpu@1 {
  58                         device_type = "cpu";
  59                         compatible = "arm,cortex-a15";
  60                         reg = <1>;
  61                         clock-frequency = <1500000000>;
  62                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  63                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  64                 };
  65
  66                 L2_CA15: cache-controller-0 {
  67                         compatible = "cache";
  68                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
  69                         cache-unified;
  70                         cache-level = <2>;
  71                 };
  72         };
  73
  74         apmu@e6152000 {
  75                 compatible = "renesas,r8a7793-apmu", "renesas,apmu";
  76                 reg = <0 0xe6152000 0 0x188>;
  77                 cpus = <&cpu0 &cpu1>;
  78         };
  79
  80         thermal-zones {
  81                 cpu_thermal: cpu-thermal {
  82                         polling-delay-passive   = <0>;
  83                         polling-delay           = <0>;
  84
  85                         thermal-sensors = <&thermal>;
  86
  87                         trips {
  88                                 cpu-crit {
  89                                         temperature     = <115000>;
  90                                         hysteresis      = <0>;
  91                                         type            = "critical";
  92                                 };
  93                         };
  94                         cooling-maps {
  95                         };
  96                 };
  97         };
  98
  99         gic: interrupt-controller@f1001000 {
 100                 compatible = "arm,gic-400";
 101                 #interrupt-cells = <3>;
 102                 #address-cells = <0>;
 103                 interrupt-controller;
 104                 reg = <0 0xf1001000 0 0x1000>,
 105                         <0 0xf1002000 0 0x2000>,
 106                         <0 0xf1004000 0 0x2000>,
 107                         <0 0xf1006000 0 0x2000>;
 108                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 109                 clocks = <&cpg CPG_MOD 408>;
 110                 clock-names = "clk";
 111                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 112                 resets = <&cpg 408>;
 113         };
 114
 115         gpio0: gpio@e6050000 {
 116                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 117                 reg = <0 0xe6050000 0 0x50>;
 118                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 119                 #gpio-cells = <2>;
 120                 gpio-controller;
 121                 gpio-ranges = <&pfc 0 0 32>;
 122                 #interrupt-cells = <2>;
 123                 interrupt-controller;
 124                 clocks = <&cpg CPG_MOD 912>;
 125                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 126                 resets = <&cpg 912>;
 127         };
 128
 129         gpio1: gpio@e6051000 {
 130                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 131                 reg = <0 0xe6051000 0 0x50>;
 132                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 133                 #gpio-cells = <2>;
 134                 gpio-controller;
 135                 gpio-ranges = <&pfc 0 32 26>;
 136                 #interrupt-cells = <2>;
 137                 interrupt-controller;
 138                 clocks = <&cpg CPG_MOD 911>;
 139                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 140                 resets = <&cpg 911>;
 141         };
 142
 143         gpio2: gpio@e6052000 {
 144                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 145                 reg = <0 0xe6052000 0 0x50>;
 146                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 147                 #gpio-cells = <2>;
 148                 gpio-controller;
 149                 gpio-ranges = <&pfc 0 64 32>;
 150                 #interrupt-cells = <2>;
 151                 interrupt-controller;
 152                 clocks = <&cpg CPG_MOD 910>;
 153                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 154                 resets = <&cpg 910>;
 155         };
 156
 157         gpio3: gpio@e6053000 {
 158                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 159                 reg = <0 0xe6053000 0 0x50>;
 160                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 161                 #gpio-cells = <2>;
 162                 gpio-controller;
 163                 gpio-ranges = <&pfc 0 96 32>;
 164                 #interrupt-cells = <2>;
 165                 interrupt-controller;
 166                 clocks = <&cpg CPG_MOD 909>;
 167                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 168                 resets = <&cpg 909>;
 169         };
 170
 171         gpio4: gpio@e6054000 {
 172                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 173                 reg = <0 0xe6054000 0 0x50>;
 174                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 175                 #gpio-cells = <2>;
 176                 gpio-controller;
 177                 gpio-ranges = <&pfc 0 128 32>;
 178                 #interrupt-cells = <2>;
 179                 interrupt-controller;
 180                 clocks = <&cpg CPG_MOD 908>;
 181                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 182                 resets = <&cpg 908>;
 183         };
 184
 185         gpio5: gpio@e6055000 {
 186                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 187                 reg = <0 0xe6055000 0 0x50>;
 188                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 189                 #gpio-cells = <2>;
 190                 gpio-controller;
 191                 gpio-ranges = <&pfc 0 160 32>;
 192                 #interrupt-cells = <2>;
 193                 interrupt-controller;
 194                 clocks = <&cpg CPG_MOD 907>;
 195                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 196                 resets = <&cpg 907>;
 197         };
 198
 199         gpio6: gpio@e6055400 {
 200                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 201                 reg = <0 0xe6055400 0 0x50>;
 202                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 203                 #gpio-cells = <2>;
 204                 gpio-controller;
 205                 gpio-ranges = <&pfc 0 192 32>;
 206                 #interrupt-cells = <2>;
 207                 interrupt-controller;
 208                 clocks = <&cpg CPG_MOD 905>;
 209                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 210                 resets = <&cpg 905>;
 211         };
 212
 213         gpio7: gpio@e6055800 {
 214                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 215                 reg = <0 0xe6055800 0 0x50>;
 216                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 217                 #gpio-cells = <2>;
 218                 gpio-controller;
 219                 gpio-ranges = <&pfc 0 224 26>;
 220                 #interrupt-cells = <2>;
 221                 interrupt-controller;
 222                 clocks = <&cpg CPG_MOD 904>;
 223                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 224                 resets = <&cpg 904>;
 225         };
 226
 227         thermal: thermal@e61f0000 {
 228                 compatible =    "renesas,thermal-r8a7793",
 229                                 "renesas,rcar-gen2-thermal",
 230                                 "renesas,rcar-thermal";
 231                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 232                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 233                 clocks = <&cpg CPG_MOD 522>;
 234                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 235                 resets = <&cpg 522>;
 236                 #thermal-sensor-cells = <0>;
 237         };
 238
 239         timer {
 240                 compatible = "arm,armv7-timer";
 241                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 242                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 243                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 244                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 245         };
 246
 247         cmt0: timer@ffca0000 {
 248                 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
 249                 reg = <0 0xffca0000 0 0x1004>;
 250                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 251                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 252                 clocks = <&cpg CPG_MOD 124>;
 253                 clock-names = "fck";
 254                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 255                 resets = <&cpg 124>;
 256
 257                 renesas,channels-mask = <0x60>;
 258
 259                 status = "disabled";
 260         };
 261
 262         cmt1: timer@e6130000 {
 263                 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
 264                 reg = <0 0xe6130000 0 0x1004>;
 265                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 266                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 267                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 268                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 269                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 270                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 271                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 272                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 273                 clocks = <&cpg CPG_MOD 329>;
 274                 clock-names = "fck";
 275                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 276                 resets = <&cpg 329>;
 277
 278                 renesas,channels-mask = <0xff>;
 279
 280                 status = "disabled";
 281         };
 282
 283         irqc0: interrupt-controller@e61c0000 {
 284                 compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 285                 #interrupt-cells = <2>;
 286                 interrupt-controller;
 287                 reg = <0 0xe61c0000 0 0x200>;
 288                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 289                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 290                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 291                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 292                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 293                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 294                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 295                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 296                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 297                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 298                 clocks = <&cpg CPG_MOD 407>;
 299                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 300                 resets = <&cpg 407>;
 301         };
 302
 303         dmac0: dma-controller@e6700000 {
 304                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 305                 reg = <0 0xe6700000 0 0x20000>;
 306                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 307                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 308                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 309                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 310                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 311                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 312                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 313                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 314                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 315                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 316                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 317                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 318                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 319                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 320                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 321                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 322                 interrupt-names = "error",
 323                                 "ch0", "ch1", "ch2", "ch3",
 324                                 "ch4", "ch5", "ch6", "ch7",
 325                                 "ch8", "ch9", "ch10", "ch11",
 326                                 "ch12", "ch13", "ch14";
 327                 clocks = <&cpg CPG_MOD 219>;
 328                 clock-names = "fck";
 329                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 330                 resets = <&cpg 219>;
 331                 #dma-cells = <1>;
 332                 dma-channels = <15>;
 333         };
 334
 335         dmac1: dma-controller@e6720000 {
 336                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 337                 reg = <0 0xe6720000 0 0x20000>;
 338                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 339                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 340                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 341                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 342                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 343                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 344                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 345                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 346                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 347                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 348                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 349                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 350                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 351                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 352                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 353                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 354                 interrupt-names = "error",
 355                                 "ch0", "ch1", "ch2", "ch3",
 356                                 "ch4", "ch5", "ch6", "ch7",
 357                                 "ch8", "ch9", "ch10", "ch11",
 358                                 "ch12", "ch13", "ch14";
 359                 clocks = <&cpg CPG_MOD 218>;
 360                 clock-names = "fck";
 361                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 362                 resets = <&cpg 218>;
 363                 #dma-cells = <1>;
 364                 dma-channels = <15>;
 365         };
 366
 367         audma0: dma-controller@ec700000 {
 368                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 369                 reg = <0 0xec700000 0 0x10000>;
 370                 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 371                               GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 378                               GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 379                               GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 380                               GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 381                               GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 382                               GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 383                               GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 384                 interrupt-names = "error",
 385                                 "ch0", "ch1", "ch2", "ch3",
 386                                 "ch4", "ch5", "ch6", "ch7",
 387                                 "ch8", "ch9", "ch10", "ch11",
 388                                 "ch12";
 389                 clocks = <&cpg CPG_MOD 502>;
 390                 clock-names = "fck";
 391                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 392                 resets = <&cpg 502>;
 393                 #dma-cells = <1>;
 394                 dma-channels = <13>;
 395         };
 396
 397         audma1: dma-controller@ec720000 {
 398                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 399                 reg = <0 0xec720000 0 0x10000>;
 400                 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 401                               GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 410                               GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 411                               GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 412                               GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 413                               GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 414                 interrupt-names = "error",
 415                                 "ch0", "ch1", "ch2", "ch3",
 416                                 "ch4", "ch5", "ch6", "ch7",
 417                                 "ch8", "ch9", "ch10", "ch11",
 418                                 "ch12";
 419                 clocks = <&cpg CPG_MOD 501>;
 420                 clock-names = "fck";
 421                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 422                 resets = <&cpg 501>;
 423                 #dma-cells = <1>;
 424                 dma-channels = <13>;
 425         };
 426
 427         /* The memory map in the User's Manual maps the cores to bus numbers */
 428         i2c0: i2c@e6508000 {
 429                 #address-cells = <1>;
 430                 #size-cells = <0>;
 431                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 432                 reg = <0 0xe6508000 0 0x40>;
 433                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 434                 clocks = <&cpg CPG_MOD 931>;
 435                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 436                 resets = <&cpg 931>;
 437                 i2c-scl-internal-delay-ns = <6>;
 438                 status = "disabled";
 439         };
 440
 441         i2c1: i2c@e6518000 {
 442                 #address-cells = <1>;
 443                 #size-cells = <0>;
 444                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 445                 reg = <0 0xe6518000 0 0x40>;
 446                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 447                 clocks = <&cpg CPG_MOD 930>;
 448                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 449                 resets = <&cpg 930>;
 450                 i2c-scl-internal-delay-ns = <6>;
 451                 status = "disabled";
 452         };
 453
 454         i2c2: i2c@e6530000 {
 455                 #address-cells = <1>;
 456                 #size-cells = <0>;
 457                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 458                 reg = <0 0xe6530000 0 0x40>;
 459                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 460                 clocks = <&cpg CPG_MOD 929>;
 461                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 462                 resets = <&cpg 929>;
 463                 i2c-scl-internal-delay-ns = <6>;
 464                 status = "disabled";
 465         };
 466
 467         i2c3: i2c@e6540000 {
 468                 #address-cells = <1>;
 469                 #size-cells = <0>;
 470                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 471                 reg = <0 0xe6540000 0 0x40>;
 472                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 473                 clocks = <&cpg CPG_MOD 928>;
 474                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 475                 resets = <&cpg 928>;
 476                 i2c-scl-internal-delay-ns = <6>;
 477                 status = "disabled";
 478         };
 479
 480         i2c4: i2c@e6520000 {
 481                 #address-cells = <1>;
 482                 #size-cells = <0>;
 483                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 484                 reg = <0 0xe6520000 0 0x40>;
 485                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 486                 clocks = <&cpg CPG_MOD 927>;
 487                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 488                 resets = <&cpg 927>;
 489                 i2c-scl-internal-delay-ns = <6>;
 490                 status = "disabled";
 491         };
 492
 493         i2c5: i2c@e6528000 {
 494                 /* doesn't need pinmux */
 495                 #address-cells = <1>;
 496                 #size-cells = <0>;
 497                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 498                 reg = <0 0xe6528000 0 0x40>;
 499                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 500                 clocks = <&cpg CPG_MOD 925>;
 501                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 502                 resets = <&cpg 925>;
 503                 i2c-scl-internal-delay-ns = <110>;
 504                 status = "disabled";
 505         };
 506
 507         i2c6: i2c@e60b0000 {
 508                 /* doesn't need pinmux */
 509                 #address-cells = <1>;
 510                 #size-cells = <0>;
 511                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 512                              "renesas,rmobile-iic";
 513                 reg = <0 0xe60b0000 0 0x425>;
 514                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 515                 clocks = <&cpg CPG_MOD 926>;
 516                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 517                        <&dmac1 0x77>, <&dmac1 0x78>;
 518                 dma-names = "tx", "rx", "tx", "rx";
 519                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 520                 resets = <&cpg 926>;
 521                 status = "disabled";
 522         };
 523
 524         i2c7: i2c@e6500000 {
 525                 #address-cells = <1>;
 526                 #size-cells = <0>;
 527                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 528                              "renesas,rmobile-iic";
 529                 reg = <0 0xe6500000 0 0x425>;
 530                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 531                 clocks = <&cpg CPG_MOD 318>;
 532                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 533                        <&dmac1 0x61>, <&dmac1 0x62>;
 534                 dma-names = "tx", "rx", "tx", "rx";
 535                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 536                 resets = <&cpg 318>;
 537                 status = "disabled";
 538         };
 539
 540         i2c8: i2c@e6510000 {
 541                 #address-cells = <1>;
 542                 #size-cells = <0>;
 543                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 544                              "renesas,rmobile-iic";
 545                 reg = <0 0xe6510000 0 0x425>;
 546                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 547                 clocks = <&cpg CPG_MOD 323>;
 548                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 549                        <&dmac1 0x65>, <&dmac1 0x66>;
 550                 dma-names = "tx", "rx", "tx", "rx";
 551                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 552                 resets = <&cpg 323>;
 553                 status = "disabled";
 554         };
 555
 556         pfc: pin-controller@e6060000 {
 557                 compatible = "renesas,pfc-r8a7793";
 558                 reg = <0 0xe6060000 0 0x250>;
 559         };
 560
 561         sdhi0: sd@ee100000 {
 562                 compatible = "renesas,sdhi-r8a7793";
 563                 reg = <0 0xee100000 0 0x328>;
 564                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 565                 clocks = <&cpg CPG_MOD 314>;
 566                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 567                        <&dmac1 0xcd>, <&dmac1 0xce>;
 568                 dma-names = "tx", "rx", "tx", "rx";
 569                 max-frequency = <195000000>;
 570                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 571                 resets = <&cpg 314>;
 572                 status = "disabled";
 573         };
 574
 575         sdhi1: sd@ee140000 {
 576                 compatible = "renesas,sdhi-r8a7793";
 577                 reg = <0 0xee140000 0 0x100>;
 578                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 579                 clocks = <&cpg CPG_MOD 312>;
 580                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 581                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 582                 dma-names = "tx", "rx", "tx", "rx";
 583                 max-frequency = <97500000>;
 584                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 585                 resets = <&cpg 312>;
 586                 status = "disabled";
 587         };
 588
 589         sdhi2: sd@ee160000 {
 590                 compatible = "renesas,sdhi-r8a7793";
 591                 reg = <0 0xee160000 0 0x100>;
 592                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 593                 clocks = <&cpg CPG_MOD 311>;
 594                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 595                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 596                 dma-names = "tx", "rx", "tx", "rx";
 597                 max-frequency = <97500000>;
 598                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 599                 resets = <&cpg 311>;
 600                 status = "disabled";
 601         };
 602
 603         mmcif0: mmc@ee200000 {
 604                 compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
 605                 reg = <0 0xee200000 0 0x80>;
 606                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 607                 clocks = <&cpg CPG_MOD 315>;
 608                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 609                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 610                 dma-names = "tx", "rx", "tx", "rx";
 611                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 612                 resets = <&cpg 315>;
 613                 reg-io-width = <4>;
 614                 status = "disabled";
 615                 max-frequency = <97500000>;
 616         };
 617
 618         scifa0: serial@e6c40000 {
 619                 compatible = "renesas,scifa-r8a7793",
 620                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 621                 reg = <0 0xe6c40000 0 64>;
 622                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 623                 clocks = <&cpg CPG_MOD 204>;
 624                 clock-names = "fck";
 625                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 626                        <&dmac1 0x21>, <&dmac1 0x22>;
 627                 dma-names = "tx", "rx", "tx", "rx";
 628                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 629                 resets = <&cpg 204>;
 630                 status = "disabled";
 631         };
 632
 633         scifa1: serial@e6c50000 {
 634                 compatible = "renesas,scifa-r8a7793",
 635                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 636                 reg = <0 0xe6c50000 0 64>;
 637                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 638                 clocks = <&cpg CPG_MOD 203>;
 639                 clock-names = "fck";
 640                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 641                        <&dmac1 0x25>, <&dmac1 0x26>;
 642                 dma-names = "tx", "rx", "tx", "rx";
 643                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 644                 resets = <&cpg 203>;
 645                 status = "disabled";
 646         };
 647
 648         scifa2: serial@e6c60000 {
 649                 compatible = "renesas,scifa-r8a7793",
 650                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 651                 reg = <0 0xe6c60000 0 64>;
 652                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 653                 clocks = <&cpg CPG_MOD 202>;
 654                 clock-names = "fck";
 655                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 656                        <&dmac1 0x27>, <&dmac1 0x28>;
 657                 dma-names = "tx", "rx", "tx", "rx";
 658                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 659                 resets = <&cpg 202>;
 660                 status = "disabled";
 661         };
 662
 663         scifa3: serial@e6c70000 {
 664                 compatible = "renesas,scifa-r8a7793",
 665                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 666                 reg = <0 0xe6c70000 0 64>;
 667                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 668                 clocks = <&cpg CPG_MOD 1106>;
 669                 clock-names = "fck";
 670                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 671                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 672                 dma-names = "tx", "rx", "tx", "rx";
 673                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 674                 resets = <&cpg 1106>;
 675                 status = "disabled";
 676         };
 677
 678         scifa4: serial@e6c78000 {
 679                 compatible = "renesas,scifa-r8a7793",
 680                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 681                 reg = <0 0xe6c78000 0 64>;
 682                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 683                 clocks = <&cpg CPG_MOD 1107>;
 684                 clock-names = "fck";
 685                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 686                        <&dmac1 0x1f>, <&dmac1 0x20>;
 687                 dma-names = "tx", "rx", "tx", "rx";
 688                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 689                 resets = <&cpg 1107>;
 690                 status = "disabled";
 691         };
 692
 693         scifa5: serial@e6c80000 {
 694                 compatible = "renesas,scifa-r8a7793",
 695                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 696                 reg = <0 0xe6c80000 0 64>;
 697                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 698                 clocks = <&cpg CPG_MOD 1108>;
 699                 clock-names = "fck";
 700                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 701                        <&dmac1 0x23>, <&dmac1 0x24>;
 702                 dma-names = "tx", "rx", "tx", "rx";
 703                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 704                 resets = <&cpg 1108>;
 705                 status = "disabled";
 706         };
 707
 708         scifb0: serial@e6c20000 {
 709                 compatible = "renesas,scifb-r8a7793",
 710                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 711                 reg = <0 0xe6c20000 0 0x100>;
 712                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 713                 clocks = <&cpg CPG_MOD 206>;
 714                 clock-names = "fck";
 715                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 716                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 717                 dma-names = "tx", "rx", "tx", "rx";
 718                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 719                 resets = <&cpg 206>;
 720                 status = "disabled";
 721         };
 722
 723         scifb1: serial@e6c30000 {
 724                 compatible = "renesas,scifb-r8a7793",
 725                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 726                 reg = <0 0xe6c30000 0 0x100>;
 727                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 728                 clocks = <&cpg CPG_MOD 207>;
 729                 clock-names = "fck";
 730                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 731                        <&dmac1 0x19>, <&dmac1 0x1a>;
 732                 dma-names = "tx", "rx", "tx", "rx";
 733                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 734                 resets = <&cpg 207>;
 735                 status = "disabled";
 736         };
 737
 738         scifb2: serial@e6ce0000 {
 739                 compatible = "renesas,scifb-r8a7793",
 740                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 741                 reg = <0 0xe6ce0000 0 0x100>;
 742                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 743                 clocks = <&cpg CPG_MOD 216>;
 744                 clock-names = "fck";
 745                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 746                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 747                 dma-names = "tx", "rx", "tx", "rx";
 748                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 749                 resets = <&cpg 216>;
 750                 status = "disabled";
 751         };
 752
 753         scif0: serial@e6e60000 {
 754                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 755                              "renesas,scif";
 756                 reg = <0 0xe6e60000 0 64>;
 757                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 758                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 759                          <&scif_clk>;
 760                 clock-names = "fck", "brg_int", "scif_clk";
 761                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 762                        <&dmac1 0x29>, <&dmac1 0x2a>;
 763                 dma-names = "tx", "rx", "tx", "rx";
 764                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 765                 resets = <&cpg 721>;
 766                 status = "disabled";
 767         };
 768
 769         scif1: serial@e6e68000 {
 770                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 771                              "renesas,scif";
 772                 reg = <0 0xe6e68000 0 64>;
 773                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 774                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 775                          <&scif_clk>;
 776                 clock-names = "fck", "brg_int", "scif_clk";
 777                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 778                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 779                 dma-names = "tx", "rx", "tx", "rx";
 780                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 781                 resets = <&cpg 720>;
 782                 status = "disabled";
 783         };
 784
 785         scif2: serial@e6e58000 {
 786                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 787                              "renesas,scif";
 788                 reg = <0 0xe6e58000 0 64>;
 789                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 790                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 791                          <&scif_clk>;
 792                 clock-names = "fck", "brg_int", "scif_clk";
 793                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 794                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 795                 dma-names = "tx", "rx", "tx", "rx";
 796                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 797                 resets = <&cpg 719>;
 798                 status = "disabled";
 799         };
 800
 801         scif3: serial@e6ea8000 {
 802                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 803                              "renesas,scif";
 804                 reg = <0 0xe6ea8000 0 64>;
 805                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 806                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 807                          <&scif_clk>;
 808                 clock-names = "fck", "brg_int", "scif_clk";
 809                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 810                        <&dmac1 0x2f>, <&dmac1 0x30>;
 811                 dma-names = "tx", "rx", "tx", "rx";
 812                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 813                 resets = <&cpg 718>;
 814                 status = "disabled";
 815         };
 816
 817         scif4: serial@e6ee0000 {
 818                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 819                              "renesas,scif";
 820                 reg = <0 0xe6ee0000 0 64>;
 821                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 822                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 823                          <&scif_clk>;
 824                 clock-names = "fck", "brg_int", "scif_clk";
 825                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 826                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 827                 dma-names = "tx", "rx", "tx", "rx";
 828                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 829                 resets = <&cpg 715>;
 830                 status = "disabled";
 831         };
 832
 833         scif5: serial@e6ee8000 {
 834                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 835                              "renesas,scif";
 836                 reg = <0 0xe6ee8000 0 64>;
 837                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 838                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 839                          <&scif_clk>;
 840                 clock-names = "fck", "brg_int", "scif_clk";
 841                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 842                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 843                 dma-names = "tx", "rx", "tx", "rx";
 844                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 845                 resets = <&cpg 714>;
 846                 status = "disabled";
 847         };
 848
 849         hscif0: serial@e62c0000 {
 850                 compatible = "renesas,hscif-r8a7793",
 851                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 852                 reg = <0 0xe62c0000 0 96>;
 853                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 854                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 855                          <&scif_clk>;
 856                 clock-names = "fck", "brg_int", "scif_clk";
 857                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 858                        <&dmac1 0x39>, <&dmac1 0x3a>;
 859                 dma-names = "tx", "rx", "tx", "rx";
 860                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 861                 resets = <&cpg 717>;
 862                 status = "disabled";
 863         };
 864
 865         hscif1: serial@e62c8000 {
 866                 compatible = "renesas,hscif-r8a7793",
 867                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 868                 reg = <0 0xe62c8000 0 96>;
 869                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 870                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 871                          <&scif_clk>;
 872                 clock-names = "fck", "brg_int", "scif_clk";
 873                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 874                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 875                 dma-names = "tx", "rx", "tx", "rx";
 876                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 877                 resets = <&cpg 716>;
 878                 status = "disabled";
 879         };
 880
 881         hscif2: serial@e62d0000 {
 882                 compatible = "renesas,hscif-r8a7793",
 883                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 884                 reg = <0 0xe62d0000 0 96>;
 885                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 886                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 887                          <&scif_clk>;
 888                 clock-names = "fck", "brg_int", "scif_clk";
 889                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 890                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 891                 dma-names = "tx", "rx", "tx", "rx";
 892                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 893                 resets = <&cpg 713>;
 894                 status = "disabled";
 895         };
 896
 897         icram0: sram@e63a0000 {
 898                 compatible = "mmio-sram";
 899                 reg = <0 0xe63a0000 0 0x12000>;
 900         };
 901
 902         icram1: sram@e63c0000 {
 903                 compatible = "mmio-sram";
 904                 reg = <0 0xe63c0000 0 0x1000>;
 905                 #address-cells = <1>;
 906                 #size-cells = <1>;
 907                 ranges = <0 0 0xe63c0000 0x1000>;
 908
 909                 smp-sram@0 {
 910                         compatible = "renesas,smp-sram";
 911                         reg = <0 0x10>;
 912                 };
 913         };
 914
 915         ether: ethernet@ee700000 {
 916                 compatible = "renesas,ether-r8a7793";
 917                 reg = <0 0xee700000 0 0x400>;
 918                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 919                 clocks = <&cpg CPG_MOD 813>;
 920                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 921                 resets = <&cpg 813>;
 922                 phy-mode = "rmii";
 923                 #address-cells = <1>;
 924                 #size-cells = <0>;
 925                 status = "disabled";
 926         };
 927
 928         vin0: video@e6ef0000 {
 929                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 930                 reg = <0 0xe6ef0000 0 0x1000>;
 931                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 932                 clocks = <&cpg CPG_MOD 811>;
 933                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 934                 resets = <&cpg 811>;
 935                 status = "disabled";
 936         };
 937
 938         vin1: video@e6ef1000 {
 939                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 940                 reg = <0 0xe6ef1000 0 0x1000>;
 941                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 942                 clocks = <&cpg CPG_MOD 810>;
 943                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 944                 resets = <&cpg 810>;
 945                 status = "disabled";
 946         };
 947
 948         vin2: video@e6ef2000 {
 949                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 950                 reg = <0 0xe6ef2000 0 0x1000>;
 951                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 952                 clocks = <&cpg CPG_MOD 809>;
 953                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 954                 resets = <&cpg 809>;
 955                 status = "disabled";
 956         };
 957
 958         qspi: spi@e6b10000 {
 959                 compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 960                 reg = <0 0xe6b10000 0 0x2c>;
 961                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 962                 clocks = <&cpg CPG_MOD 917>;
 963                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 964                        <&dmac1 0x17>, <&dmac1 0x18>;
 965                 dma-names = "tx", "rx", "tx", "rx";
 966                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 967                 resets = <&cpg 917>;
 968                 num-cs = <1>;
 969                 #address-cells = <1>;
 970                 #size-cells = <0>;
 971                 status = "disabled";
 972         };
 973
 974         du: display@feb00000 {
 975                 compatible = "renesas,du-r8a7793";
 976                 reg = <0 0xfeb00000 0 0x40000>,
 977                       <0 0xfeb90000 0 0x1c>;
 978                 reg-names = "du", "lvds.0";
 979                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 980                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 981                 clocks = <&cpg CPG_MOD 724>,
 982                          <&cpg CPG_MOD 723>,
 983                          <&cpg CPG_MOD 726>;
 984                 clock-names = "du.0", "du.1", "lvds.0";
 985                 status = "disabled";
 986
 987                 ports {
 988                         #address-cells = <1>;
 989                         #size-cells = <0>;
 990
 991                         port@0 {
 992                                 reg = <0>;
 993                                 du_out_rgb: endpoint {
 994                                 };
 995                         };
 996                         port@1 {
 997                                 reg = <1>;
 998                                 du_out_lvds0: endpoint {
 999                                 };
1000                         };
1001                 };
1002         };
1003
1004         can0: can@e6e80000 {
1005                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1006                 reg = <0 0xe6e80000 0 0x1000>;
1007                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1008                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1009                          <&can_clk>;
1010                 clock-names = "clkp1", "clkp2", "can_clk";
1011                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1012                 resets = <&cpg 916>;
1013                 status = "disabled";
1014         };
1015
1016         can1: can@e6e88000 {
1017                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1018                 reg = <0 0xe6e88000 0 0x1000>;
1019                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1020                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1021                          <&can_clk>;
1022                 clock-names = "clkp1", "clkp2", "can_clk";
1023                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1024                 resets = <&cpg 915>;
1025                 status = "disabled";
1026         };
1027
1028         /* External root clock */
1029         extal_clk: extal {
1030                 compatible = "fixed-clock";
1031                 #clock-cells = <0>;
1032                 /* This value must be overridden by the board. */
1033                 clock-frequency = <0>;
1034         };
1035
1036         /*
1037          * The external audio clocks are configured as 0 Hz fixed frequency
1038          * clocks by default.
1039          * Boards that provide audio clocks should override them.
1040          */
1041         audio_clk_a: audio_clk_a {
1042                 compatible = "fixed-clock";
1043                 #clock-cells = <0>;
1044                 clock-frequency = <0>;
1045         };
1046         audio_clk_b: audio_clk_b {
1047                 compatible = "fixed-clock";
1048                 #clock-cells = <0>;
1049                 clock-frequency = <0>;
1050         };
1051         audio_clk_c: audio_clk_c {
1052                 compatible = "fixed-clock";
1053                 #clock-cells = <0>;
1054                 clock-frequency = <0>;
1055         };
1056
1057         /* External USB clock - can be overridden by the board */
1058         usb_extal_clk: usb_extal {
1059                 compatible = "fixed-clock";
1060                 #clock-cells = <0>;
1061                 clock-frequency = <48000000>;
1062         };
1063
1064         /* External CAN clock */
1065         can_clk: can {
1066                 compatible = "fixed-clock";
1067                 #clock-cells = <0>;
1068                 /* This value must be overridden by the board. */
1069                 clock-frequency = <0>;
1070         };
1071
1072         /* External SCIF clock */
1073         scif_clk: scif {
1074                 compatible = "fixed-clock";
1075                 #clock-cells = <0>;
1076                 /* This value must be overridden by the board. */
1077                 clock-frequency = <0>;
1078         };
1079
1080         /* Special CPG clocks */
1081         cpg: clock-controller@e6150000 {
1082                 compatible = "renesas,r8a7793-cpg-mssr";
1083                 reg = <0 0xe6150000 0 0x1000>;
1084                 clocks = <&extal_clk>, <&usb_extal_clk>;
1085                 clock-names = "extal", "usb_extal";
1086                 #clock-cells = <2>;
1087                 #power-domain-cells = <0>;
1088                 #reset-cells = <1>;
1089         };
1090
1091         rst: reset-controller@e6160000 {
1092                 compatible = "renesas,r8a7793-rst";
1093                 reg = <0 0xe6160000 0 0x0100>;
1094         };
1095
1096         prr: chipid@ff000044 {
1097                 compatible = "renesas,prr";
1098                 reg = <0 0xff000044 0 4>;
1099         };
1100
1101         sysc: system-controller@e6180000 {
1102                 compatible = "renesas,r8a7793-sysc";
1103                 reg = <0 0xe6180000 0 0x0200>;
1104                 #power-domain-cells = <1>;
1105         };
1106
1107         ipmmu_sy0: mmu@e6280000 {
1108                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1109                 reg = <0 0xe6280000 0 0x1000>;
1110                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1111                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1112                 #iommu-cells = <1>;
1113                 status = "disabled";
1114         };
1115
1116         ipmmu_sy1: mmu@e6290000 {
1117                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1118                 reg = <0 0xe6290000 0 0x1000>;
1119                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1120                 #iommu-cells = <1>;
1121                 status = "disabled";
1122         };
1123
1124         ipmmu_ds: mmu@e6740000 {
1125                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1126                 reg = <0 0xe6740000 0 0x1000>;
1127                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1128                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1129                 #iommu-cells = <1>;
1130                 status = "disabled";
1131         };
1132
1133         ipmmu_mp: mmu@ec680000 {
1134                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1135                 reg = <0 0xec680000 0 0x1000>;
1136                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1137                 #iommu-cells = <1>;
1138                 status = "disabled";
1139         };
1140
1141         ipmmu_mx: mmu@fe951000 {
1142                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1143                 reg = <0 0xfe951000 0 0x1000>;
1144                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1145                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1146                 #iommu-cells = <1>;
1147                 status = "disabled";
1148         };
1149
1150         ipmmu_rt: mmu@ffc80000 {
1151                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1152                 reg = <0 0xffc80000 0 0x1000>;
1153                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1154                 #iommu-cells = <1>;
1155                 status = "disabled";
1156         };
1157
1158         ipmmu_gp: mmu@e62a0000 {
1159                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1160                 reg = <0 0xe62a0000 0 0x1000>;
1161                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1162                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1163                 #iommu-cells = <1>;
1164                 status = "disabled";
1165         };
1166
1167         rcar_sound: sound@ec500000 {
1168                 /*
1169                  * #sound-dai-cells is required
1170                  *
1171                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1172                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1173                  */
1174                 compatible =  "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
1175                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1176                         <0 0xec5a0000 0 0x100>,  /* ADG */
1177                         <0 0xec540000 0 0x1000>, /* SSIU */
1178                         <0 0xec541000 0 0x280>,  /* SSI */
1179                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1180                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1181
1182                 clocks = <&cpg CPG_MOD 1005>,
1183                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1184                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1185                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1186                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1187                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1188                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1189                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1190                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1191                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1192                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1193                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1194                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1195                          <&cpg CPG_CORE R8A7793_CLK_M2>;
1196                 clock-names = "ssi-all",
1197                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1198                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1199                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1200                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1201                                 "dvc.0", "dvc.1",
1202                                 "clk_a", "clk_b", "clk_c", "clk_i";
1203                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1204                 resets = <&cpg 1005>,
1205                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1206                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1207                          <&cpg 1014>, <&cpg 1015>;
1208                 reset-names = "ssi-all",
1209                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1210                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1211
1212                 status = "disabled";
1213
1214                 rcar_sound,dvc {
1215                         dvc0: dvc-0 {
1216                                 dmas = <&audma1 0xbc>;
1217                                 dma-names = "tx";
1218                         };
1219                         dvc1: dvc-1 {
1220                                 dmas = <&audma1 0xbe>;
1221                                 dma-names = "tx";
1222                         };
1223                 };
1224
1225                 rcar_sound,src {
1226                         src0: src-0 {
1227                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1228                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1229                                 dma-names = "rx", "tx";
1230                         };
1231                         src1: src-1 {
1232                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1233                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1234                                 dma-names = "rx", "tx";
1235                         };
1236                         src2: src-2 {
1237                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1238                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1239                                 dma-names = "rx", "tx";
1240                         };
1241                         src3: src-3 {
1242                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1243                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1244                                 dma-names = "rx", "tx";
1245                         };
1246                         src4: src-4 {
1247                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1248                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1249                                 dma-names = "rx", "tx";
1250                         };
1251                         src5: src-5 {
1252                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1253                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1254                                 dma-names = "rx", "tx";
1255                         };
1256                         src6: src-6 {
1257                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1258                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1259                                 dma-names = "rx", "tx";
1260                         };
1261                         src7: src-7 {
1262                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1263                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1264                                 dma-names = "rx", "tx";
1265                         };
1266                         src8: src-8 {
1267                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1268                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1269                                 dma-names = "rx", "tx";
1270                         };
1271                         src9: src-9 {
1272                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1273                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1274                                 dma-names = "rx", "tx";
1275                         };
1276                 };
1277
1278                 rcar_sound,ssi {
1279                         ssi0: ssi-0 {
1280                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1281                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1282                                 dma-names = "rx", "tx", "rxu", "txu";
1283                         };
1284                         ssi1: ssi-1 {
1285                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1286                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1287                                 dma-names = "rx", "tx", "rxu", "txu";
1288                         };
1289                         ssi2: ssi-2 {
1290                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1291                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1292                                 dma-names = "rx", "tx", "rxu", "txu";
1293                         };
1294                         ssi3: ssi-3 {
1295                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1296                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1297                                 dma-names = "rx", "tx", "rxu", "txu";
1298                         };
1299                         ssi4: ssi-4 {
1300                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1301                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1302                                 dma-names = "rx", "tx", "rxu", "txu";
1303                         };
1304                         ssi5: ssi-5 {
1305                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1306                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1307                                 dma-names = "rx", "tx", "rxu", "txu";
1308                         };
1309                         ssi6: ssi-6 {
1310                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1311                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1312                                 dma-names = "rx", "tx", "rxu", "txu";
1313                         };
1314                         ssi7: ssi-7 {
1315                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1316                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1317                                 dma-names = "rx", "tx", "rxu", "txu";
1318                         };
1319                         ssi8: ssi-8 {
1320                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1321                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1322                                 dma-names = "rx", "tx", "rxu", "txu";
1323                         };
1324                         ssi9: ssi-9 {
1325                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1326                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1327                                 dma-names = "rx", "tx", "rxu", "txu";
1328                         };
1329                 };
1330         };
1331 };