git.sur5r.net Git - u-boot/blob - board/freescale/ls1012afrdm/ls1012afrdm.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2017-2018 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <i2c.h>
   8 #include <asm/io.h>
   9 #include <asm/arch/clock.h>
  10 #include <asm/arch/fsl_serdes.h>
  11 #ifdef CONFIG_FSL_LS_PPA
  12 #include <asm/arch/ppa.h>
  13 #endif
  14 #include <asm/arch/mmu.h>
  15 #include <asm/arch/soc.h>
  16 #include <fsl_esdhc.h>
  17 #include <hwconfig.h>
  18 #include <environment.h>
  19 #include <fsl_mmdc.h>
  20 #include <netdev.h>
  21
  22 DECLARE_GLOBAL_DATA_PTR;
  23
  24 static inline int get_board_version(void)
  25 {
  26         struct ccsr_gpio *pgpio = (void *)(GPIO1_BASE_ADDR);
  27         int val;
  28
  29         val = in_be32(&pgpio->gpdat);
  30
  31         return val;
  32 }
  33
  34 int checkboard(void)
  35 {
  36 #ifdef CONFIG_TARGET_LS1012AFRDM
  37         puts("Board: LS1012AFRDM ");
  38 #else
  39         int rev;
  40
  41         rev = get_board_version();
  42
  43         puts("Board: FRWY-LS1012A ");
  44
  45         puts("Version");
  46
  47         switch (rev) {
  48         case BOARD_REV_A:
  49                 puts(": RevA ");
  50                 break;
  51         case BOARD_REV_B:
  52                 puts(": RevB ");
  53                 break;
  54         default:
  55                 puts(": unknown");
  56                 break;
  57         }
  58 #endif
  59
  60         return 0;
  61 }
  62
  63 #ifdef CONFIG_TARGET_LS1012AFRWY
  64 int esdhc_status_fixup(void *blob, const char *compat)
  65 {
  66         char esdhc0_path[] = "/soc/esdhc@1560000";
  67         char esdhc1_path[] = "/soc/esdhc@1580000";
  68
  69         do_fixup_by_path(blob, esdhc0_path, "status", "okay",
  70                          sizeof("okay"), 1);
  71
  72         do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
  73                          sizeof("disabled"), 1);
  74         return 0;
  75 }
  76 #endif
  77
  78 int dram_init(void)
  79 {
  80 #ifdef CONFIG_TARGET_LS1012AFRWY
  81         int board_rev;
  82 #endif
  83         struct fsl_mmdc_info mparam = {
  84                 0x04180000,     /* mdctl */
  85                 0x00030035,     /* mdpdc */
  86                 0x12554000,     /* mdotc */
  87                 0xbabf7954,     /* mdcfg0 */
  88                 0xdb328f64,     /* mdcfg1 */
  89                 0x01ff00db,     /* mdcfg2 */
  90                 0x00001680,     /* mdmisc */
  91                 0x0f3c8000,     /* mdref */
  92                 0x00002000,     /* mdrwd */
  93                 0x00bf1023,     /* mdor */
  94                 0x0000003f,     /* mdasp */
  95                 0x0000022a,     /* mpodtctrl */
  96                 0xa1390003,     /* mpzqhwctrl */
  97         };
  98
  99 #ifdef CONFIG_TARGET_LS1012AFRWY
 100         board_rev = get_board_version();
 101
 102         if (board_rev & BOARD_REV_B) {
 103                 mparam.mdctl = 0x05180000;
 104                 gd->ram_size = SYS_SDRAM_SIZE_1024;
 105         } else {
 106                 gd->ram_size = SYS_SDRAM_SIZE_512;
 107         }
 108 #else
 109         gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 110 #endif
 111         mmdc_init(&mparam);
 112
 113 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 114         /* This will break-before-make MMU for DDR */
 115         update_early_mmu_table();
 116 #endif
 117
 118         return 0;
 119 }
 120
 121 int board_early_init_f(void)
 122 {
 123         fsl_lsch2_early_init_f();
 124
 125         return 0;
 126 }
 127
 128 int board_init(void)
 129 {
 130         struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
 131                                         CONFIG_SYS_CCI400_OFFSET);
 132
 133         /*
 134          * Set CCI-400 control override register to enable barrier
 135          * transaction
 136          */
 137         out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
 138
 139 #ifdef CONFIG_ENV_IS_NOWHERE
 140         gd->env_addr = (ulong)&default_environment[0];
 141 #endif
 142
 143 #ifdef CONFIG_FSL_LS_PPA
 144         ppa_init();
 145 #endif
 146         return 0;
 147 }
 148
 149 int ft_board_setup(void *blob, bd_t *bd)
 150 {
 151         arch_fixup_fdt(blob);
 152
 153         ft_cpu_setup(blob, bd);
 154
 155         return 0;
 156 }