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[u-boot] / board / samsung / common / exynos5-dt.c
1 /*
2  * Copyright (C) 2012 Samsung Electronics
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <dwc3-uboot.h>
10 #include <fdtdec.h>
11 #include <asm/io.h>
12 #include <errno.h>
13 #include <i2c.h>
14 #include <mmc.h>
15 #include <netdev.h>
16 #include <samsung-usb-phy-uboot.h>
17 #include <spi.h>
18 #include <usb.h>
19 #include <video_bridge.h>
20 #include <asm/gpio.h>
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/dwmmc.h>
23 #include <asm/arch/mmc.h>
24 #include <asm/arch/pinmux.h>
25 #include <asm/arch/power.h>
26 #include <asm/arch/sromc.h>
27 #include <power/pmic.h>
28 #include <power/max77686_pmic.h>
29 #include <power/regulator.h>
30 #include <power/s2mps11.h>
31 #include <power/s5m8767.h>
32 #include <samsung/exynos5-dt-types.h>
33 #include <samsung/misc.h>
34 #include <tmu.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 static void board_enable_audio_codec(void)
39 {
40         int node, ret;
41         struct gpio_desc en_gpio;
42
43         node = fdtdec_next_compatible(gd->fdt_blob, 0,
44                 COMPAT_SAMSUNG_EXYNOS5_SOUND);
45         if (node <= 0)
46                 return;
47
48         ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
49                                          "codec-enable-gpio", 0, &en_gpio,
50                                          GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
51         if (ret == -FDT_ERR_NOTFOUND)
52                 return;
53
54         /* Turn on the GPIO which connects to the codec's "enable" line. */
55         gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
56
57 #ifdef CONFIG_SOUND_MAX98095
58         /* Enable MAX98095 Codec */
59         gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
60         gpio_direction_output(EXYNOS5_GPIO_X17, 1);
61         gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
62 #endif
63 }
64
65 int exynos_init(void)
66 {
67         board_enable_audio_codec();
68
69         return 0;
70 }
71
72 static int exynos_set_regulator(const char *name, uint uv)
73 {
74         struct udevice *dev;
75         int ret;
76
77         ret = regulator_get_by_platname(name, &dev);
78         if (ret) {
79                 debug("%s: Cannot find regulator %s\n", __func__, name);
80                 return ret;
81         }
82         ret = regulator_set_value(dev, uv);
83         if (ret) {
84                 debug("%s: Cannot set regulator %s\n", __func__, name);
85                 return ret;
86         }
87
88         return 0;
89 }
90
91 int exynos_power_init(void)
92 {
93         struct udevice *dev;
94         int ret;
95
96         ret = pmic_get("max77686", &dev);
97         if (!ret) {
98                 /* TODO(sjg@chromium.org): Move into the clock/pmic API */
99                 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
100                                 MAX77686_32KHCP_EN);
101                 if (ret)
102                         return ret;
103                 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
104                                 MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
105                 if (ret)
106                         return ret;
107         } else {
108                 ret = pmic_get("s5m8767-pmic", &dev);
109                 /* TODO(sjg@chromium.org): Use driver model to access clock */
110 #ifdef CONFIG_PMIC_S5M8767
111                 if (!ret)
112                         s5m8767_enable_32khz_cp(dev);
113 #endif
114         }
115         if (ret == -ENODEV)
116                 return 0;
117
118         ret = regulators_enable_boot_on(false);
119         if (ret)
120                 return ret;
121
122         ret = exynos_set_regulator("vdd_mif", 1100000);
123         if (ret)
124                 return ret;
125
126         ret = exynos_set_regulator("vdd_arm", 1300000);
127         if (ret)
128                 return ret;
129         ret = exynos_set_regulator("vdd_int", 1012500);
130         if (ret)
131                 return ret;
132         ret = exynos_set_regulator("vdd_g3d", 1200000);
133         if (ret)
134                 return ret;
135
136         return 0;
137 }
138
139 int board_get_revision(void)
140 {
141         return 0;
142 }
143
144 #ifdef CONFIG_USB_DWC3
145 static struct dwc3_device dwc3_device_data = {
146         .maximum_speed = USB_SPEED_SUPER,
147         .base = 0x12400000,
148         .dr_mode = USB_DR_MODE_PERIPHERAL,
149         .index = 0,
150 };
151
152 int usb_gadget_handle_interrupts(void)
153 {
154         dwc3_uboot_handle_interrupt(0);
155         return 0;
156 }
157
158 int board_usb_init(int index, enum usb_init_type init)
159 {
160         struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
161                 samsung_get_base_usb3_phy();
162
163         if (!phy) {
164                 error("usb3 phy not supported");
165                 return -ENODEV;
166         }
167
168         set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
169         exynos5_usb3_phy_init(phy);
170
171         return dwc3_uboot_init(&dwc3_device_data);
172 }
173 #endif
174 #ifdef CONFIG_SET_DFU_ALT_INFO
175 char *get_dfu_alt_system(char *interface, char *devstr)
176 {
177         char *info = "Not supported!";
178
179         if (board_is_odroidxu4())
180                 return info;
181
182         return getenv("dfu_alt_system");
183 }
184
185 char *get_dfu_alt_boot(char *interface, char *devstr)
186 {
187         char *info = "Not supported!";
188         struct mmc *mmc;
189         char *alt_boot;
190         int dev_num;
191
192         if (board_is_odroidxu4())
193                 return info;
194
195         dev_num = simple_strtoul(devstr, NULL, 10);
196
197         mmc = find_mmc_device(dev_num);
198         if (!mmc)
199                 return NULL;
200
201         if (mmc_init(mmc))
202                 return NULL;
203
204         if (IS_SD(mmc))
205                 alt_boot = CONFIG_DFU_ALT_BOOT_SD;
206         else
207                 alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
208
209         return alt_boot;
210 }
211 #endif