git.sur5r.net Git - u-boot/blob - include/configs/devkit8000.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  *
   7  * (C) Copyright 2009
   8  * Frederik Kriewitz <frederik@kriewitz.eu>
   9  *
  10  * Configuration settings for the DevKit8000 board.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #ifndef __CONFIG_H
  16 #define __CONFIG_H
  17
  18 /* High Level Configuration Options */
  19 #define CONFIG_MACH_TYPE        MACH_TYPE_DEVKIT8000
  20
  21 /*
  22  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  23  * 64 bytes before this address should be set aside for u-boot.img's
  24  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  25  * other needs.
  26  */
  27
  28 #define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
  29 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  30
  31 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
  32 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
  33
  34 /*  Physical Memory Map  */
  35 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
  36
  37 #include <configs/ti_omap3_common.h>
  38
  39 #define CONFIG_MISC_INIT_R
  40
  41 #define CONFIG_REVISION_TAG             1
  42
  43 /* Size of malloc() pool */
  44 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  45                                                 /* Sector */
  46 #undef CONFIG_SYS_MALLOC_LEN
  47 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  48
  49 /* Hardware drivers */
  50 /* DM9000 */
  51 #define CONFIG_NET_RETRY_COUNT          20
  52 #define CONFIG_DRIVER_DM9000            1
  53 #define CONFIG_DM9000_BASE              0x2c000000
  54 #define DM9000_IO                       CONFIG_DM9000_BASE
  55 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 0x400)
  56 #define CONFIG_DM9000_USE_16BIT         1
  57 #define CONFIG_DM9000_NO_SROM           1
  58 #undef  CONFIG_DM9000_DEBUG
  59
  60 /* SPI */
  61 #undef CONFIG_SPI
  62
  63 /* I2C */
  64
  65 /* TWL4030 */
  66 #define CONFIG_TWL4030_LED              1
  67
  68 /* Board NAND Info */
  69
  70 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
  71                                                         /* to access nand */
  72 #define CONFIG_JFFS2_NAND
  73 /* nand device jffs2 lives on */
  74 #define CONFIG_JFFS2_DEV                "nand0"
  75 /* start of jffs2 partition */
  76 #define CONFIG_JFFS2_PART_OFFSET        0x680000
  77 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
  78                                                         /* partition */
  79
  80 #undef CONFIG_SUPPORT_RAW_INITRD
  81
  82 /* BOOTP/DHCP options */
  83 #define CONFIG_BOOTP_SUBNETMASK
  84 #define CONFIG_BOOTP_GATEWAY
  85 #define CONFIG_BOOTP_HOSTNAME
  86 #define CONFIG_BOOTP_NISDOMAIN
  87 #define CONFIG_BOOTP_BOOTPATH
  88 #define CONFIG_BOOTP_BOOTFILESIZE
  89 #define CONFIG_BOOTP_DNS
  90 #define CONFIG_BOOTP_DNS2
  91 #define CONFIG_BOOTP_SEND_HOSTNAME
  92 #define CONFIG_BOOTP_NTPSERVER
  93 #define CONFIG_BOOTP_TIMEOFFSET
  94 #undef CONFIG_BOOTP_VENDOREX
  95
  96 /* Environment information */
  97 #define CONFIG_EXTRA_ENV_SETTINGS \
  98         "loadaddr=0x82000000\0" \
  99         "console=ttyO2,115200n8\0" \
 100         "mmcdev=0\0" \
 101         "vram=12M\0" \
 102         "dvimode=1024x768MR-16@60\0" \
 103         "defaultdisplay=dvi\0" \
 104         "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
 105         "kernelopts=rw\0" \
 106         "commonargs=" \
 107                 "setenv bootargs console=${console} " \
 108                 "vram=${vram} " \
 109                 "omapfb.mode=dvi:${dvimode} " \
 110                 "omapdss.def_disp=${defaultdisplay}\0" \
 111         "mmcargs=" \
 112                 "run commonargs; " \
 113                 "setenv bootargs ${bootargs} " \
 114                 "root=/dev/mmcblk0p2 " \
 115                 "rootwait " \
 116                 "${kernelopts}\0" \
 117         "nandargs=" \
 118                 "run commonargs; " \
 119                 "setenv bootargs ${bootargs} " \
 120                 "omapfb.mode=dvi:${dvimode} " \
 121                 "omapdss.def_disp=${defaultdisplay} " \
 122                 "root=/dev/mtdblock4 " \
 123                 "rootfstype=jffs2 " \
 124                 "${kernelopts}\0" \
 125         "netargs=" \
 126                 "run commonargs; " \
 127                 "setenv bootargs ${bootargs} " \
 128                 "root=/dev/nfs " \
 129                 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
 130                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
 131                 "${kernelopts} " \
 132                 "dnsip1=${dnsip} " \
 133                 "dnsip2=${dnsip2}\0" \
 134         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 135         "bootscript=echo Running bootscript from mmc ...; " \
 136                 "source ${loadaddr}\0" \
 137         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 138         "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
 139         "mmcboot=echo Booting from mmc ...; " \
 140                 "run mmcargs; " \
 141                 "bootm ${loadaddr}\0" \
 142         "nandboot=echo Booting from nand ...; " \
 143                 "run nandargs; " \
 144                 "nand read ${loadaddr} 280000 400000; " \
 145                 "bootm ${loadaddr}\0" \
 146         "netboot=echo Booting from network ...; " \
 147                 "dhcp ${loadaddr}; " \
 148                 "run netargs; " \
 149                 "bootm ${loadaddr}\0" \
 150         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
 151                         "if run loadbootscript; then " \
 152                                 "run bootscript; " \
 153                         "else " \
 154                                 "if run loaduimage; then " \
 155                                         "run mmcboot; " \
 156                                 "else run nandboot; " \
 157                                 "fi; " \
 158                         "fi; " \
 159                 "else run nandboot; fi\0"
 160
 161 #define CONFIG_BOOTCOMMAND "run autoboot"
 162
 163 /* Boot Argument Buffer Size */
 164 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x07000000)
 165 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 166                                         0x01000000) /* 16MB */
 167
 168 /* NAND and environment organization  */
 169
 170 #define CONFIG_ENV_OFFSET               0x260000
 171
 172 /* SRAM config */
 173 #define CONFIG_SYS_SRAM_START              0x40200000
 174 #define CONFIG_SYS_SRAM_SIZE               0x10000
 175
 176 /* Defines for SPL */
 177
 178 #undef CONFIG_SPL_TEXT_BASE
 179 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 180
 181 /* NAND boot config */
 182 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 183 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 184 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 185 #define CONFIG_SYS_NAND_OOBSIZE         64
 186 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 187 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 188 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 189                                                 10, 11, 12, 13}
 190
 191 #define CONFIG_SYS_NAND_ECCSIZE         512
 192 #define CONFIG_SYS_NAND_ECCBYTES        3
 193 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
 194
 195 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 196 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x200000
 197
 198 /* SPL OS boot options */
 199 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
 200
 201 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
 202 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
 203 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
 204 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
 205 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x8   /* address 0x1000 */
 206 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  8     /* 4KB */
 207
 208 #undef CONFIG_SYS_SPL_ARGS_ADDR
 209 #define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
 210
 211 #endif /* __CONFIG_H */