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[u-boot] / include / configs / ls1046a_common.h
1 /*
2  * Copyright 2016 Freescale Semiconductor
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
9
10 /* SPL build */
11 #ifdef CONFIG_SPL_BUILD
12 #define SPL_NO_QBMAN
13 #define SPL_NO_FMAN
14 #define SPL_NO_ENV
15 #define SPL_NO_MISC
16 #define SPL_NO_QSPI
17 #define SPL_NO_USB
18 #define SPL_NO_SATA
19 #endif
20 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
21 #define SPL_NO_MMC
22 #endif
23 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
24 #define SPL_NO_IFC
25 #endif
26
27 #define CONFIG_REMAKE_ELF
28 #define CONFIG_FSL_LAYERSCAPE
29 #define CONFIG_MP
30 #define CONFIG_GICV2
31
32 #include <asm/arch/config.h>
33 #include <asm/arch/stream_id_lsch2.h>
34
35 /* Link Definitions */
36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
37
38 #define CONFIG_SKIP_LOWLEVEL_INIT
39
40 #define CONFIG_VERY_BIG_RAM
41 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
42 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
43 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
44 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
45
46 #define CPU_RELEASE_ADDR               secondary_boot_func
47
48 /* Generic Timer Definitions */
49 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
50
51 /* Size of malloc() pool */
52 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
53
54 /* Serial Port */
55 #define CONFIG_SYS_NS16550_SERIAL
56 #define CONFIG_SYS_NS16550_REG_SIZE     1
57 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
58
59 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
60
61 /* SD boot SPL */
62 #ifdef CONFIG_SD_BOOT
63 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
64 #define CONFIG_SPL_LIBCOMMON_SUPPORT
65 #define CONFIG_SPL_LIBGENERIC_SUPPORT
66 #define CONFIG_SPL_ENV_SUPPORT
67 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
68 #define CONFIG_SPL_WATCHDOG_SUPPORT
69 #define CONFIG_SPL_I2C_SUPPORT
70 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
71
72 #define CONFIG_SPL_MMC_SUPPORT
73 #define CONFIG_SPL_TEXT_BASE            0x10000000
74 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
75 #define CONFIG_SPL_STACK                0x10020000
76 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
77 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
78 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
79 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
80                                         CONFIG_SPL_BSS_MAX_SIZE)
81 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
82
83 #ifdef CONFIG_SECURE_BOOT
84 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
85 /*
86  * HDR would be appended at end of image and copied to DDR along
87  * with U-Boot image. Here u-boot max. size is 512K. So if binary
88  * size increases then increase this size in case of secure boot as
89  * it uses raw u-boot image instead of fit image.
90  */
91 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
92 #else
93 #define CONFIG_SYS_MONITOR_LEN          0x100000
94 #endif /* ifdef CONFIG_SECURE_BOOT */
95 #endif
96
97 /* NAND SPL */
98 #ifdef CONFIG_NAND_BOOT
99 #define CONFIG_SPL_PBL_PAD
100 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
101 #define CONFIG_SPL_LIBCOMMON_SUPPORT
102 #define CONFIG_SPL_LIBGENERIC_SUPPORT
103 #define CONFIG_SPL_ENV_SUPPORT
104 #define CONFIG_SPL_WATCHDOG_SUPPORT
105 #define CONFIG_SPL_I2C_SUPPORT
106 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
107
108 #define CONFIG_SPL_NAND_SUPPORT
109 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
110 #define CONFIG_SPL_TEXT_BASE            0x10000000
111 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
112 #define CONFIG_SPL_STACK                0x1001f000
113 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
114 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
115
116 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
117 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
118 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
119                                         CONFIG_SPL_BSS_MAX_SIZE)
120 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
121 #define CONFIG_SYS_MONITOR_LEN          0xa0000
122 #endif
123
124 /* I2C */
125 #define CONFIG_SYS_I2C
126
127 /* PCIe */
128 #define CONFIG_PCIE1            /* PCIE controller 1 */
129 #define CONFIG_PCIE2            /* PCIE controller 2 */
130 #define CONFIG_PCIE3            /* PCIE controller 3 */
131
132 #ifdef CONFIG_PCI
133 #define CONFIG_PCI_SCAN_SHOW
134 #endif
135
136 /* SATA */
137 #ifndef SPL_NO_SATA
138 #define CONFIG_SCSI_AHCI_PLAT
139
140 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
141
142 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
143 #define CONFIG_SYS_SCSI_MAX_LUN                 1
144 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
145                                                 CONFIG_SYS_SCSI_MAX_LUN)
146 #endif
147
148 /* Command line configuration */
149
150 /* MMC */
151 #ifndef SPL_NO_MMC
152 #ifdef CONFIG_MMC
153 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
154 #endif
155 #endif
156
157 /* FMan ucode */
158 #ifndef SPL_NO_FMAN
159 #define CONFIG_SYS_DPAA_FMAN
160 #ifdef CONFIG_SYS_DPAA_FMAN
161 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
162 #endif
163
164 #ifdef CONFIG_SD_BOOT
165 /*
166  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
167  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
168  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
169  */
170 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
171 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
172 #elif defined(CONFIG_QSPI_BOOT)
173 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
174 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
175 #define CONFIG_ENV_SPI_BUS              0
176 #define CONFIG_ENV_SPI_CS               0
177 #define CONFIG_ENV_SPI_MAX_HZ           1000000
178 #define CONFIG_ENV_SPI_MODE             0x03
179 #elif defined(CONFIG_NAND_BOOT)
180 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
181 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
182 #else
183 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
184 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
185 #endif
186 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
187 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
188 #endif
189
190 /* Miscellaneous configurable options */
191 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
192
193 #define CONFIG_HWCONFIG
194 #define HWCONFIG_BUFFER_SIZE            128
195
196 #ifndef CONFIG_SPL_BUILD
197 #define BOOT_TARGET_DEVICES(func) \
198         func(SCSI, scsi, 0) \
199         func(MMC, mmc, 0) \
200         func(USB, usb, 0)
201 #include <config_distro_bootcmd.h>
202 #endif
203
204 #ifndef SPL_NO_MISC
205 /* Initial environment variables */
206 #define CONFIG_EXTRA_ENV_SETTINGS               \
207         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
208         "ramdisk_addr=0x800000\0"               \
209         "ramdisk_size=0x2000000\0"              \
210         "fdt_high=0xffffffffffffffff\0"         \
211         "initrd_high=0xffffffffffffffff\0"      \
212         "fdt_addr=0x64f00000\0"                 \
213         "kernel_addr=0x65000000\0"              \
214         "scriptaddr=0x80000000\0"               \
215         "scripthdraddr=0x80080000\0"            \
216         "fdtheader_addr_r=0x80100000\0"         \
217         "kernelheader_addr_r=0x80200000\0"      \
218         "load_addr=0xa0000000\0"            \
219         "kernel_addr_r=0x81000000\0"            \
220         "fdt_addr_r=0x90000000\0"               \
221         "ramdisk_addr_r=0xa0000000\0"           \
222         "kernel_start=0x1000000\0"              \
223         "kernelheader_start=0x800000\0"         \
224         "kernel_load=0xa0000000\0"              \
225         "kernel_size=0x2800000\0"               \
226         "kernelheader_size=0x40000\0"           \
227         "kernel_addr_sd=0x8000\0"               \
228         "kernel_size_sd=0x14000\0"              \
229         "kernelhdr_addr_sd=0x4000\0"            \
230         "kernelhdr_size_sd=0x10\0"              \
231         "console=ttyS0,115200\0"                \
232          CONFIG_MTDPARTS_DEFAULT "\0"           \
233         BOOTENV                                 \
234         "boot_scripts=ls1046ardb_boot.scr\0"    \
235         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"       \
236         "scan_dev_for_boot_part="               \
237                 "part list ${devtype} ${devnum} devplist; "   \
238                 "env exists devplist || setenv devplist 1; "  \
239                 "for distro_bootpart in ${devplist}; do "     \
240                   "if fstype ${devtype} "                  \
241                         "${devnum}:${distro_bootpart} "      \
242                         "bootfstype; then "                  \
243                         "run scan_dev_for_boot; "            \
244                   "fi; "                                   \
245                 "done\0"                                   \
246         "scan_dev_for_boot="                              \
247                 "echo Scanning ${devtype} "               \
248                                 "${devnum}:${distro_bootpart}...; "  \
249                 "for prefix in ${boot_prefixes}; do "     \
250                         "run scan_dev_for_scripts; "      \
251                 "done;"                                   \
252                 "\0"                                      \
253         "boot_a_script="                                  \
254                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
255                         "${scriptaddr} ${prefix}${script}; "    \
256                 "env exists secureboot && load ${devtype} "     \
257                         "${devnum}:${distro_bootpart} "         \
258                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
259                         "&& esbc_validate ${scripthdraddr};"    \
260                 "source ${scriptaddr}\0"          \
261         "qspi_bootcmd=echo Trying load from qspi..;"      \
262                 "sf probe && sf read $load_addr "         \
263                 "$kernel_start $kernel_size; env exists secureboot "    \
264                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
265                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
266                 "bootm $load_addr#$board\0"             \
267         "sd_bootcmd=echo Trying load from SD ..;"       \
268                 "mmcinfo; mmc read $load_addr "         \
269                 "$kernel_addr_sd $kernel_size_sd && "   \
270                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
271                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
272                 " && esbc_validate ${kernelheader_addr_r};"     \
273                 "bootm $load_addr#$board\0"
274
275 #endif
276
277 /* Monitor Command Prompt */
278 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
279
280 #define CONFIG_SYS_MAXARGS              64      /* max command args */
281
282 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
283
284 #include <asm/arch/soc.h>
285
286 #endif /* __LS1046A_COMMON_H */