git.sur5r.net Git - u-boot/blob - include/configs/mx35pdk.h

   1 /*
   2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
   3  *
   4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
   5  *
   6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
   7  *
   8  * Configuration for the MX35pdk Freescale board.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #include <asm/arch/imx-regs.h>
  17
  18  /* High Level Configuration Options */
  19 #define CONFIG_MX35
  20
  21 #define CONFIG_SYS_FSL_CLK
  22
  23 /* Set TEXT at the beginning of the NOR flash */
  24
  25 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  26 #define CONFIG_REVISION_TAG
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29
  30 /*
  31  * Size of malloc() pool
  32  */
  33 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  34
  35 /*
  36  * Hardware drivers
  37  */
  38 #define CONFIG_SYS_I2C
  39 #define CONFIG_SYS_I2C_MXC
  40 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  41 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  42 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  43 #define CONFIG_MXC_SPI
  44
  45 /*
  46  * PMIC Configs
  47  */
  48 #define CONFIG_POWER
  49 #define CONFIG_POWER_I2C
  50 #define CONFIG_POWER_FSL
  51 #define CONFIG_POWER_FSL_MC13892
  52 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x08
  53 #define CONFIG_RTC_MC13XXX
  54
  55 /*
  56  * MFD MC9SDZ60
  57  */
  58 #define CONFIG_FSL_MC9SDZ60
  59 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR        0x69
  60
  61 /*
  62  * UART (console)
  63  */
  64 #define CONFIG_MXC_UART
  65 #define CONFIG_MXC_UART_BASE    UART1_BASE
  66
  67 /* allow to overwrite serial and ethaddr */
  68 #define CONFIG_ENV_OVERWRITE
  69 #define CONFIG_CONS_INDEX       1
  70
  71 /*
  72  * Command definition
  73  */
  74 #define CONFIG_BOOTP_SUBNETMASK
  75 #define CONFIG_BOOTP_GATEWAY
  76 #define CONFIG_BOOTP_DNS
  77
  78 #define CONFIG_NET_RETRY_COUNT  100
  79
  80
  81 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
  82
  83 /*
  84  * Ethernet on the debug board (SMC911)
  85  */
  86 #define CONFIG_HAS_ETH1
  87 #define CONFIG_ETHPRIME
  88
  89 /*
  90  * Ethernet on SOC (FEC)
  91  */
  92 #define CONFIG_FEC_MXC
  93 #define IMX_FEC_BASE    FEC_BASE_ADDR
  94 #define CONFIG_FEC_MXC_PHYADDR  0x1F
  95
  96 #define CONFIG_MII
  97
  98 #define CONFIG_ARP_TIMEOUT      200UL
  99
 100 /*
 101  * Miscellaneous configurable options
 102  */
 103 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
 104 #define CONFIG_CMDLINE_EDITING
 105
 106 #define CONFIG_AUTO_COMPLETE
 107
 108 #define CONFIG_SYS_MEMTEST_START        0       /* memtest works on */
 109 #define CONFIG_SYS_MEMTEST_END          0x10000
 110
 111 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 112
 113 /*
 114  * Physical Memory Map
 115  */
 116 #define CONFIG_NR_DRAM_BANKS    2
 117 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
 118 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 119 #define PHYS_SDRAM_2            CSD1_BASE_ADDR
 120 #define PHYS_SDRAM_2_SIZE       (128 * 1024 * 1024)
 121
 122 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
 123 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR + 0x10000)
 124 #define CONFIG_SYS_INIT_RAM_SIZE                (IRAM_SIZE / 2)
 125 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 126                                         GENERATED_GBL_DATA_SIZE)
 127 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 128                                         CONFIG_SYS_GBL_DATA_OFFSET)
 129
 130 /*
 131  * MTD Command for mtdparts
 132  */
 133 #define CONFIG_MTD_DEVICE
 134 #define CONFIG_FLASH_CFI_MTD
 135 #define CONFIG_MTD_PARTITIONS
 136
 137 /*
 138  * FLASH and environment organization
 139  */
 140 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
 141 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
 142 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
 143 /* Monitor at beginning of flash */
 144 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 145 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 146
 147 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 148 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 149
 150 /* Address and size of Redundant Environment Sector     */
 151 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 152 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 153
 154 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + \
 155                                 CONFIG_SYS_MONITOR_LEN)
 156
 157 #if defined(CONFIG_FSL_ENV_IN_NAND)
 158         #define CONFIG_ENV_OFFSET       (1024 * 1024)
 159 #endif
 160
 161 /*
 162  * CFI FLASH driver setup
 163  */
 164 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
 165 #define CONFIG_FLASH_CFI_DRIVER
 166
 167 /* A non-standard buffered write algorithm */
 168 #define CONFIG_FLASH_SPANSION_S29WS_N
 169 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* faster */
 170 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
 171
 172 /*
 173  * NAND FLASH driver setup
 174  */
 175 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
 176 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 177 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
 178 #define CONFIG_MXC_NAND_HWECC
 179 #define CONFIG_SYS_NAND_LARGEPAGE
 180
 181 /* EHCI driver */
 182 #define CONFIG_EHCI_IS_TDI
 183 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 184 #define CONFIG_USB_EHCI_MXC
 185 #define CONFIG_MXC_USB_PORT     0
 186 #define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERFACE_DIFF_UNI | \
 187                                  MXC_EHCI_POWER_PINS_ENABLED | \
 188                                  MXC_EHCI_OC_PIN_ACTIVE_LOW)
 189 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
 190
 191 /* mmc driver */
 192 #define CONFIG_FSL_ESDHC
 193 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 194 #define CONFIG_SYS_FSL_ESDHC_NUM        1
 195
 196 /*
 197  * Default environment and default scripts
 198  * to update uboot and load kernel
 199  */
 200
 201 #define CONFIG_HOSTNAME "mx35pdk"
 202 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 203         "netdev=eth1\0"                                                 \
 204         "ethprime=smc911x\0"                                            \
 205         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 206                 "nfsroot=${serverip}:${rootpath}\0"                     \
 207         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 208         "addip_sta=setenv bootargs ${bootargs} "                        \
 209                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 210                 ":${hostname}:${netdev}:off panic=1\0"                  \
 211         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 212         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 213                 "else run addip_sta;fi\0"                               \
 214         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 215         "addtty=setenv bootargs ${bootargs}"                            \
 216                 " console=ttymxc0,${baudrate}\0"                        \
 217         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 218         "loadaddr=80800000\0"                                           \
 219         "kernel_addr_r=80800000\0"                                      \
 220         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 221         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 222         "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"      \
 223         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 224                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 225         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 226                 "bootm ${kernel_addr}\0"                                \
 227         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 228                 "run nfsargs addip addtty addmtd addmisc;"              \
 229                 "bootm ${kernel_addr_r}\0"                              \
 230         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
 231                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
 232         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"          \
 233         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 234         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
 235         "update=protect off ${uboot_addr} +80000;"                      \
 236                 "erase ${uboot_addr} +80000;"                           \
 237                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
 238         "upd=if run load;then echo Updating u-boot;if run update;"      \
 239                 "then echo U-Boot updated;"                             \
 240                         "else echo Error updating u-boot !;"            \
 241                         "echo Board without bootloader !!;"             \
 242                 "fi;"                                                   \
 243                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 244         "bootcmd=run net_nfs\0"
 245
 246 #endif                          /* __CONFIG_H */