git.sur5r.net Git - u-boot/blob - include/configs/s32v234evb.h

   1 /*
   2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Configuration settings for the Freescale S32V234 EVB board.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_S32V234
  15
  16 /* Config GIC */
  17 #define CONFIG_GICV2
  18 #define GICD_BASE 0x7D001000
  19 #define GICC_BASE 0x7D002000
  20
  21 #define CONFIG_REMAKE_ELF
  22 #undef CONFIG_RUN_FROM_IRAM_ONLY
  23
  24 #define CONFIG_RUN_FROM_DDR1
  25 #undef CONFIG_RUN_FROM_DDR0
  26
  27 /* Run by default from DDR1  */
  28 #ifdef CONFIG_RUN_FROM_DDR0
  29 #define DDR_BASE_ADDR           0x80000000
  30 #else
  31 #define DDR_BASE_ADDR           0xC0000000
  32 #endif
  33
  34 #define CONFIG_MACH_TYPE                4146
  35
  36 #define CONFIG_SKIP_LOWLEVEL_INIT
  37
  38 /* Config CACHE */
  39 #define CONFIG_CMD_CACHE
  40
  41 #define CONFIG_SYS_FULL_VA
  42
  43 /* Enable passing of ATAGs */
  44 #define CONFIG_CMDLINE_TAG
  45
  46 /* SMP Spin Table Definitions */
  47 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  48
  49 /* Generic Timer Definitions */
  50 #define COUNTER_FREQUENCY               (1000000000)    /* 1000MHz */
  51 #define CONFIG_SYS_FSL_ERRATUM_A008585
  52
  53 /* Size of malloc() pool */
  54 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
  56 #else
  57 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  58 #endif
  59
  60 #define CONFIG_FSL_LINFLEXUART
  61 #define LINFLEXUART_BASE                LINFLEXD0_BASE_ADDR
  62
  63 #define CONFIG_DEBUG_UART_LINFLEXUART
  64 #define CONFIG_DEBUG_UART_BASE          LINFLEXUART_BASE
  65
  66 /* Allow to overwrite serial and ethaddr */
  67 #define CONFIG_ENV_OVERWRITE
  68 #define CONFIG_SYS_UART_PORT            (1)
  69
  70 #define CONFIG_FSL_USDHC
  71 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC_BASE_ADDR
  72 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  73
  74 #define CONFIG_CMD_MMC
  75 /* #define CONFIG_CMD_EXT2 EXT2 Support */
  76
  77 #if 0
  78
  79 /* Ethernet config */
  80 #define CONFIG_CMD_MII
  81 #define CONFIG_FEC_MXC
  82 #define CONFIG_MII
  83 #define IMX_FEC_BASE            ENET_BASE_ADDR
  84 #define CONFIG_FEC_XCV_TYPE     RMII
  85 #define CONFIG_FEC_MXC_PHYADDR  0
  86 #endif
  87
  88 #if 0                           /* Disable until the FLASH will be implemented */
  89 #define CONFIG_SYS_USE_NAND
  90 #endif
  91
  92 #ifdef CONFIG_SYS_USE_NAND
  93 /* Nand Flash Configs */
  94 #define CONFIG_JFFS2_NAND
  95 #define MTD_NAND_FSL_NFC_SWECC 1
  96 #define CONFIG_NAND_FSL_NFC
  97 #define CONFIG_SYS_NAND_BASE            0x400E0000
  98 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  99 #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 100 #define CONFIG_SYS_NAND_SELECT_DEVICE
 101 #define CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
 102 #endif
 103
 104 #define CONFIG_LOADADDR                 0xC307FFC0
 105
 106 #define CONFIG_EXTRA_ENV_SETTINGS \
 107         "boot_scripts=boot.scr.uimg boot.scr\0" \
 108         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
 109         "console=ttyLF0,115200\0" \
 110         "fdt_file=s32v234-evb.dtb\0" \
 111         "fdt_high=0xffffffff\0" \
 112         "initrd_high=0xffffffff\0" \
 113         "fdt_addr_r=0xC2000000\0" \
 114         "kernel_addr_r=0xC307FFC0\0" \
 115         "ramdisk_addr_r=0xC4000000\0" \
 116         "ramdisk=rootfs.uimg\0"\
 117         "ip_dyn=yes\0" \
 118         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 119         "update_sd_firmware_filename=u-boot.imx\0" \
 120         "update_sd_firmware=" \
 121                 "if test ${ip_dyn} = yes; then " \
 122                         "setenv get_cmd dhcp; " \
 123                 "else " \
 124                         "setenv get_cmd tftp; " \
 125                 "fi; " \
 126                 "if mmc dev ${mmcdev}; then "   \
 127                         "if ${get_cmd} ${update_sd_firmware_filename}; then " \
 128                                 "setexpr fw_sz ${filesize} / 0x200; " \
 129                                 "setexpr fw_sz ${fw_sz} + 1; "  \
 130                                 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
 131                         "fi; "  \
 132                 "fi\0" \
 133         "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
 134         "jtagboot=echo Booting using jtag...; " \
 135                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 136         "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
 137                 "run loaduimage; run loadramdisk; run loadfdt;"\
 138                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 139         "boot_net_usb_start=true\0" \
 140         BOOTENV
 141
 142 #define BOOT_TARGET_DEVICES(func) \
 143         func(MMC, mmc, 1) \
 144         func(MMC, mmc, 0) \
 145         func(DHCP, dhcp, na)
 146
 147 #define CONFIG_BOOTCOMMAND \
 148         "run distro_bootcmd"
 149
 150 #include <config_distro_bootcmd.h>
 151
 152 /* Miscellaneous configurable options */
 153 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 154 #define CONFIG_SYS_PROMPT               "=> "
 155
 156 #define CONFIG_SYS_MEMTEST_START        (DDR_BASE_ADDR)
 157 #define CONFIG_SYS_MEMTEST_END          (DDR_BASE_ADDR + 0x7C00000)
 158
 159 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 160 #define CONFIG_SYS_HZ                           1000
 161
 162 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
 163 #define CONFIG_SYS_MALLOC_BASE          (DDR_BASE_ADDR)
 164 #endif
 165
 166 #if 0
 167 /* Configure PXE */
 168 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
 169 #endif
 170
 171 /* Physical memory map */
 172 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
 173 #define CONFIG_NR_DRAM_BANKS            1
 174 #define PHYS_SDRAM                      (DDR_BASE_ADDR)
 175 #define PHYS_SDRAM_SIZE                 (256 * 1024 * 1024)
 176
 177 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 178 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 179 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 180
 181 #define CONFIG_SYS_INIT_SP_OFFSET \
 182         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 183 #define CONFIG_SYS_INIT_SP_ADDR \
 184         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 185
 186 /* environment organization */
 187 #define CONFIG_ENV_SIZE                 (8 * 1024)
 188
 189 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 190 #define CONFIG_SYS_MMC_ENV_DEV          0
 191
 192
 193 #define CONFIG_BOOTP_BOOTFILESIZE
 194
 195 #endif