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[u-boot] / include / configs / tam3517-common.h
1 /*
2  * Copyright (C) 2011
3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4  *
5  * Copyright (C) 2009 TechNexion Ltd.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __TAM3517_H
11 #define __TAM3517_H
12
13 /*
14  * High Level Configuration Options
15  */
16
17 #define CONFIG_SYS_TEXT_BASE 0x80008000
18
19 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
20
21 #include <asm/arch/cpu.h>               /* get chip and board defs */
22 #include <asm/arch/omap.h>
23
24 /* Clock Defines */
25 #define V_OSCK                  26000000        /* Clock output from T2 */
26 #define V_SCLK                  (V_OSCK >> 1)
27
28 #define CONFIG_MISC_INIT_R
29
30 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34
35 /*
36  * Size of malloc() pool
37  */
38 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
39 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
40                                         2 * 1024 * 1024)
41 /*
42  * DDR related
43  */
44 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
45
46 /*
47  * Hardware drivers
48  */
49
50 /*
51  * NS16550 Configuration
52  */
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
55 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
56
57 /*
58  * select serial console configuration
59  */
60 #define CONFIG_CONS_INDEX               1
61 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
62 #define CONFIG_SERIAL1                  /* UART1 */
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
67                                         115200}
68 /* EHCI */
69 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
70
71 #define CONFIG_SYS_I2C
72 #define CONFIG_SYS_OMAP24_I2C_SPEED     400000
73 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
74 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
75 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
76 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
77
78 /*
79  * Board NAND Info.
80  */
81 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
82                                                         /* to access */
83                                                         /* nand at CS0 */
84
85 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
86                                                         /* NAND devices */
87
88 #define CONFIG_AUTO_COMPLETE
89
90 /*
91  * Miscellaneous configurable options
92  */
93 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
94 #define CONFIG_CMDLINE_EDITING
95 #define CONFIG_AUTO_COMPLETE
96 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
97
98 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
99                                                 /* args */
100 /* memtest works on */
101 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
102 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
103                                         0x01F00000) /* 31MB */
104
105 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
106                                                                 /* address */
107
108 /*
109  * AM3517 has 12 GP timers, they can be driven by the system clock
110  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
111  * This rate is divided by a local divisor.
112  */
113 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
114 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
115
116 /*
117  * Physical Memory Map
118  */
119 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
120 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
121 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
122
123 /*
124  * FLASH and environment organization
125  */
126
127 /* **** PISMO SUPPORT *** */
128 #define CONFIG_NAND_OMAP_GPMC
129 #define SMNAND_ENV_OFFSET               0x180000 /* environment starts here */
130
131 /* Redundant Environment */
132 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
133 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
134 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
135 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
136                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
137 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
138
139 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
140 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
141 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
142 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
143                                          CONFIG_SYS_INIT_RAM_SIZE - \
144                                          GENERATED_GBL_DATA_SIZE)
145
146 /*
147  * ethernet support, EMAC
148  *
149  */
150 #define CONFIG_DRIVER_TI_EMAC
151 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
152 #define CONFIG_MII
153 #define CONFIG_BOOTP_DNS
154 #define CONFIG_BOOTP_DNS2
155 #define CONFIG_BOOTP_SEND_HOSTNAME
156 #define CONFIG_NET_RETRY_COUNT 10
157
158 /* Defines for SPL */
159 #define CONFIG_SPL_FRAMEWORK
160 #define CONFIG_SPL_CONSOLE
161 #define CONFIG_SPL_NAND_SIMPLE
162 #define CONFIG_SPL_NAND_SOFTECC
163 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
164
165 #define CONFIG_SPL_NAND_BASE
166 #define CONFIG_SPL_NAND_DRIVERS
167 #define CONFIG_SPL_NAND_ECC
168
169 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
170 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
171                                          CONFIG_SPL_TEXT_BASE)
172 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
173
174 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
175 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
176 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
177 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
178
179 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
180 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
181
182 /* FAT */
183 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
184 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "args"
185
186 /* RAW SD card / eMMC */
187 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900   /* address 0x120000 */
188 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x80    /* address 0x10000 */
189 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0x80    /* 64KiB */
190
191 /* NAND boot config */
192 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
193 #define CONFIG_SYS_NAND_PAGE_COUNT      64
194 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
195 #define CONFIG_SYS_NAND_OOBSIZE         64
196 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
197 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
198 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
199 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
200                                          48, 49, 50, 51, 52, 53, 54, 55,\
201                                          56, 57, 58, 59, 60, 61, 62, 63}
202 #define CONFIG_SYS_NAND_ECCSIZE         256
203 #define CONFIG_SYS_NAND_ECCBYTES        3
204 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
205 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
206
207 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
208
209 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
210 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
211
212 #define CONFIG_MTD_PARTITIONS
213 #define CONFIG_MTD_DEVICE
214
215 /* Setup MTD for NAND on the SOM */
216 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
217 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:512k(MLO)," \
218                                 "1m(u-boot),256k(env1)," \
219                                 "256k(env2),6m(kernel),-(rootfs)"
220
221 #define CONFIG_TAM3517_SETTINGS                                         \
222         "netdev=eth0\0"                                                 \
223         "nandargs=setenv bootargs root=${nandroot} "                    \
224                 "rootfstype=${nandrootfstype}\0"                        \
225         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
226                 "nfsroot=${serverip}:${rootpath}\0"                     \
227         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
228         "addip_sta=setenv bootargs ${bootargs} "                        \
229                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
230                 ":${hostname}:${netdev}:off panic=1\0"                  \
231         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
232         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
233                 "else run addip_sta;fi\0"                               \
234         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
235         "addtty=setenv bootargs ${bootargs}"                            \
236                 " console=ttyO0,${baudrate}\0"                          \
237         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
238         "loadaddr=82000000\0"                                           \
239         "kernel_addr_r=82000000\0"                                      \
240         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
241         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
242         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
243                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
244         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
245                 "bootm ${kernel_addr}\0"                                \
246         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
247                 "nand read ${kernel_addr_r} kernel\0"                   \
248                 "bootm ${kernel_addr_r}\0"                              \
249         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
250                 "run nfsargs addip addtty addmtd addmisc;"              \
251                 "bootm ${kernel_addr_r}\0"                              \
252         "net_self=if run net_self_load;then "                           \
253                 "run ramargs addip addtty addmtd addmisc;"              \
254                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
255                 "else echo Images not loades;fi\0"                      \
256         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
257         "load=tftp ${loadaddr} ${u-boot}\0"                             \
258         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
259         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
260         "uboot_addr=0x80000\0"                                          \
261         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
262                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
263         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
264                 "nand write ${loadaddr} 0 20000\0"                      \
265         "upd=if run load;then echo Updating u-boot;if run update;"      \
266                 "then echo U-Boot updated;"                             \
267                         "else echo Error updating u-boot !;"            \
268                         "echo Board without bootloader !!;"             \
269                 "fi;"                                                   \
270                 "else echo U-Boot not downloaded..exiting;fi\0"         \
271
272 /*
273  * this is common code for all TAM3517 boards.
274  * MAC address is stored from manufacturer in
275  * I2C EEPROM
276  */
277 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
278 /*
279  * The I2C EEPROM on the TAM3517 contains
280  * mac address and production data
281  */
282 struct tam3517_module_info {
283         char customer[48];
284         char product[48];
285
286         /*
287          * bit 0~47  : sequence number
288          * bit 48~55 : week of year, from 0.
289          * bit 56~63 : year
290          */
291         unsigned long long sequence_number;
292
293         /*
294          * bit 0~7   : revision fixed
295          * bit 8~15  : revision major
296          * bit 16~31 : TNxxx
297          */
298         unsigned int revision;
299         unsigned char eth_addr[4][8];
300         unsigned char _rev[100];
301 };
302
303 #define TAM3517_READ_EEPROM(info, ret) \
304 do {                                                            \
305         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
306         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
307                 (void *)info, sizeof(*info)))                   \
308                 ret = 1;                                        \
309         else                                                    \
310                 ret = 0;                                        \
311 } while (0)
312
313 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
314 do {                                                            \
315         char buf[80], ethname[20];                              \
316         int i;                                                  \
317         memset(buf, 0, sizeof(buf));                            \
318         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
319                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
320                         (info)->eth_addr[i][5],                 \
321                         (info)->eth_addr[i][4],                 \
322                         (info)->eth_addr[i][3],                 \
323                         (info)->eth_addr[i][2],                 \
324                         (info)->eth_addr[i][1],                 \
325                         (info)->eth_addr[i][0]);                        \
326                                                                 \
327                 if (i)                                          \
328                         sprintf(ethname, "eth%daddr", i);       \
329                 else                                            \
330                         strcpy(ethname, "ethaddr");             \
331                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
332                 env_set(ethname, buf);                          \
333         }                                                       \
334 } while (0)
335
336 /* The following macros are taken from Technexion's documentation */
337 #define TAM3517_sequence_number(info) \
338         ((info)->sequence_number % 0x1000000000000LL)
339 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
340 #define TAM3517_year(info) ((info)->sequence_number >> 56)
341 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
342 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
343 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
344
345 #define TAM3517_PRINT_SOM_INFO(info)                            \
346 do {                                                            \
347         printf("Vendor:%s\n", (info)->customer);                \
348         printf("SOM:   %s\n", (info)->product);                 \
349         printf("SeqNr: %02llu%02llu%012llu\n",                  \
350                 TAM3517_year(info),                             \
351                 TAM3517_week_of_year(info),                     \
352                 TAM3517_sequence_number(info));                 \
353         printf("Rev:   TN%u %u.%u\n",                           \
354                 TAM3517_revision_tn(info),                      \
355                 TAM3517_revision_major(info),                   \
356                 TAM3517_revision_fixed(info));                  \
357 } while (0)
358
359 #endif
360
361 #endif /* __TAM3517_H */