Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[u-boot] / arch / arm / dts / sun50i-a64-nanopi-a64.dts

diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
index 778636c73a338c0862845269e458c673ac662584..e2dce48fa29a096e8d9a155aeec64d9fcb9d685f 100644 (file)
--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
@@ -57,13 +57,6 @@
        chosen {
                stdout-path = "serial0:115200n8";
        };
-
-       reg_vcc3v3: vcc3v3 {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-       };
 };
 
 &ehci0 {
@@ -88,9 +81,8 @@
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins>;
-       vmmc-supply = <&reg_vcc3v3>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
-       cd-inverted;
+       vmmc-supply = <&reg_dcdc1>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
        disable-wp;
        bus-width = <4>;
        status = "okay";
@@ -104,6 +96,105 @@
        status = "okay";
 };
 
+&r_rsb {
+       status = "okay";
+
+       axp803: pmic@3a3 {
+               compatible = "x-powers,axp803";
+               reg = <0x3a3>;
+               interrupt-parent = <&r_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp803.dtsi"
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-3v";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1040000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-hdmi-dsi";
+};
+
+&reg_dldo4 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-pg-wifi-io";
+};
+
+&reg_eldo1 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "cpvdd";
+};
+
+&reg_fldo1 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins_a>;