ARM: socfpga: Repair A10 EMAC reset handling

[u-boot] / arch / arm / mach-socfpga / misc_arria10.c

diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index f909568312414f88c53ad0bfd512ee446f445f3b..e1d80a5a76a296ca8637299fc8328dc604ae3224 100644 (file)
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -41,8 +41,7 @@ static struct socfpga_system_manager *sysmgr_regs =
  * DesignWare Ethernet initialization
  */
 #ifdef CONFIG_ETH_DESIGNWARE
-void dwmac_deassert_reset(const unsigned int of_reset_id,
-                                const u32 phymode)
+static void arria10_dwmac_reset(const u8 of_reset_id, const u8 phymode)
 {
        u32 reset;
 
@@ -64,6 +63,20 @@ void dwmac_deassert_reset(const unsigned int of_reset_id,
        /* Release the EMAC controller from reset */
        socfpga_per_reset(reset, 0);
 }
+
+static int socfpga_eth_reset(void)
+{
+       /* Put all GMACs into RESET state. */
+       socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1);
+       socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1);
+       socfpga_per_reset(SOCFPGA_RESET(EMAC2), 1);
+       return socfpga_eth_reset_common(arria10_dwmac_reset);
+};
+#else
+static int socfpga_eth_reset(void)
+{
+       return 0;
+};
 #endif
 
 #if defined(CONFIG_SPL_BUILD)
@@ -251,6 +264,6 @@ int print_cpuinfo(void)
 #ifdef CONFIG_ARCH_MISC_INIT
 int arch_misc_init(void)
 {
-       return 0;
+       return socfpga_eth_reset();
 }
 #endif