+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductors, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
-#include <asm/arch/imx_lpi2c.h>
+#include <imx_lpi2c.h>
#include <asm/arch/sys_proto.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
-DECLARE_GLOBAL_DATA_PTR;
#define LPI2C_FIFO_SIZE 4
+#define LPI2C_NACK_TOUT_MS 1
#define LPI2C_TIMEOUT_MS 100
/* Weak linked function for overridden by some SoC power function */
static int bus_i2c_start(struct imx_lpi2c_reg *regs, u8 addr, u8 dir)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
u32 val;
result = imx_lpci2c_check_busy_bus(regs);
static int bus_i2c_stop(struct imx_lpi2c_reg *regs)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
u32 status;
+ ulong start_time;
result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
/* send stop command */
writel(LPI2C_MTDR_CMD(0x2), ®s->mtdr);
- while (result == LPI2C_SUCESS) {
+ start_time = get_timer(0);
+ while (1) {
status = readl(®s->msr);
result = imx_lpci2c_check_clear_error(regs);
/* stop detect flag */
writel(status, ®s->msr);
break;
}
+
+ if (get_timer(start_time) > LPI2C_NACK_TOUT_MS) {
+ debug("stop timeout\n");
+ return -ETIMEDOUT;
+ }
}
return result;
static int bus_i2c_read(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
result = bus_i2c_start(regs, chip, 1);
if (result)
static int bus_i2c_write(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
result = bus_i2c_start(regs, chip, 0);
if (result)
int i;
regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
- clock_rate = imx_get_i2cclk(bus->seq + 4);
+ clock_rate = imx_get_i2cclk(bus->seq);
if (!clock_rate)
return -EPERM;
u32 chip_flags)
{
struct imx_lpi2c_reg *regs;
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
result = bus_i2c_start(regs, chip, 0);
}
result = bus_i2c_stop(regs);
- if (result) {
+ if (result)
bus_i2c_init(bus, 100000);
- return -result;
- }
return result;
}
i2c_bus->bus = bus;
/* power up i2c resource */
- ret = init_i2c_power(bus->seq + 4);
+ ret = init_i2c_power(bus->seq);
if (ret) {
debug("init_i2c_power err = %d\n", ret);
return ret;
}
- /* Enable clk, only i2c4-7 can be handled by A7 core */
- ret = enable_i2c_clk(1, bus->seq + 4);
+ /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
+ ret = enable_i2c_clk(1, bus->seq);
if (ret < 0)
return ret;
static const struct udevice_id imx_lpi2c_ids[] = {
{ .compatible = "fsl,imx7ulp-lpi2c", },
+ { .compatible = "fsl,imx8qm-lpi2c", },
{}
};