net: designware: Add reset ctrl to driver

[u-boot] / drivers / net / designware.c

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index cf125210d88cb66d50252a9fa3023b71a96051c0..19db0a8114ae8bc0c37766f294486ea64980ad0b 100644 (file)
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -15,6 +15,7 @@
 #include <miiphy.h>
 #include <malloc.h>
 #include <pci.h>
+#include <reset.h>
 #include <linux/compiler.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
@@ -280,6 +281,15 @@ int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
 
        writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode);
 
+       /*
+        * When a MII PHY is used, we must set the PS bit for the DMA
+        * reset to succeed.
+        */
+       if (priv->phydev->interface == PHY_INTERFACE_MODE_MII)
+               writel(readl(&mac_p->conf) | MII_PORTSELECT, &mac_p->conf);
+       else
+               writel(readl(&mac_p->conf) & ~MII_PORTSELECT, &mac_p->conf);
+
        start = get_timer(0);
        while (readl(&dma_p->busmode) & DMAMAC_SRST) {
                if (get_timer(start) >= CONFIG_MACRESET_TIMEOUT) {
@@ -664,6 +674,7 @@ int designware_eth_probe(struct udevice *dev)
        u32 iobase = pdata->iobase;
        ulong ioaddr;
        int ret;
+       struct reset_ctl_bulk reset_bulk;
 #ifdef CONFIG_CLK
        int i, err, clock_nb;
 
@@ -710,6 +721,12 @@ int designware_eth_probe(struct udevice *dev)
        }
 #endif
 
+       ret = reset_get_bulk(dev, &reset_bulk);
+       if (ret)
+               dev_warn(dev, "Can't get reset: %d\n", ret);
+       else
+               reset_deassert_bulk(&reset_bulk);
+
 #ifdef CONFIG_DM_PCI
        /*
         * If we are on PCI bus, either directly attached to a PCI root port,