]> git.sur5r.net Git - u-boot/commit
MIPS: Fix invalidate_dcache_range to operate on L1 Dcache
authorPaul Burton <paul.burton@imgtec.com>
Thu, 9 Jun 2016 12:09:51 +0000 (13:09 +0100)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 10 Jun 2016 10:27:29 +0000 (12:27 +0200)
commita95800e881a8df837f0c4121a2cd560a4c02bd2f
treecd113e5378ef3e0d720a97c40fabff9738467565
parent6b3943f1b04be60f147ee540fbd72c4c7ea89f80
MIPS: Fix invalidate_dcache_range to operate on L1 Dcache

Commit fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
accidentally modified invalidate_dcache_range to operate on the L1
Icache instead of the Dcache. Fix the cache op used to operate on the
Dcache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
arch/mips/lib/cache.c