Bin Meng [Thu, 28 Sep 2017 04:50:07 +0000 (21:50 -0700)]
usb: storage: Fix overwritten in usb_stor_set_max_xfer_blk()
The stored 'blk' value is overwritten to 'size / 512' before it can
be used in usb_stor_set_max_xfer_blk(). This is not what we want.
In fact, when 'size' exceeds the upper limit (USHRT_MAX * 512), we
should simply assign 'size' to the upper limit.
Reported-by: Coverity (CID: 167250) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Mon, 18 Sep 2017 13:40:48 +0000 (06:40 -0700)]
usb: xhci: Program max burst size for endpoint
The 'Max Burst Size' indicates to the xHC the maximum number of
consecutive USB transactions that should be executed per scheduling
opportunity. This is a “zero-based” value, where 0 to 15 represents
burst sizes of 1 to 16, but at present this is always set to zero.
Let's program the required value according to real needs.
Bin Meng [Mon, 18 Sep 2017 13:40:47 +0000 (06:40 -0700)]
usb: xhci: Honor endpoint's interval
USB endpoint reports the period between consecutive requests to send
or receive data as bInverval in its endpoint descriptor. So far this
is ignored by xHCI driver and the 'Interval' field in xHC's endpoint
context is always programmed to zero which means 1ms for low speed
or full speed , or 125us for high speed or super speed. We should
honor the interval by getting it from endpoint descriptor.
Bin Meng [Mon, 18 Sep 2017 13:40:45 +0000 (06:40 -0700)]
usb: hub: Clear port reset before usb_hub_port_connect_change()
During usb_hub_port_connect_change(), a port reset set feature
request is issued to the port, and later a port reset clear feature
is done to the same port before the function returns. However at
the end of usb_scan_port(), we attempt to clear port reset again
on a cached port status change variable, which should not be done.
Adjust the call to clear port reset to right before the call to
usb_hub_port_connect_change().
Bin Meng [Mon, 18 Sep 2017 13:40:44 +0000 (06:40 -0700)]
usb: xhci: Fix max packet size for full speed device endpoint 0
In xhci_check_maxpacket(), the control endpoint 0 max packet size
is wrongly taken from the interface's endpoint descriptor. However
the default endpoint 0 does not come with an endpoint descriptor
hence is not included in the interface structure. Change to use
epmaxpacketin[0] instead.
The other bug in this routine is that when setting max packet size
to the xHC endpoint 0 context, it does not clear its previous value
at all before programming a new one.
Bin Meng [Mon, 18 Sep 2017 13:40:43 +0000 (06:40 -0700)]
usb: Read device descriptor after device is addressed for xHCI
For xHCI it is not possible to read a device descriptor before it
has been assigned an address. That's why usb_setup_descriptor()
was called with 'do_read' being false. But we really need try to
read the device descriptor before starting any real communication
with the default control endpoint.
Bin Meng [Mon, 18 Sep 2017 13:40:42 +0000 (06:40 -0700)]
usb: Only get 64 bytes device descriptor for full speed devices
Full speed device endpoint 0 can have 8/16/32/64 bMaxPacketSize0.
Other speed devices report fixed value per USB spec. So it only
makes sense if we send a get device descriptor with 64 bytes to
full speed devices.
While we are here, update the comment block to be within 80 cols.
Bin Meng [Mon, 18 Sep 2017 13:40:41 +0000 (06:40 -0700)]
usb: xhci: Add interrupt transfer support
xHCI uses normal TRBs for both bulk and interrupt. This adds the
missing interrupt transfer support to xHCI so that devices like
USB keyboard that uses interrupt transfer can work.
Bin Meng [Mon, 18 Sep 2017 13:40:39 +0000 (06:40 -0700)]
usb: xhci: Don't assume LS/FS devices are always behind a HS hub
At present xHCI driver assumes LS/FS devices are attached directly
to a HS hub. If they are connected to a LS/FS hub, the driver will
fail to perform the USB enumeration process on such devices.
This is fixed by looking from the device itself all the way up to
the HS hub where the TT that serves the device is located.
Bin Meng [Sun, 1 Oct 2017 13:19:45 +0000 (06:19 -0700)]
test: dm: usb: Update test cases for USB
Now that we have changed to remove all devices under the root hub in
usb_stop(), and corrected the USB emulator select logic, it makes no
sense to do various tests based on 'usb tree' output since the order
of devices is no longer fixed. Remove these USB test cases related
to 'usb tree'.
For the USB remove test, ideally we should remove an emulator device
node from the device tree, but this is so far not working. Change to
test the 'usb stop' only.
Bin Meng [Sun, 1 Oct 2017 13:19:44 +0000 (06:19 -0700)]
dm: usb: emul: Drop usb_emul_reset()
With the root hub unbinding in usb_stop(), there is no need to do
a Sandbox-specific reset operation. usb_emul_reset() is no longer
used anywhere, drop it.
Bin Meng [Sun, 1 Oct 2017 13:19:42 +0000 (06:19 -0700)]
dm: usb: Fix broken usb_stop()
At present we only do device_remove() during usb stop. The DM API
device_remove() only marks the device state as inactivated, but
still keeps its USB topology (eg: parent, children, etc) in the DM
device structure. There is no issue if we only start USB subsystem
once and never stop it. But a big issue occurs when we do 'usb stop'
and 'usb start' multiple times.
Strange things may be observed with current implementation, like:
- the enumeration may report only 1 mass storage device is detected,
but the total number of USB devices is correct.
- USB keyboard does not work anymore after a bunch of 'usb reset'
even if 'usb tree' shows it is correctly identified.
- read/write flash drive via 'fatload usb' may complain "Bad device"
In fact, every time when USB host controller starts the enumeration
process, it takes random time for each USB port to show up online,
hence each USB device may appear in a different order from previous
enumeration, and gets assigned to a totally different USB address.
As a result, we end up using a stale USB topology in the DM device
structure which still reflects the previous enumeration result, and
it may create an exact same DM device name like generic_bus_0_dev_7
that is already in the DM device structure. And since the DM device
structure is there, there is no device_bind() call to bind driver to
the device during current enumeration process, eventually creating
an inconsistent software representation of the hardware topology, a
non-working USB subsystem.
The fix is to clear the unused USB topology in the usb_stop(), by
calling device_unbind() on each controller's root hub device, and
the unbinding will unbind all of its children automatically.
For Sandbox, we need scan the device tree each time when we start
the USB stack, in order to re-create the emulated USB devices and
bind drivers for them before we actually do the driver probe.
Bin Meng [Sun, 1 Oct 2017 13:19:41 +0000 (06:19 -0700)]
usb: emul: hub: Report the actual device speed of the emulation device
At present the usb hub emulator always reports its downstream port
speed as full speed. Actually it is high speed for sandbox-flash,
and low speed for sandbox-keyb. We can determine the device speed
by checking its device descriptor bcdUSB field, and do the proper
hub port status report based on that.
Bin Meng [Sun, 1 Oct 2017 13:19:39 +0000 (06:19 -0700)]
usb: sandbox: Fix emulator device select logic in usb_emul_find_devnum()
Current emulator select logic in usb_emul_find_devnum() is to test
the USB address. The USB address of the device being enumerated is
initialized to zero at the beginning of the enumeration process in
usb_setup_device(). At this point, the saved USB address in the
platform data has not been assigned to any valid USB address either.
This means: the logic will select an emulator device according to
its sequence of declaring order in the device tree. Take test.dts
for example, flash-stick@0 will be selected before flash-stick@1.
But unfortunately such logic is wrong.
In fact USB devices show up in a random order during the enumeration
which means usb_emul_find_devnum() may be called on port 3 for keyb@3
before on port 0 for flash-stick@0.
To fix this, we introduce a new emulator uclass specific platdata
to store the USB device's port number on its parent hub, and update
the logic to test the port number instead.
Bin Meng [Sun, 1 Oct 2017 13:19:38 +0000 (06:19 -0700)]
usb: sandbox: Initialize root hub's device speed to high speed
At present 'usb tree' shows that the root hub on the Sandbox USB
controller is at full speed. But its device descriptor says it's
USB 2.0, so let's report it as a high speed device.
Kever Yang [Wed, 13 Sep 2017 01:39:06 +0000 (09:39 +0800)]
rockchip: enable TPL_SYSRESET for all rockchip SoCs
With Makefiles testing for $(SPL_TPL_)SYSRESET, we need TPL_SYSRESET
for do_reset() in TPL for Rockchip SoCs.
References: 87c16d4 "drivers: spl: consistently use the $(SPL_TPL_)
macro"
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Wed, 27 Sep 2017 17:33:14 +0000 (23:03 +0530)]
rk3288: spl: Add dram_init_banksize
Falcon mode, is updating DDR dt node configuration through
spl_fixup_fdt() so add appropriate DDR base and size through
dram_init_banksize.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 29 Sep 2017 17:28:03 +0000 (19:28 +0200)]
rockchip: defconfig: puma-rk3399: update for DM_REGULATOR support in SPL
The RK3399-Q7 requires DM regulator support in SPL, so we can use the
regulator framework to reenable the eMMC and SPI, if these had been
turned of by the BIOS_DISABLE signal.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:28:01 +0000 (19:28 +0200)]
rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the
eMMC and SPI in reset initially and we need to write a GPIO to turn
them on before continuing the boot-up.
This adds the DTS entries for the additional regulator and makes
pinctrl and gpio3 available during SPL. It also adds a hook to the
spl_board_init() to ensure that the regulator gets probed and enabled.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:28:00 +0000 (19:28 +0200)]
rockchip: puma-rk3399: update board_init()
The original initialisation code for board_init() was largely lifted
from the code on the EVB. However, the RK3399-Q7 can do with a much
more concise init sequence.
This cleans up the board_init() by updating it to the essentials for
the RK3399-Q7 and getting rid of the accumulated cruft.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:27:59 +0000 (19:27 +0200)]
rockchip: dts: rk3399-puma: add 'same-as-spl' to the front of the boot-order
In the general case, we want to continue booting the full U-Boot
(contained in a discoverable FIT image) from the same device the SPL
stage was loaded from. This prepends the 'same-as-spl' specifier to
our configurable boot-order to make this the default behaviour.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
To support the new "same-as-spl" specifier in the boot-order on the
RK3399, this implements the chip-specific mapping from the information
obtainable from the BROM to a OF path name.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:27:57 +0000 (19:27 +0200)]
rockchip: spl: support a 'same-as-spl'-specifier in the spl-boot-order
It is often desirable to configure the spl-boot-order (i.e. the order
that SPL probes devices to find the FIT image containing a full U-Boot)
such that it contains 'the same device the SPL stage was booted from'
early on. To support this, we introduce the 'same-as-spl' specifier
for the spl-boot-order property.
This commit adds:
- documentation for the new board_spl_was_booted_from() function that
individual SoCs/boards should provide, if they can determine where
the SPL was booted from
- implements the new board_spl_was_booted_from() stub function
- adds support for handling the 'same-as-spl' specifier and calling
into the per-SoC/per-board support code.
This also updates the documentation for the 'u-boot,spl-boot-order'
property.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:27:56 +0000 (19:27 +0200)]
rockchip: spl: add documentation for spl_node_to_boot_device()
In the expectation that the spl-boot-order code will eventually
gain use outside of mach-rockchip: let's add documentation on the
spl_node_to_boot_device() function, which is likely to become a
publicly exported function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:27:55 +0000 (19:27 +0200)]
rockchip: bootrom: add definitions to retrieve BROM boot-source
The Rockchip BROM allows reading where it booted from from SRAM.
This adds the necessary definitions (as received from Kever) for
the location of this information in the RK3399's SRAM and naming
for the constants used.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 29 Sep 2017 17:27:54 +0000 (19:27 +0200)]
rockchip: rk3399: make spl_board_init board-specific
The later-stage spl_board_init (as opposed to board_init_f) should set
up board-specific details: these differ between the EVB-RK3399 and the
RK3399-Q7 (Puma).
This moves spl_board_init back into the individual boards and removes
the unneeded functionality from Puma.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
evb-rk3399: avoid redefinition of CONFIG_ENV_OFFSET
CONFIG_ENV_OFFSET is already defined in
include/configs/rockchip-common.h
For CONFIG_ROCKCHIP_BACK_TO_BROM=y we redefine CONFIG_ENV_OFFSET
to an unsuitable value. We were lucky to get a compiler warning.
Remove the incorrect redefinition.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 22 Aug 2017 07:34:58 +0000 (15:34 +0800)]
rockchip: rk322x: update the sysreg number for boot mode
The boot mode for rk322x is stored in sysreg 0, update it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 19 Sep 2017 13:49:14 +0000 (15:49 +0200)]
rockchip: pinctrl: rk3368: add pinctrl for SDMMC0
Apparently, our earlier assumption that the BROM will always set up
the iomux for SDcard communication does not always hold true: when
booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard
pins are not set up and need to be configured by the pinctrl driver to
allow SD card access.
This change implements support for setting up the SDMMC pins in
pinctrl for the RK3368.
Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 15 Sep 2017 13:57:15 +0000 (15:57 +0200)]
rockchip: board: lion-rk3368: avoid ATF overwriting active SPL stage
The RK3368-uQ7 ATF has been moved back to 0x100000 (1MB from the start
of DRAM) to avoid it overwriting the active SPL stage during FIT image
loading. This change adapts the .its to match up (again) with our ATF
repository for the RK3368-uQ7.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Jagan Teki [Wed, 27 Sep 2017 17:33:13 +0000 (23:03 +0530)]
rk3288: vyasa: Add falcon mode support
Add Falcon mode support in vyasa rk3288 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Wed, 27 Sep 2017 17:33:12 +0000 (23:03 +0530)]
rk3288: vyasa: Add TPL support
Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
it is not possible add new SPL features like Falcon mode or etc.
So add TPL stage so-that adding new features to SPL is possible.
- TPL: DRAM init, clocks
- SPL: MMC, falcon, etc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Wed, 27 Sep 2017 17:33:11 +0000 (23:03 +0530)]
armv7: rk3288: Move configure_l2ctlr to common
configure_l2ctlr will be shared between SPL and TPL so
move them into asm/arch/sys_proto.h
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Wed, 27 Sep 2017 17:33:10 +0000 (23:03 +0530)]
armv7: Move L2CTLR read/write to common
L2CTLR read/write functions are common to armv7 so, move
them in to include/asm/armv7.h and use them where ever it need.
Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Backed out the change to arch/arm/mach-tegra/cache.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 28 Sep 2017 10:24:03 +0000 (18:24 +0800)]
rockchip: rk322x: fix pd_bus hclk/pclk
The pd_bus hclk/pclk source is pd_bus aclk, not the PLL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 09:57:28 +0000 (17:57 +0800)]
rockchip: mkimage: add support for rk3128 soc
Add support for rk3128 package header in mkimage tool.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:59:56 +0000 (16:59 +0800)]
rockchip: clk: fix typo in rk322x clock driver
Fix typo RK322X/RK3036 in rk322x clock driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 11 Sep 2017 10:48:12 +0000 (12:48 +0200)]
rockchip: rk3399: spl: convert to using BOOT_DEVICE_BOOTROM
Instead of directly calling into the back-to-bootrom code, the RK3399
common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a
transfer back into the bootrom.
With this factored out, the spl_board_init function can not be
customised for each RK3399 board.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 25 Sep 2017 08:33:22 +0000 (16:33 +0800)]
rockchip: rk3188: ram: add support for 16bit row address
RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed compile-error by declaring 'row':] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:38:22 +0000 (16:38 +0800)]
rockchip: rk322x: add sdram driver
Add driver for rk322x to support sdram initialize in SPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:11:33 +0000 (16:11 +0800)]
rockchip: rk3328: move sdram driver to driver/ram
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:11:32 +0000 (16:11 +0800)]
rockchip: rk3288: move sdram driver to driver/ram
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:11:31 +0000 (16:11 +0800)]
rockchip: rk3188: move sdram driver to driver/ram
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 27 Sep 2017 08:11:30 +0000 (16:11 +0800)]
rockchip: rk3399: move sdram driver to driver/ram
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Wed, 20 Sep 2017 11:50:13 +0000 (13:50 +0200)]
rockchip: imply ADC and SARADC_ROCKCHIP for Rockchip SOCs
Enable the Rockchip SARADC driver for all Rockchip SoCs.
Note that the SARADC peripheral is available on all SoCs except the
RK3036 and RK3228. However, as this is a DM-driver, enabling by
default will not cause any function problems (and can always be
changed from defconfig, if size is a concern).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: David Wu <david.wu@rock-chips.com>
David Wu [Wed, 20 Sep 2017 06:47:19 +0000 (14:47 +0800)]
rockchip: dts: Enable SARADC for rk3399-evb
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:46:19 +0000 (14:46 +0800)]
rockchip: dts: Enable SARADC for rk3368-sheep
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:45:21 +0000 (14:45 +0800)]
rockchip: dts: Enable SARADC for rk3368-px5-evb
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:44:23 +0000 (14:44 +0800)]
rockchip: dts: Enable SARADC for rk3328-evb
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:43:08 +0000 (14:43 +0800)]
rockchip: dts: Enable SARADC for rk3288-popmetal
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:41:38 +0000 (14:41 +0800)]
rockchip: dts: Enable SARADC for rv1108-evb
Enable the SARADC for download key pressed detect.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:40:11 +0000 (14:40 +0800)]
rockchip: dts: rv1108: Add SARADC node at dtsi level
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:38:58 +0000 (14:38 +0800)]
rockchip: clk: Add rk3399 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 8-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:37:50 +0000 (14:37 +0800)]
rockchip: clk: Add rk3368 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 8-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:35:44 +0000 (14:35 +0800)]
rockchip: clk: Add rk3328 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:28:19 +0000 (14:28 +0800)]
rockchip: clk: Add SARADC clock support for rk3288
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 8-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:28:18 +0000 (14:28 +0800)]
rockchip: clk: Add rv1108 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
David Wu [Wed, 20 Sep 2017 06:28:16 +0000 (14:28 +0800)]
dm: adc: Add driver for Rockchip SARADC
The ADC can support some channels signal-ended some bits Successive Approximation
Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog
input signal into some bits binary digital codes.
Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sam Protsenko [Thu, 21 Sep 2017 19:37:59 +0000 (22:37 +0300)]
env: ti: boot: Show boot status information
Add tracing printings to Linux/Android boot commands, so that we can see
what's going on. Helps to trace possible bugs on early stages and
improves the output for user (which is especially useful, because we
have a bunch of boot commands executing one by one).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Sam Protsenko [Thu, 21 Sep 2017 19:37:58 +0000 (22:37 +0300)]
env: ti: boot: Extract command for eMMC Linux boot
Extract commands for booting Linux from eMMC to separate command. It
seems more logical that way, and allows us to run the whole command set
from U-Boot shell with only one command.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Sam Protsenko [Thu, 21 Sep 2017 19:37:57 +0000 (22:37 +0300)]
arm: dra7xx: Fix Linux boot from eMMC
Right now on OMAP5-based boards we have only one partition defined for
Linux boot, which is rootfs. That doesn't work with bootpart=1:2 (that
is defined in include/environment/ti/boot.h). To fix Linux boot we may
either:
1. Change bootpart to be 1:1
2. Or add preceding partition, so that rootfs is actually 1:2
Second choice seems more reasonable, as DFU is already using similar
partition table and can rely on bootpart to be 1:2.
This patch adds "bootloader" partition. So now eMMC layout for Linux
boot looks like this:
Guard hole appears because U-Boot environment offset was calculated for
Android partition table, which has two additional partitions in place of
that hole ("environment" and "misc" partitions).
This patch also changes rootfs offset from 2 MiB further to 2688 KiB,
so that there won't be any collisions with U-Boot environment when we
flash rootfs.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Sam Protsenko [Thu, 21 Sep 2017 19:37:56 +0000 (22:37 +0300)]
arm: am57xx: Fix Linux boot from eMMC
Right now on OMAP5-based boards we have only one partition defined for
Linux boot, which is rootfs. That doesn't work with bootpart=1:2 (that
is defined in include/environment/ti/boot.h). To fix Linux boot we may
either:
1. Change bootpart to be 1:1
2. Or add preceding partition, so that rootfs is actually 1:2
Second choice seems more reasonable, as DFU is already using similar
partition table and can rely on bootpart to be 1:2.
This patch adds "bootloader" partition. So now eMMC layout for Linux
boot looks like this:
Guard hole appears because U-Boot environment offset was calculated for
Android partition table, which has two additional partitions in place of
that hole ("environment" and "misc" partitions).
This patch also changes rootfs offset from 2 MiB further to 2688 KiB,
so that there won't be any collisions with U-Boot environment when we
flash rootfs.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
This re-syncs omap3 DTS file with current file from
Linux v4.14-rc1 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from usbhsohci,
usbhsehci, ssi_port1 and ssi_port2 sub nodes.
Andrew F. Davis [Wed, 20 Sep 2017 19:45:09 +0000 (14:45 -0500)]
configs: k2g_evm: Make findfdt command populate fdtfile variable
On all other platforms the command 'findfdt' populates the variable
'fdtfile', but on K2G we only populate 'name_fdt'. The generic boot
and automation scripts fail when 'findfdt' is not populated, fix
this for K2G.
arm: am33xx: security: adds auth support for encrypted images
This patch adds support for authentication of both plain
text and encrypted binaries. A new SECDEV package is needed
to enable encryption of binaries by default for AM3x.
The ROM authentication API detects encrypted images at
runtime and automatically decrypts the image if the
signature verification passes.
Addition of encryption on AM3x results in a change in the
image format. On AM4x, AM5x and, on AM3x devices signing
clear test images, the signature is appended to the end of the
binary.
On AM3x, when the SECDEV package is used to create signed
and encrypted images, the signature is added as a header
to the start of the binary. So the binary size calculation
has been updated to reflect this change.
The signing tools and encrypted image format for AM3x
cannot be changed to behave like AM4x and AM5x to
maintain backward compatibility with older Sitara
M-Shield releases.
Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
Adam Ford [Wed, 20 Sep 2017 01:32:10 +0000 (20:32 -0500)]
arm: dts: am3517_evm: Sync DTS files with Linux 4.13-RC5
To keep the DTS and DTSI files clean and in sync with Linux, new
u-boot.dtsi files are added.
There are some spacing issues in the patch, but they appear to be
present in the Linux source files. I'll try to get to fixing them there,
and do a future re-sync at a later date.
Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
Corresponds to 375506d (File writing nit) from upstream
(https://github.com/ulfalizer/Kconfiglib).
Adds proper 'imply' support and fixes a few minor issues, one of which
previously triggered the following weird warning:
configs/taurus_defconfig: /tmp/tmpisI45S:6: warning: assignment to SPL_LDSCRIPT changes mode of containing choice from "arch/$(ARCH)/cpu/u-boot-spl.lds" to "y"
The change in 8639f69 (genconfig.py: Print defconfig next to warnings)
was reapplied.
tools/moveconfig.py previously depended on a hack that merged 'select's
with 'imply's. It was modified to look at the union of
Symbol.get_selected_symbols() and Symbol.get_implied_symbols(), which
should give the same behavior.
tools/genboardscfg.py was verified to produce identical board.cfg's
before and after the change.
Checkpatch can use two dictionaries for finding typos:
* scripts/spelling.txt
* /usr/share/codespell/dictionary.txt
which comes with package codespell and is selected by parameter
--codespell
If the file scripts/spelling.txt is missing, a warning is shown.
Add the spelling.txt file from the Linux kernel 4.13 source.
We can later add our own typo corrections.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Dan Murphy <dmurphy@ti.com>
Stephen Warren [Mon, 18 Sep 2017 17:50:47 +0000 (11:50 -0600)]
test/py: fix anchors in HTML status report
The current code wraps a pre tag inside an a tag. For some reason, this
causes at least Firefox to attempt to drag the pre section content when
using a mouse drag to select text. Re-order the tags so that the text can
be selected using the mouse, at least if you start the drag outside the
text (after the end of the line, for example).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 18 Sep 2017 17:11:49 +0000 (11:11 -0600)]
test/py: add skip marker for reliance on tools
Some tests use external tools (executables) during their operation. Add
a test.py mark to indicate this. This allows those tests to be skipped if
the required tool is not present.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Sun, 17 Sep 2017 15:44:49 +0000 (11:44 -0400)]
TI: ARCH_OMAP2PLUS: Enable SPL_STACK_R and provide default value
On ARCH_OMAP2PLUS platforms we know what the DDR layout is going to be,
and that it is safe to use SPL_STACK_R and provide a default value for
it. select this and re-sync the defconfigs.
projects / u-boot / log