2 * Copyright (c) 2016 Andreas Färber
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "meson-gx.dtsi"
44 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
45 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
46 #include <dt-bindings/clock/gxbb-clkc.h>
47 #include <dt-bindings/clock/gxbb-aoclkc.h>
48 #include <dt-bindings/reset/gxbb-aoclkc.h>
51 compatible = "amlogic,meson-gxbb";
54 usb0_phy: phy@c0000000 {
55 compatible = "amlogic,meson-gxbb-usb2-phy";
57 reg = <0x0 0xc0000000 0x0 0x20>;
58 resets = <&reset RESET_USB_OTG>;
59 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
60 clock-names = "usb_general", "usb";
64 usb1_phy: phy@c0000020 {
65 compatible = "amlogic,meson-gxbb-usb2-phy";
67 reg = <0x0 0xc0000020 0x0 0x20>;
68 resets = <&reset RESET_USB_OTG>;
69 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
70 clock-names = "usb_general", "usb";
75 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
76 reg = <0x0 0xc9000000 0x0 0x40000>;
77 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
78 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
81 phy-names = "usb2-phy";
87 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
88 reg = <0x0 0xc9100000 0x0 0x40000>;
89 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
93 phy-names = "usb2-phy";
101 clocks = <&clkc CLKID_ETH>,
102 <&clkc CLKID_FCLK_DIV2>,
104 clock-names = "stmmaceth", "clkin0", "clkin1";
108 pinctrl_aobus: pinctrl@14 {
109 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
110 #address-cells = <2>;
115 reg = <0x0 0x00014 0x0 0x8>,
116 <0x0 0x0002c 0x0 0x4>,
117 <0x0 0x00024 0x0 0x8>;
118 reg-names = "mux", "pull", "gpio";
121 gpio-ranges = <&pinctrl_aobus 0 0 14>;
124 uart_ao_a_pins: uart_ao_a {
126 groups = "uart_tx_ao_a", "uart_rx_ao_a";
127 function = "uart_ao";
131 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
133 groups = "uart_cts_ao_a",
135 function = "uart_ao";
139 uart_ao_b_pins: uart_ao_b {
141 groups = "uart_tx_ao_b", "uart_rx_ao_b";
142 function = "uart_ao_b";
146 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
148 groups = "uart_cts_ao_b",
150 function = "uart_ao_b";
154 remote_input_ao_pins: remote_input_ao {
156 groups = "remote_input_ao";
157 function = "remote_input_ao";
161 i2c_ao_pins: i2c_ao {
163 groups = "i2c_sck_ao",
169 pwm_ao_a_3_pins: pwm_ao_a_3 {
171 groups = "pwm_ao_a_3";
172 function = "pwm_ao_a_3";
176 pwm_ao_a_6_pins: pwm_ao_a_6 {
178 groups = "pwm_ao_a_6";
179 function = "pwm_ao_a_6";
183 pwm_ao_a_12_pins: pwm_ao_a_12 {
185 groups = "pwm_ao_a_12";
186 function = "pwm_ao_a_12";
190 pwm_ao_b_pins: pwm_ao_b {
193 function = "pwm_ao_b";
197 i2s_am_clk_pins: i2s_am_clk {
199 groups = "i2s_am_clk";
200 function = "i2s_out_ao";
204 i2s_out_ao_clk_pins: i2s_out_ao_clk {
206 groups = "i2s_out_ao_clk";
207 function = "i2s_out_ao";
211 i2s_out_lr_clk_pins: i2s_out_lr_clk {
213 groups = "i2s_out_lr_clk";
214 function = "i2s_out_ao";
218 i2s_out_ch01_ao_pins: i2s_out_ch01_ao {
220 groups = "i2s_out_ch01_ao";
221 function = "i2s_out_ao";
225 i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
227 groups = "i2s_out_ch23_ao";
228 function = "i2s_out_ao";
232 i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
234 groups = "i2s_out_ch45_ao";
235 function = "i2s_out_ao";
239 spdif_out_ao_6_pins: spdif_out_ao_6 {
241 groups = "spdif_out_ao_6";
242 function = "spdif_out_ao";
246 spdif_out_ao_13_pins: spdif_out_ao_13 {
248 groups = "spdif_out_ao_13";
249 function = "spdif_out_ao";
256 pinctrl_periphs: pinctrl@4b0 {
257 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
258 #address-cells = <2>;
263 reg = <0x0 0x004b0 0x0 0x28>,
264 <0x0 0x004e8 0x0 0x14>,
265 <0x0 0x00120 0x0 0x14>,
266 <0x0 0x00430 0x0 0x40>;
267 reg-names = "mux", "pull", "pull-enable", "gpio";
270 gpio-ranges = <&pinctrl_periphs 0 14 120>;
275 groups = "emmc_nand_d07",
293 sdcard_pins: sdcard {
295 groups = "sdcard_d0",
317 sdio_irq_pins: sdio_irq {
324 uart_a_pins: uart_a {
326 groups = "uart_tx_a",
332 uart_a_cts_rts_pins: uart_a_cts_rts {
334 groups = "uart_cts_a",
340 uart_b_pins: uart_b {
342 groups = "uart_tx_b",
348 uart_b_cts_rts_pins: uart_b_cts_rts {
350 groups = "uart_cts_b",
356 uart_c_pins: uart_c {
358 groups = "uart_tx_c",
364 uart_c_cts_rts_pins: uart_c_cts_rts {
366 groups = "uart_cts_c",
374 groups = "i2c_sck_a",
382 groups = "i2c_sck_b",
390 groups = "i2c_sck_c",
396 eth_rgmii_pins: eth-rgmii {
416 eth_rmii_pins: eth-rmii {
431 pwm_a_x_pins: pwm_a_x {
434 function = "pwm_a_x";
438 pwm_a_y_pins: pwm_a_y {
441 function = "pwm_a_y";
466 pwm_f_x_pins: pwm_f_x {
469 function = "pwm_f_x";
473 pwm_f_y_pins: pwm_f_y {
476 function = "pwm_f_y";
480 hdmi_hpd_pins: hdmi_hpd {
483 function = "hdmi_hpd";
487 hdmi_i2c_pins: hdmi_i2c {
489 groups = "hdmi_sda", "hdmi_scl";
490 function = "hdmi_i2c";
494 i2sout_ch23_y_pins: i2sout_ch23_y {
496 groups = "i2sout_ch23_y";
497 function = "i2s_out";
501 i2sout_ch45_y_pins: i2sout_ch45_y {
503 groups = "i2sout_ch45_y";
504 function = "i2s_out";
508 i2sout_ch67_y_pins: i2sout_ch67_y {
510 groups = "i2sout_ch67_y";
511 function = "i2s_out";
515 spdif_out_y_pins: spdif_out_y {
517 groups = "spdif_out_y";
518 function = "spdif_out";
525 clkc: clock-controller@0 {
526 compatible = "amlogic,gxbb-clkc";
528 reg = <0x0 0x0 0x0 0x3db>;
534 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
535 reg = <0x0 0xc0000 0x0 0x40000>;
536 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
546 interrupt-names = "gp", "gpmmu", "pp", "pmu",
547 "pp0", "ppmmu0", "pp1", "ppmmu1",
549 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
550 clock-names = "bus", "core";
553 * Mali clocking is provided by two identical clock paths
554 * MALI_0 and MALI_1 muxed to a single clock by a glitch
555 * free mux to safely change frequency while running.
557 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
558 <&clkc CLKID_MALI_0>,
559 <&clkc CLKID_MALI>; /* Glitch free mux */
560 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
561 <0>, /* Do Nothing */
562 <&clkc CLKID_MALI_0>;
563 assigned-clock-rates = <0>, /* Do Nothing */
565 <0>; /* Do Nothing */
570 clocks = <&clkc CLKID_I2C>;
574 clocks = <&clkc CLKID_AO_I2C>;
578 clocks = <&clkc CLKID_I2C>;
582 clocks = <&clkc CLKID_I2C>;
586 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
588 <&clkc CLKID_SAR_ADC>,
590 <&clkc CLKID_SAR_ADC_CLK>,
591 <&clkc CLKID_SAR_ADC_SEL>;
592 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
596 clocks = <&clkc CLKID_SD_EMMC_A>,
598 <&clkc CLKID_FCLK_DIV2>;
599 clock-names = "core", "clkin0", "clkin1";
603 clocks = <&clkc CLKID_SD_EMMC_B>,
605 <&clkc CLKID_FCLK_DIV2>;
606 clock-names = "core", "clkin0", "clkin1";
610 clocks = <&clkc CLKID_SD_EMMC_C>,
612 <&clkc CLKID_FCLK_DIV2>;
613 clock-names = "core", "clkin0", "clkin1";
617 clocks = <&clkc CLKID_SPI>;
621 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
625 clocks = <&clkc CLKID_RNG0>;
626 clock-names = "core";
630 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
631 resets = <&reset RESET_HDMITX_CAPB3>,
632 <&reset RESET_HDMI_SYSTEM_RESET>,
633 <&reset RESET_HDMI_TX>;
634 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
635 clocks = <&clkc CLKID_HDMI_PCLK>,
637 <&clkc CLKID_GCLK_VENCI_INT0>;
638 clock-names = "isfr", "iahb", "venci";