git.sur5r.net Git - u-boot/blob - configs/stout_defconfig

   1 CONFIG_ARM=y
   2 CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
   3 CONFIG_ARCH_RMOBILE=y
   4 CONFIG_SYS_TEXT_BASE=0x50000000
   5 CONFIG_SPL_GPIO_SUPPORT=y
   6 CONFIG_SPL_LIBCOMMON_SUPPORT=y
   7 CONFIG_SPL_LIBGENERIC_SUPPORT=y
   8 CONFIG_SYS_MALLOC_F_LEN=0x8000
   9 CONFIG_R8A7790=y
  10 CONFIG_TARGET_STOUT=y
  11 CONFIG_TPL_TEXT_BASE=0xe6300000
  12 CONFIG_TPL_MAX_SIZE=16384
  13 CONFIG_SPL_SERIAL_SUPPORT=y
  14 CONFIG_TPL_LIBCOMMON_SUPPORT=y
  15 CONFIG_TPL_LIBGENERIC_SUPPORT=y
  16 CONFIG_SPL_SPI_FLASH_SUPPORT=y
  17 CONFIG_SPL_SPI_SUPPORT=y
  18 CONFIG_SPL=y
  19 CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot"
  20 CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
  21 CONFIG_FIT=y
  22 CONFIG_BOOTDELAY=3
  23 CONFIG_VERSION_VARIABLE=y
  24 CONFIG_SPL_BOARD_INIT=y
  25 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
  26 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
  27 CONFIG_SPL_I2C_SUPPORT=y
  28 CONFIG_SPL_SPI_LOAD=y
  29 CONFIG_SPL_YMODEM_SUPPORT=y
  30 CONFIG_TPL=y
  31 CONFIG_TPL_BOARD_INIT=y
  32 CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
  33 CONFIG_TPL_RAM_SUPPORT=y
  34 CONFIG_TPL_RAM_DEVICE=y
  35 CONFIG_TPL_SERIAL_SUPPORT=y
  36 CONFIG_TPL_SPI_FLASH_SUPPORT=y
  37 CONFIG_TPL_SPI_LOAD=y
  38 CONFIG_TPL_SPI_SUPPORT=y
  39 CONFIG_TPL_YMODEM_SUPPORT=y
  40 CONFIG_HUSH_PARSER=y
  41 CONFIG_CMD_BOOTZ=y
  42 # CONFIG_CMD_IMI is not set
  43 # CONFIG_CMD_XIMG is not set
  44 CONFIG_CMD_GPIO=y
  45 CONFIG_CMD_I2C=y
  46 CONFIG_CMD_MMC=y
  47 CONFIG_CMD_PCI=y
  48 CONFIG_CMD_SDRAM=y
  49 CONFIG_CMD_SF=y
  50 CONFIG_CMD_SPI=y
  51 CONFIG_CMD_USB=y
  52 CONFIG_CMD_DHCP=y
  53 CONFIG_CMD_MII=y
  54 CONFIG_CMD_PING=y
  55 CONFIG_CMD_CACHE=y
  56 CONFIG_CMD_TIME=y
  57 CONFIG_CMD_EXT2=y
  58 CONFIG_CMD_EXT4=y
  59 CONFIG_CMD_EXT4_WRITE=y
  60 CONFIG_CMD_FAT=y
  61 CONFIG_OF_CONTROL=y
  62 CONFIG_SPL_OF_CONTROL=y
  63 CONFIG_OF_EMBED=y
  64 CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
  65 CONFIG_ENV_IS_IN_SPI_FLASH=y
  66 CONFIG_SPL_DM_SEQ_ALIAS=y
  67 CONFIG_SPL_OF_TRANSLATE=y
  68 CONFIG_CLK=y
  69 CONFIG_SPL_CLK=y
  70 CONFIG_CLK_RENESAS=y
  71 CONFIG_DM_GPIO=y
  72 CONFIG_RCAR_GPIO=y
  73 CONFIG_DM_I2C=y
  74 CONFIG_SYS_I2C_RCAR_IIC=y
  75 CONFIG_DM_MMC=y
  76 CONFIG_RENESAS_SDHI=y
  77 CONFIG_SPI_FLASH=y
  78 CONFIG_SPI_FLASH_BAR=y
  79 CONFIG_SPI_FLASH_SPANSION=y
  80 CONFIG_PHY_MICREL=y
  81 CONFIG_DM_ETH=y
  82 CONFIG_SH_ETHER=y
  83 CONFIG_PCI=y
  84 CONFIG_DM_PCI=y
  85 CONFIG_PCI_RCAR_GEN2=y
  86 CONFIG_PINCTRL=y
  87 CONFIG_PINCONF=y
  88 CONFIG_SPL_PINCTRL=y
  89 CONFIG_PINCTRL_PFC=y
  90 CONFIG_DM_REGULATOR=y
  91 CONFIG_DM_REGULATOR_FIXED=y
  92 CONFIG_DM_REGULATOR_GPIO=y
  93 # CONFIG_TPL_DM_SERIAL is not set
  94 CONFIG_SCIF_CONSOLE=y
  95 CONFIG_SH_QSPI=y
  96 CONFIG_USB=y
  97 CONFIG_DM_USB=y
  98 CONFIG_USB_EHCI_HCD=y
  99 CONFIG_USB_EHCI_PCI=y
 100 CONFIG_USB_STORAGE=y
 101 CONFIG_TPL_TINY_MEMSET=y