2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * SPDX-License-Identifier: GPL-2.0+
17 /* The DEBUG define must be before common to enable debugging */
24 #include <fdt_support.h>
25 #include <asm/processor.h>
27 #include <asm/byteorder.h>
28 #include <asm/unaligned.h>
29 #include <environment.h>
30 #include <mtd/cfi_flash.h>
34 * This file implements a Common Flash Interface (CFI) driver for
37 * The width of the port and the width of the chips are determined at
38 * initialization. These widths are used to calculate the address for
39 * access CFI data structures.
42 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
43 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
44 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
45 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
46 * AMD CFI Specification, Release 2.0 December 1, 2001
47 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
48 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
50 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
51 * reading and writing ... (yes there is such a Hardware).
54 DECLARE_GLOBAL_DATA_PTR;
56 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
57 #ifdef CONFIG_FLASH_CFI_MTD
58 static uint flash_verbose = 1;
60 #define flash_verbose 1
63 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
66 * Check if chip width is defined. If not, start detecting with 8bit.
68 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
69 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
72 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
73 #define __maybe_weak __weak
75 #define __maybe_weak static
79 * 0xffff is an undefined value for the configuration register. When
80 * this value is returned, the configuration register shall not be
81 * written at all (default mode).
83 static u16 cfi_flash_config_reg(int i)
85 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
86 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
92 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
93 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
96 #ifdef CONFIG_CFI_FLASH /* for driver model */
97 static void cfi_flash_init_dm(void)
101 cfi_flash_num_flash_banks = 0;
103 * The uclass_first_device() will probe the first device and
104 * uclass_next_device() will probe the rest if they exist. So
105 * that cfi_flash_probe() will get called assigning the base
106 * addresses that are available.
108 for (uclass_first_device(UCLASS_MTD, &dev);
110 uclass_next_device(&dev)) {
114 phys_addr_t cfi_flash_bank_addr(int i)
116 return flash_info[i].base;
119 __weak phys_addr_t cfi_flash_bank_addr(int i)
121 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
125 __weak unsigned long cfi_flash_bank_size(int i)
127 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
128 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
134 __maybe_weak void flash_write8(u8 value, void *addr)
136 __raw_writeb(value, addr);
139 __maybe_weak void flash_write16(u16 value, void *addr)
141 __raw_writew(value, addr);
144 __maybe_weak void flash_write32(u32 value, void *addr)
146 __raw_writel(value, addr);
149 __maybe_weak void flash_write64(u64 value, void *addr)
151 /* No architectures currently implement __raw_writeq() */
152 *(volatile u64 *)addr = value;
155 __maybe_weak u8 flash_read8(void *addr)
157 return __raw_readb(addr);
160 __maybe_weak u16 flash_read16(void *addr)
162 return __raw_readw(addr);
165 __maybe_weak u32 flash_read32(void *addr)
167 return __raw_readl(addr);
170 __maybe_weak u64 flash_read64(void *addr)
172 /* No architectures currently implement __raw_readq() */
173 return *(volatile u64 *)addr;
176 /*-----------------------------------------------------------------------
178 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
179 static flash_info_t *flash_get_info(ulong base)
184 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
185 info = &flash_info[i];
186 if (info->size && info->start[0] <= base &&
187 base <= info->start[0] + info->size - 1)
195 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
197 if (sect != (info->sector_count - 1))
198 return info->start[sect + 1] - info->start[sect];
200 return info->start[0] + info->size - info->start[sect];
203 /*-----------------------------------------------------------------------
204 * create an address based on the offset and the port width
207 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
209 unsigned int byte_offset = offset * info->portwidth;
211 return (void *)(info->start[sect] + byte_offset);
214 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
215 unsigned int offset, void *addr)
219 /*-----------------------------------------------------------------------
220 * make a proper sized command based on the port and chip widths
222 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
227 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
228 u32 cmd_le = cpu_to_le32(cmd);
231 uchar *cp = (uchar *) cmdbuf;
233 for (i = info->portwidth; i > 0; i--) {
234 cword_offset = (info->portwidth - i) % info->chipwidth;
235 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
236 cp_offset = info->portwidth - i;
237 val = *((uchar *)&cmd_le + cword_offset);
240 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
242 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
247 /*-----------------------------------------------------------------------
250 static void print_longlong(char *str, unsigned long long data)
256 for (i = 0; i < 8; i++)
257 sprintf(&str[i * 2], "%2.2x", *cp++);
260 static void flash_printqry(struct cfi_qry *qry)
265 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
267 for (y = 0; y < 16; y++)
268 debug("%2.2x ", p[x + y]);
270 for (y = 0; y < 16; y++) {
271 unsigned char c = p[x + y];
272 if (c >= 0x20 && c <= 0x7e)
283 /*-----------------------------------------------------------------------
284 * read a character at a port width address
286 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
291 cp = flash_map(info, 0, offset);
292 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
293 retval = flash_read8(cp);
295 retval = flash_read8(cp + info->portwidth - 1);
297 flash_unmap(info, 0, offset, cp);
301 /*-----------------------------------------------------------------------
302 * read a word at a port width address, assume 16bit bus
304 static inline ushort flash_read_word(flash_info_t *info, uint offset)
306 ushort *addr, retval;
308 addr = flash_map(info, 0, offset);
309 retval = flash_read16(addr);
310 flash_unmap(info, 0, offset, addr);
315 /*-----------------------------------------------------------------------
316 * read a long word by picking the least significant byte of each maximum
317 * port size word. Swap for ppc format.
319 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
328 addr = flash_map(info, sect, offset);
331 debug("long addr is at %p info->portwidth = %d\n", addr,
333 for (x = 0; x < 4 * info->portwidth; x++) {
334 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
337 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
338 retval = ((flash_read8(addr) << 16) |
339 (flash_read8(addr + info->portwidth) << 24) |
340 (flash_read8(addr + 2 * info->portwidth)) |
341 (flash_read8(addr + 3 * info->portwidth) << 8));
343 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
344 (flash_read8(addr + info->portwidth - 1) << 16) |
345 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
346 (flash_read8(addr + 3 * info->portwidth - 1)));
348 flash_unmap(info, sect, offset, addr);
354 * Write a proper sized command to the correct address
356 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
357 uint offset, u32 cmd)
363 addr = flash_map(info, sect, offset);
364 flash_make_cmd(info, cmd, &cword);
365 switch (info->portwidth) {
367 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
368 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
369 flash_write8(cword.w8, addr);
371 case FLASH_CFI_16BIT:
372 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
374 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
375 flash_write16(cword.w16, addr);
377 case FLASH_CFI_32BIT:
378 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
380 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
381 flash_write32(cword.w32, addr);
383 case FLASH_CFI_64BIT:
388 print_longlong(str, cword.w64);
390 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
392 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
395 flash_write64(cword.w64, addr);
399 /* Ensure all the instructions are fully finished */
402 flash_unmap(info, sect, offset, addr);
405 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
407 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
408 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
411 /*-----------------------------------------------------------------------
413 static int flash_isequal(flash_info_t *info, flash_sect_t sect,
414 uint offset, uchar cmd)
420 addr = flash_map(info, sect, offset);
421 flash_make_cmd(info, cmd, &cword);
423 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
424 switch (info->portwidth) {
426 debug("is= %x %x\n", flash_read8(addr), cword.w8);
427 retval = (flash_read8(addr) == cword.w8);
429 case FLASH_CFI_16BIT:
430 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
431 retval = (flash_read16(addr) == cword.w16);
433 case FLASH_CFI_32BIT:
434 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
435 retval = (flash_read32(addr) == cword.w32);
437 case FLASH_CFI_64BIT:
443 print_longlong(str1, flash_read64(addr));
444 print_longlong(str2, cword.w64);
445 debug("is= %s %s\n", str1, str2);
448 retval = (flash_read64(addr) == cword.w64);
454 flash_unmap(info, sect, offset, addr);
459 /*-----------------------------------------------------------------------
461 static int flash_isset(flash_info_t *info, flash_sect_t sect,
462 uint offset, uchar cmd)
468 addr = flash_map(info, sect, offset);
469 flash_make_cmd(info, cmd, &cword);
470 switch (info->portwidth) {
472 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
474 case FLASH_CFI_16BIT:
475 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
477 case FLASH_CFI_32BIT:
478 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
480 case FLASH_CFI_64BIT:
481 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
487 flash_unmap(info, sect, offset, addr);
492 /*-----------------------------------------------------------------------
494 static int flash_toggle(flash_info_t *info, flash_sect_t sect,
495 uint offset, uchar cmd)
501 addr = flash_map(info, sect, offset);
502 flash_make_cmd(info, cmd, &cword);
503 switch (info->portwidth) {
505 retval = flash_read8(addr) != flash_read8(addr);
507 case FLASH_CFI_16BIT:
508 retval = flash_read16(addr) != flash_read16(addr);
510 case FLASH_CFI_32BIT:
511 retval = flash_read32(addr) != flash_read32(addr);
513 case FLASH_CFI_64BIT:
514 retval = ((flash_read32(addr) != flash_read32(addr)) ||
515 (flash_read32(addr + 4) != flash_read32(addr + 4)));
521 flash_unmap(info, sect, offset, addr);
527 * flash_is_busy - check to see if the flash is busy
529 * This routine checks the status of the chip and returns true if the
532 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
536 switch (info->vendor) {
537 case CFI_CMDSET_INTEL_PROG_REGIONS:
538 case CFI_CMDSET_INTEL_STANDARD:
539 case CFI_CMDSET_INTEL_EXTENDED:
540 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
542 case CFI_CMDSET_AMD_STANDARD:
543 case CFI_CMDSET_AMD_EXTENDED:
544 #ifdef CONFIG_FLASH_CFI_LEGACY
545 case CFI_CMDSET_AMD_LEGACY:
547 if (info->sr_supported) {
548 flash_write_cmd(info, sect, info->addr_unlock1,
549 FLASH_CMD_READ_STATUS);
550 retval = !flash_isset(info, sect, 0,
553 retval = flash_toggle(info, sect, 0,
561 debug("flash_is_busy: %d\n", retval);
565 /*-----------------------------------------------------------------------
566 * wait for XSR.7 to be set. Time out with an error if it does not.
567 * This routine does not set the flash to read-array mode.
569 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
570 ulong tout, char *prompt)
574 #if CONFIG_SYS_HZ != 1000
575 if ((ulong)CONFIG_SYS_HZ > 100000)
576 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
578 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
581 /* Wait for command completion */
582 #ifdef CONFIG_SYS_LOW_RES_TIMER
585 start = get_timer(0);
587 while (flash_is_busy(info, sector)) {
588 if (get_timer(start) > tout) {
589 printf("Flash %s timeout at address %lx data %lx\n",
590 prompt, info->start[sector],
591 flash_read_long(info, sector, 0));
592 flash_write_cmd(info, sector, 0, info->cmd_reset);
596 udelay(1); /* also triggers watchdog */
601 /*-----------------------------------------------------------------------
602 * Wait for XSR.7 to be set, if it times out print an error, otherwise
603 * do a full status check.
605 * This routine sets the flash to read-array mode.
607 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
608 ulong tout, char *prompt)
612 retcode = flash_status_check(info, sector, tout, prompt);
613 switch (info->vendor) {
614 case CFI_CMDSET_INTEL_PROG_REGIONS:
615 case CFI_CMDSET_INTEL_EXTENDED:
616 case CFI_CMDSET_INTEL_STANDARD:
617 if ((retcode == ERR_OK)
618 && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
620 printf("Flash %s error at address %lx\n", prompt,
621 info->start[sector]);
622 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
623 FLASH_STATUS_PSLBS)) {
624 puts("Command Sequence Error.\n");
625 } else if (flash_isset(info, sector, 0,
626 FLASH_STATUS_ECLBS)) {
627 puts("Block Erase Error.\n");
628 retcode = ERR_NOT_ERASED;
629 } else if (flash_isset(info, sector, 0,
630 FLASH_STATUS_PSLBS)) {
631 puts("Locking Error\n");
633 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
634 puts("Block locked.\n");
635 retcode = ERR_PROTECTED;
637 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
638 puts("Vpp Low Error.\n");
640 flash_write_cmd(info, sector, 0, info->cmd_reset);
649 static int use_flash_status_poll(flash_info_t *info)
651 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
652 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
653 info->vendor == CFI_CMDSET_AMD_STANDARD)
659 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
660 ulong tout, char *prompt)
662 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
666 #if CONFIG_SYS_HZ != 1000
667 if ((ulong)CONFIG_SYS_HZ > 100000)
668 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
670 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
673 /* Wait for command completion */
674 #ifdef CONFIG_SYS_LOW_RES_TIMER
677 start = get_timer(0);
680 switch (info->portwidth) {
682 ready = flash_read8(dst) == flash_read8(src);
684 case FLASH_CFI_16BIT:
685 ready = flash_read16(dst) == flash_read16(src);
687 case FLASH_CFI_32BIT:
688 ready = flash_read32(dst) == flash_read32(src);
690 case FLASH_CFI_64BIT:
691 ready = flash_read64(dst) == flash_read64(src);
699 if (get_timer(start) > tout) {
700 printf("Flash %s timeout at address %lx data %lx\n",
701 prompt, (ulong)dst, (ulong)flash_read8(dst));
704 udelay(1); /* also triggers watchdog */
706 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
710 /*-----------------------------------------------------------------------
712 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
714 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
717 unsigned long long ll;
720 switch (info->portwidth) {
724 case FLASH_CFI_16BIT:
725 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
728 cword->w16 = (cword->w16 >> 8) | w;
730 cword->w16 = (cword->w16 << 8) | c;
733 case FLASH_CFI_32BIT:
734 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
737 cword->w32 = (cword->w32 >> 8) | l;
739 cword->w32 = (cword->w32 << 8) | c;
742 case FLASH_CFI_64BIT:
743 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
746 cword->w64 = (cword->w64 >> 8) | ll;
748 cword->w64 = (cword->w64 << 8) | c;
755 * Loop through the sector table starting from the previously found sector.
756 * Searches forwards or backwards, dependent on the passed address.
758 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
760 static flash_sect_t saved_sector; /* previously found sector */
761 static flash_info_t *saved_info; /* previously used flash bank */
762 flash_sect_t sector = saved_sector;
764 if ((info != saved_info) || (sector >= info->sector_count))
767 while ((info->start[sector] < addr)
768 && (sector < info->sector_count - 1))
770 while ((info->start[sector] > addr) && (sector > 0))
772 * also decrements the sector in case of an overshot
777 saved_sector = sector;
782 /*-----------------------------------------------------------------------
784 static int flash_write_cfiword(flash_info_t *info, ulong dest,
787 void *dstaddr = (void *)dest;
789 flash_sect_t sect = 0;
792 /* Check if Flash is (sufficiently) erased */
793 switch (info->portwidth) {
795 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
797 case FLASH_CFI_16BIT:
798 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
800 case FLASH_CFI_32BIT:
801 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
803 case FLASH_CFI_64BIT:
804 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
811 return ERR_NOT_ERASED;
813 /* Disable interrupts which might cause a timeout here */
814 flag = disable_interrupts();
816 switch (info->vendor) {
817 case CFI_CMDSET_INTEL_PROG_REGIONS:
818 case CFI_CMDSET_INTEL_EXTENDED:
819 case CFI_CMDSET_INTEL_STANDARD:
820 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
821 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
823 case CFI_CMDSET_AMD_EXTENDED:
824 case CFI_CMDSET_AMD_STANDARD:
825 sect = find_sector(info, dest);
826 flash_unlock_seq(info, sect);
827 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
830 #ifdef CONFIG_FLASH_CFI_LEGACY
831 case CFI_CMDSET_AMD_LEGACY:
832 sect = find_sector(info, dest);
833 flash_unlock_seq(info, 0);
834 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
840 switch (info->portwidth) {
842 flash_write8(cword.w8, dstaddr);
844 case FLASH_CFI_16BIT:
845 flash_write16(cword.w16, dstaddr);
847 case FLASH_CFI_32BIT:
848 flash_write32(cword.w32, dstaddr);
850 case FLASH_CFI_64BIT:
851 flash_write64(cword.w64, dstaddr);
855 /* re-enable interrupts if necessary */
860 sect = find_sector(info, dest);
862 if (use_flash_status_poll(info))
863 return flash_status_poll(info, &cword, dstaddr,
864 info->write_tout, "write");
866 return flash_full_status_check(info, sect,
867 info->write_tout, "write");
870 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
872 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
879 void *dst = (void *)dest;
886 switch (info->portwidth) {
890 case FLASH_CFI_16BIT:
893 case FLASH_CFI_32BIT:
896 case FLASH_CFI_64BIT:
906 while ((cnt-- > 0) && (flag == 1)) {
907 switch (info->portwidth) {
909 flag = ((flash_read8(dst2) & flash_read8(src)) ==
913 case FLASH_CFI_16BIT:
914 flag = ((flash_read16(dst2) & flash_read16(src)) ==
918 case FLASH_CFI_32BIT:
919 flag = ((flash_read32(dst2) & flash_read32(src)) ==
923 case FLASH_CFI_64BIT:
924 flag = ((flash_read64(dst2) & flash_read64(src)) ==
931 retcode = ERR_NOT_ERASED;
936 sector = find_sector(info, dest);
938 switch (info->vendor) {
939 case CFI_CMDSET_INTEL_PROG_REGIONS:
940 case CFI_CMDSET_INTEL_STANDARD:
941 case CFI_CMDSET_INTEL_EXTENDED:
942 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
943 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
944 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
945 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
946 flash_write_cmd(info, sector, 0, write_cmd);
947 retcode = flash_status_check(info, sector,
948 info->buffer_write_tout,
950 if (retcode == ERR_OK) {
951 /* reduce the number of loops by the width of
954 flash_write_cmd(info, sector, 0, cnt - 1);
956 switch (info->portwidth) {
958 flash_write8(flash_read8(src), dst);
961 case FLASH_CFI_16BIT:
962 flash_write16(flash_read16(src), dst);
965 case FLASH_CFI_32BIT:
966 flash_write32(flash_read32(src), dst);
969 case FLASH_CFI_64BIT:
970 flash_write64(flash_read64(src), dst);
978 flash_write_cmd(info, sector, 0,
979 FLASH_CMD_WRITE_BUFFER_CONFIRM);
980 retcode = flash_full_status_check(
981 info, sector, info->buffer_write_tout,
987 case CFI_CMDSET_AMD_STANDARD:
988 case CFI_CMDSET_AMD_EXTENDED:
989 flash_unlock_seq(info, sector);
991 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
992 offset = ((unsigned long)dst - info->start[sector]) >> shift;
994 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
996 flash_write_cmd(info, sector, offset, cnt - 1);
998 switch (info->portwidth) {
1001 flash_write8(flash_read8(src), dst);
1005 case FLASH_CFI_16BIT:
1007 flash_write16(flash_read16(src), dst);
1011 case FLASH_CFI_32BIT:
1013 flash_write32(flash_read32(src), dst);
1017 case FLASH_CFI_64BIT:
1019 flash_write64(flash_read64(src), dst);
1024 retcode = ERR_INVAL;
1028 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1029 if (use_flash_status_poll(info))
1030 retcode = flash_status_poll(info, src - (1 << shift),
1032 info->buffer_write_tout,
1035 retcode = flash_full_status_check(info, sector,
1036 info->buffer_write_tout,
1041 debug("Unknown Command Set\n");
1042 retcode = ERR_INVAL;
1049 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1052 /*-----------------------------------------------------------------------
1054 int flash_erase(flash_info_t *info, int s_first, int s_last)
1061 if (info->flash_id != FLASH_MAN_CFI) {
1062 puts("Can't erase unknown flash type - aborted\n");
1065 if ((s_first < 0) || (s_first > s_last)) {
1066 puts("- no sectors to erase\n");
1071 for (sect = s_first; sect <= s_last; ++sect) {
1072 if (info->protect[sect]) {
1077 printf("- Warning: %d protected sectors will not be erased!\n",
1079 } else if (flash_verbose) {
1084 for (sect = s_first; sect <= s_last; sect++) {
1090 if (info->protect[sect] == 0) { /* not protected */
1091 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1098 * Check if whole sector is erased
1100 size = flash_sector_size(info, sect);
1102 flash = (u32 *)info->start[sect];
1103 /* divide by 4 for longword access */
1105 for (k = 0; k < size; k++) {
1106 if (flash_read32(flash++) != 0xffffffff) {
1117 switch (info->vendor) {
1118 case CFI_CMDSET_INTEL_PROG_REGIONS:
1119 case CFI_CMDSET_INTEL_STANDARD:
1120 case CFI_CMDSET_INTEL_EXTENDED:
1121 flash_write_cmd(info, sect, 0,
1122 FLASH_CMD_CLEAR_STATUS);
1123 flash_write_cmd(info, sect, 0,
1124 FLASH_CMD_BLOCK_ERASE);
1125 flash_write_cmd(info, sect, 0,
1126 FLASH_CMD_ERASE_CONFIRM);
1128 case CFI_CMDSET_AMD_STANDARD:
1129 case CFI_CMDSET_AMD_EXTENDED:
1130 flash_unlock_seq(info, sect);
1131 flash_write_cmd(info, sect,
1133 AMD_CMD_ERASE_START);
1134 flash_unlock_seq(info, sect);
1135 flash_write_cmd(info, sect, 0,
1136 info->cmd_erase_sector);
1138 #ifdef CONFIG_FLASH_CFI_LEGACY
1139 case CFI_CMDSET_AMD_LEGACY:
1140 flash_unlock_seq(info, 0);
1141 flash_write_cmd(info, 0, info->addr_unlock1,
1142 AMD_CMD_ERASE_START);
1143 flash_unlock_seq(info, 0);
1144 flash_write_cmd(info, sect, 0,
1145 AMD_CMD_ERASE_SECTOR);
1149 debug("Unkown flash vendor %d\n",
1154 if (use_flash_status_poll(info)) {
1157 cword.w64 = 0xffffffffffffffffULL;
1158 dest = flash_map(info, sect, 0);
1159 st = flash_status_poll(info, &cword, dest,
1160 info->erase_blk_tout, "erase");
1161 flash_unmap(info, sect, 0, dest);
1163 st = flash_full_status_check(info, sect,
1164 info->erase_blk_tout,
1168 else if (flash_verbose)
1179 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1180 static int sector_erased(flash_info_t *info, int i)
1187 * Check if whole sector is erased
1189 size = flash_sector_size(info, i);
1190 flash = (u32 *)info->start[i];
1191 /* divide by 4 for longword access */
1194 for (k = 0; k < size; k++) {
1195 if (flash_read32(flash++) != 0xffffffff)
1196 return 0; /* not erased */
1199 return 1; /* erased */
1201 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1203 void flash_print_info(flash_info_t *info)
1207 if (info->flash_id != FLASH_MAN_CFI) {
1208 puts("missing or unknown FLASH type\n");
1212 printf("%s flash (%d x %d)",
1214 (info->portwidth << 3), (info->chipwidth << 3));
1215 if (info->size < 1024 * 1024)
1216 printf(" Size: %ld kB in %d Sectors\n",
1217 info->size >> 10, info->sector_count);
1219 printf(" Size: %ld MB in %d Sectors\n",
1220 info->size >> 20, info->sector_count);
1222 switch (info->vendor) {
1223 case CFI_CMDSET_INTEL_PROG_REGIONS:
1224 printf("Intel Prog Regions");
1226 case CFI_CMDSET_INTEL_STANDARD:
1227 printf("Intel Standard");
1229 case CFI_CMDSET_INTEL_EXTENDED:
1230 printf("Intel Extended");
1232 case CFI_CMDSET_AMD_STANDARD:
1233 printf("AMD Standard");
1235 case CFI_CMDSET_AMD_EXTENDED:
1236 printf("AMD Extended");
1238 #ifdef CONFIG_FLASH_CFI_LEGACY
1239 case CFI_CMDSET_AMD_LEGACY:
1240 printf("AMD Legacy");
1244 printf("Unknown (%d)", info->vendor);
1247 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1248 info->manufacturer_id);
1249 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1251 if ((info->device_id & 0xff) == 0x7E) {
1252 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1255 if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
1256 printf("\n Advanced Sector Protection (PPB) enabled");
1257 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1258 info->erase_blk_tout,
1260 if (info->buffer_size > 1) {
1261 printf(" Buffer write timeout: %ld ms, "
1262 "buffer size: %d bytes\n",
1263 info->buffer_write_tout,
1267 puts("\n Sector Start Addresses:");
1268 for (i = 0; i < info->sector_count; ++i) {
1273 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1274 /* print empty and read-only info */
1275 printf(" %08lX %c %s ",
1277 sector_erased(info, i) ? 'E' : ' ',
1278 info->protect[i] ? "RO" : " ");
1279 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1280 printf(" %08lX %s ",
1282 info->protect[i] ? "RO" : " ");
1289 /*-----------------------------------------------------------------------
1290 * This is used in a few places in write_buf() to show programming
1291 * progress. Making it a function is nasty because it needs to do side
1292 * effect updates to digit and dots. Repeated code is nasty too, so
1293 * we define it once here.
1295 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1296 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1297 if (flash_verbose) { \
1299 if ((scale > 0) && (dots <= 0)) { \
1300 if ((digit % 5) == 0) \
1301 printf("%d", digit / 5); \
1309 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1312 /*-----------------------------------------------------------------------
1313 * Copy memory to flash, returns:
1316 * 2 - Flash not erased
1318 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1325 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1328 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1329 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1334 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1336 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1337 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1338 CONFIG_FLASH_SHOW_PROGRESS);
1342 /* get lower aligned address */
1343 wp = (addr & ~(info->portwidth - 1));
1345 /* handle unaligned start */
1346 if ((aln = addr - wp) != 0) {
1349 for (i = 0; i < aln; ++i)
1350 flash_add_byte(info, &cword, flash_read8(p + i));
1352 for (; (i < info->portwidth) && (cnt > 0); i++) {
1353 flash_add_byte(info, &cword, *src++);
1356 for (; (cnt == 0) && (i < info->portwidth); ++i)
1357 flash_add_byte(info, &cword, flash_read8(p + i));
1359 rc = flash_write_cfiword(info, wp, cword);
1364 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1367 /* handle the aligned part */
1368 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1369 buffered_size = (info->portwidth / info->chipwidth);
1370 buffered_size *= info->buffer_size;
1371 while (cnt >= info->portwidth) {
1372 /* prohibit buffer write when buffer_size is 1 */
1373 if (info->buffer_size == 1) {
1375 for (i = 0; i < info->portwidth; i++)
1376 flash_add_byte(info, &cword, *src++);
1377 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1379 wp += info->portwidth;
1380 cnt -= info->portwidth;
1384 /* write buffer until next buffered_size aligned boundary */
1385 i = buffered_size - (wp % buffered_size);
1388 if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
1390 i -= i & (info->portwidth - 1);
1394 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1395 /* Only check every once in a while */
1396 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1400 while (cnt >= info->portwidth) {
1402 for (i = 0; i < info->portwidth; i++) {
1403 flash_add_byte(info, &cword, *src++);
1405 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1407 wp += info->portwidth;
1408 cnt -= info->portwidth;
1409 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1410 /* Only check every once in a while */
1411 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1414 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1421 * handle unaligned tail bytes
1425 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1426 flash_add_byte(info, &cword, *src++);
1429 for (; i < info->portwidth; ++i)
1430 flash_add_byte(info, &cword, flash_read8(p + i));
1432 return flash_write_cfiword(info, wp, cword);
1435 static inline int manufact_match(flash_info_t *info, u32 manu)
1437 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1440 /*-----------------------------------------------------------------------
1442 #ifdef CONFIG_SYS_FLASH_PROTECTION
1444 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1446 if (manufact_match(info, INTEL_MANUFACT)
1447 && info->device_id == NUMONYX_256MBIT) {
1450 * "Numonyx Axcell P33/P30 Specification Update" :)
1452 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1453 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1456 * cmd must come before FLASH_CMD_PROTECT + 20us
1457 * Disable interrupts which might cause a timeout here.
1459 int flag = disable_interrupts();
1463 cmd = FLASH_CMD_PROTECT_SET;
1465 cmd = FLASH_CMD_PROTECT_CLEAR;
1467 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1468 flash_write_cmd(info, sector, 0, cmd);
1469 /* re-enable interrupts if necessary */
1471 enable_interrupts();
1478 int flash_real_protect(flash_info_t *info, long sector, int prot)
1482 switch (info->vendor) {
1483 case CFI_CMDSET_INTEL_PROG_REGIONS:
1484 case CFI_CMDSET_INTEL_STANDARD:
1485 case CFI_CMDSET_INTEL_EXTENDED:
1486 if (!cfi_protect_bugfix(info, sector, prot)) {
1487 flash_write_cmd(info, sector, 0,
1488 FLASH_CMD_CLEAR_STATUS);
1489 flash_write_cmd(info, sector, 0,
1492 flash_write_cmd(info, sector, 0,
1493 FLASH_CMD_PROTECT_SET);
1495 flash_write_cmd(info, sector, 0,
1496 FLASH_CMD_PROTECT_CLEAR);
1500 case CFI_CMDSET_AMD_EXTENDED:
1501 case CFI_CMDSET_AMD_STANDARD:
1502 /* U-Boot only checks the first byte */
1503 if (manufact_match(info, ATM_MANUFACT)) {
1505 flash_unlock_seq(info, 0);
1506 flash_write_cmd(info, 0,
1508 ATM_CMD_SOFTLOCK_START);
1509 flash_unlock_seq(info, 0);
1510 flash_write_cmd(info, sector, 0,
1513 flash_write_cmd(info, 0,
1515 AMD_CMD_UNLOCK_START);
1516 if (info->device_id == ATM_ID_BV6416)
1517 flash_write_cmd(info, sector,
1518 0, ATM_CMD_UNLOCK_SECT);
1521 if (info->legacy_unlock) {
1522 int flag = disable_interrupts();
1525 flash_unlock_seq(info, 0);
1526 flash_write_cmd(info, 0, info->addr_unlock1,
1527 AMD_CMD_SET_PPB_ENTRY);
1528 lock_flag = flash_isset(info, sector, 0, 0x01);
1531 flash_write_cmd(info, sector, 0,
1532 AMD_CMD_PPB_LOCK_BC1);
1533 flash_write_cmd(info, sector, 0,
1534 AMD_CMD_PPB_LOCK_BC2);
1536 debug("sector %ld %slocked\n", sector,
1537 lock_flag ? "" : "already ");
1540 debug("unlock %ld\n", sector);
1541 flash_write_cmd(info, 0, 0,
1542 AMD_CMD_PPB_UNLOCK_BC1);
1543 flash_write_cmd(info, 0, 0,
1544 AMD_CMD_PPB_UNLOCK_BC2);
1546 debug("sector %ld %sunlocked\n", sector,
1547 !lock_flag ? "" : "already ");
1550 enable_interrupts();
1552 if (flash_status_check(info, sector,
1553 info->erase_blk_tout,
1554 prot ? "protect" : "unprotect"))
1555 printf("status check error\n");
1557 flash_write_cmd(info, 0, 0,
1558 AMD_CMD_SET_PPB_EXIT_BC1);
1559 flash_write_cmd(info, 0, 0,
1560 AMD_CMD_SET_PPB_EXIT_BC2);
1563 #ifdef CONFIG_FLASH_CFI_LEGACY
1564 case CFI_CMDSET_AMD_LEGACY:
1565 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1566 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1568 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
1570 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1575 * Flash needs to be in status register read mode for
1576 * flash_full_status_check() to work correctly
1578 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1580 flash_full_status_check(info, sector, info->erase_blk_tout,
1581 prot ? "protect" : "unprotect")) == 0) {
1583 info->protect[sector] = prot;
1586 * On some of Intel's flash chips (marked via legacy_unlock)
1587 * unprotect unprotects all locking.
1589 if ((prot == 0) && (info->legacy_unlock)) {
1592 for (i = 0; i < info->sector_count; i++) {
1593 if (info->protect[i])
1594 flash_real_protect(info, i, 1);
1601 /*-----------------------------------------------------------------------
1602 * flash_read_user_serial - read the OneTimeProgramming cells
1604 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1611 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1612 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1613 memcpy(dst, src + offset, len);
1614 flash_write_cmd(info, 0, 0, info->cmd_reset);
1616 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1620 * flash_read_factory_serial - read the device Id from the protection area
1622 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1627 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1628 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1629 memcpy(buffer, src + offset, len);
1630 flash_write_cmd(info, 0, 0, info->cmd_reset);
1632 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1635 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1637 /*-----------------------------------------------------------------------
1638 * Reverse the order of the erase regions in the CFI QRY structure.
1639 * This is needed for chips that are either a) correctly detected as
1640 * top-boot, or b) buggy.
1642 static void cfi_reverse_geometry(struct cfi_qry *qry)
1647 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1648 tmp = get_unaligned(&(qry->erase_region_info[i]));
1649 put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
1650 &(qry->erase_region_info[i]));
1651 put_unaligned(tmp, &(qry->erase_region_info[j]));
1655 /*-----------------------------------------------------------------------
1656 * read jedec ids from device and set corresponding fields in info struct
1658 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1661 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1663 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1665 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1666 udelay(1000); /* some flash are slow to respond */
1667 info->manufacturer_id = flash_read_uchar(info,
1668 FLASH_OFFSET_MANUFACTURER_ID);
1669 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1670 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1671 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1672 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1675 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1677 info->cmd_reset = FLASH_CMD_RESET;
1679 cmdset_intel_read_jedec_ids(info);
1680 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1682 #ifdef CONFIG_SYS_FLASH_PROTECTION
1683 /* read legacy lock/unlock bit from intel flash */
1684 if (info->ext_addr) {
1685 info->legacy_unlock = flash_read_uchar(info,
1686 info->ext_addr + 5) & 0x08;
1693 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1699 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1700 flash_unlock_seq(info, 0);
1701 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1702 udelay(1000); /* some flash are slow to respond */
1704 manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1705 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1706 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1708 manuId = flash_read_uchar(info,
1709 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1711 info->manufacturer_id = manuId;
1713 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1714 info->ext_addr, info->cfi_version);
1715 if (info->ext_addr && info->cfi_version >= 0x3134) {
1716 /* read software feature (at 0x53) */
1717 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1718 debug("feature = 0x%x\n", feature);
1719 info->sr_supported = feature & 0x1;
1722 switch (info->chipwidth) {
1723 case FLASH_CFI_8BIT:
1724 info->device_id = flash_read_uchar(info,
1725 FLASH_OFFSET_DEVICE_ID);
1726 if (info->device_id == 0x7E) {
1727 /* AMD 3-byte (expanded) device ids */
1728 info->device_id2 = flash_read_uchar(info,
1729 FLASH_OFFSET_DEVICE_ID2);
1730 info->device_id2 <<= 8;
1731 info->device_id2 |= flash_read_uchar(info,
1732 FLASH_OFFSET_DEVICE_ID3);
1735 case FLASH_CFI_16BIT:
1736 info->device_id = flash_read_word(info,
1737 FLASH_OFFSET_DEVICE_ID);
1738 if ((info->device_id & 0xff) == 0x7E) {
1739 /* AMD 3-byte (expanded) device ids */
1740 info->device_id2 = flash_read_uchar(info,
1741 FLASH_OFFSET_DEVICE_ID2);
1742 info->device_id2 <<= 8;
1743 info->device_id2 |= flash_read_uchar(info,
1744 FLASH_OFFSET_DEVICE_ID3);
1750 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1754 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1756 info->cmd_reset = AMD_CMD_RESET;
1757 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1759 cmdset_amd_read_jedec_ids(info);
1760 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1762 #ifdef CONFIG_SYS_FLASH_PROTECTION
1763 if (info->ext_addr) {
1764 /* read sector protect/unprotect scheme (at 0x49) */
1765 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1766 info->legacy_unlock = 1;
1773 #ifdef CONFIG_FLASH_CFI_LEGACY
1774 static void flash_read_jedec_ids(flash_info_t *info)
1776 info->manufacturer_id = 0;
1777 info->device_id = 0;
1778 info->device_id2 = 0;
1780 switch (info->vendor) {
1781 case CFI_CMDSET_INTEL_PROG_REGIONS:
1782 case CFI_CMDSET_INTEL_STANDARD:
1783 case CFI_CMDSET_INTEL_EXTENDED:
1784 cmdset_intel_read_jedec_ids(info);
1786 case CFI_CMDSET_AMD_STANDARD:
1787 case CFI_CMDSET_AMD_EXTENDED:
1788 cmdset_amd_read_jedec_ids(info);
1795 /*-----------------------------------------------------------------------
1796 * Call board code to request info about non-CFI flash.
1797 * board_flash_get_legacy needs to fill in at least:
1798 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1800 static int flash_detect_legacy(phys_addr_t base, int banknum)
1802 flash_info_t *info = &flash_info[banknum];
1804 if (board_flash_get_legacy(base, banknum, info)) {
1805 /* board code may have filled info completely. If not, we
1806 use JEDEC ID probing. */
1807 if (!info->vendor) {
1809 CFI_CMDSET_AMD_STANDARD,
1810 CFI_CMDSET_INTEL_STANDARD
1814 for (i = 0; i < ARRAY_SIZE(modes); i++) {
1815 info->vendor = modes[i];
1817 (ulong)map_physmem(base,
1820 if (info->portwidth == FLASH_CFI_8BIT
1821 && info->interface == FLASH_CFI_X8X16) {
1822 info->addr_unlock1 = 0x2AAA;
1823 info->addr_unlock2 = 0x5555;
1825 info->addr_unlock1 = 0x5555;
1826 info->addr_unlock2 = 0x2AAA;
1828 flash_read_jedec_ids(info);
1829 debug("JEDEC PROBE: ID %x %x %x\n",
1830 info->manufacturer_id,
1833 if (jedec_flash_match(info, info->start[0]))
1836 unmap_physmem((void *)info->start[0],
1841 switch (info->vendor) {
1842 case CFI_CMDSET_INTEL_PROG_REGIONS:
1843 case CFI_CMDSET_INTEL_STANDARD:
1844 case CFI_CMDSET_INTEL_EXTENDED:
1845 info->cmd_reset = FLASH_CMD_RESET;
1847 case CFI_CMDSET_AMD_STANDARD:
1848 case CFI_CMDSET_AMD_EXTENDED:
1849 case CFI_CMDSET_AMD_LEGACY:
1850 info->cmd_reset = AMD_CMD_RESET;
1853 info->flash_id = FLASH_MAN_CFI;
1856 return 0; /* use CFI */
1859 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1861 return 0; /* use CFI */
1865 /*-----------------------------------------------------------------------
1866 * detect if flash is compatible with the Common Flash Interface (CFI)
1867 * http://www.jedec.org/download/search/jesd68.pdf
1869 static void flash_read_cfi(flash_info_t *info, void *buf,
1870 unsigned int start, size_t len)
1875 for (i = 0; i < len; i++)
1876 p[i] = flash_read_uchar(info, start + i);
1879 static void __flash_cmd_reset(flash_info_t *info)
1882 * We do not yet know what kind of commandset to use, so we issue
1883 * the reset command in both Intel and AMD variants, in the hope
1884 * that AMD flash roms ignore the Intel command.
1886 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1888 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1890 void flash_cmd_reset(flash_info_t *info)
1891 __attribute__((weak, alias("__flash_cmd_reset")));
1893 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1897 /* Issue FLASH reset command */
1898 flash_cmd_reset(info);
1900 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1902 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1904 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1905 && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1906 && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1907 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1908 sizeof(struct cfi_qry));
1909 info->interface = le16_to_cpu(qry->interface_desc);
1911 info->cfi_offset = flash_offset_cfi[cfi_offset];
1912 debug("device interface is %d\n",
1914 debug("found port %d chip %d ",
1915 info->portwidth, info->chipwidth);
1916 debug("port %d bits chip %d bits\n",
1917 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1918 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1920 /* calculate command offsets as in the Linux driver */
1921 info->addr_unlock1 = 0x555;
1922 info->addr_unlock2 = 0x2aa;
1925 * modify the unlock address if we are
1926 * in compatibility mode
1928 if (/* x8/x16 in x8 mode */
1929 ((info->chipwidth == FLASH_CFI_BY8) &&
1930 (info->interface == FLASH_CFI_X8X16)) ||
1931 /* x16/x32 in x16 mode */
1932 ((info->chipwidth == FLASH_CFI_BY16) &&
1933 (info->interface == FLASH_CFI_X16X32)))
1935 info->addr_unlock1 = 0xaaa;
1936 info->addr_unlock2 = 0x555;
1939 info->name = "CFI conformant";
1947 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1949 debug("flash detect cfi\n");
1951 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1952 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1953 for (info->chipwidth = FLASH_CFI_BY8;
1954 info->chipwidth <= info->portwidth;
1955 info->chipwidth <<= 1)
1956 if (__flash_detect_cfi(info, qry))
1959 debug("not found\n");
1964 * Manufacturer-specific quirks. Add workarounds for geometry
1965 * reversal, etc. here.
1967 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1969 /* check if flash geometry needs reversal */
1970 if (qry->num_erase_regions > 1) {
1971 /* reverse geometry if top boot part */
1972 if (info->cfi_version < 0x3131) {
1973 /* CFI < 1.1, try to guess from device id */
1974 if ((info->device_id & 0x80) != 0)
1975 cfi_reverse_geometry(qry);
1976 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1977 /* CFI >= 1.1, deduct from top/bottom flag */
1978 /* note: ext_addr is valid since cfi_version > 0 */
1979 cfi_reverse_geometry(qry);
1984 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1986 int reverse_geometry = 0;
1988 /* Check the "top boot" bit in the PRI */
1989 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1990 reverse_geometry = 1;
1992 /* AT49BV6416(T) list the erase regions in the wrong order.
1993 * However, the device ID is identical with the non-broken
1994 * AT49BV642D they differ in the high byte.
1996 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1997 reverse_geometry = !reverse_geometry;
1999 if (reverse_geometry)
2000 cfi_reverse_geometry(qry);
2003 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2005 /* check if flash geometry needs reversal */
2006 if (qry->num_erase_regions > 1) {
2007 /* reverse geometry if top boot part */
2008 if (info->cfi_version < 0x3131) {
2009 /* CFI < 1.1, guess by device id */
2010 if (info->device_id == 0x22CA || /* M29W320DT */
2011 info->device_id == 0x2256 || /* M29W320ET */
2012 info->device_id == 0x22D7) { /* M29W800DT */
2013 cfi_reverse_geometry(qry);
2015 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2016 /* CFI >= 1.1, deduct from top/bottom flag */
2017 /* note: ext_addr is valid since cfi_version > 0 */
2018 cfi_reverse_geometry(qry);
2023 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2026 * SST, for many recent nor parallel flashes, says they are
2027 * CFI-conformant. This is not true, since qry struct.
2028 * reports a std. AMD command set (0x0002), while SST allows to
2029 * erase two different sector sizes for the same memory.
2030 * 64KB sector (SST call it block) needs 0x30 to be erased.
2031 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2032 * Since CFI query detect the 4KB number of sectors, users expects
2033 * a sector granularity of 4KB, and it is here set.
2035 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2036 info->device_id == 0x5C23) { /* SST39VF3202B */
2037 /* set sector granularity to 4KB */
2038 info->cmd_erase_sector = 0x50;
2042 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2045 * The M29EW devices seem to report the CFI information wrong
2046 * when it's in 8 bit mode.
2047 * There's an app note from Numonyx on this issue.
2048 * So adjust the buffer size for M29EW while operating in 8-bit mode
2050 if (((qry->max_buf_write_size) > 0x8) &&
2051 (info->device_id == 0x7E) &&
2052 (info->device_id2 == 0x2201 ||
2053 info->device_id2 == 0x2301 ||
2054 info->device_id2 == 0x2801 ||
2055 info->device_id2 == 0x4801)) {
2056 debug("Adjusted buffer size on Numonyx flash"
2057 " M29EW family in 8 bit mode\n");
2058 qry->max_buf_write_size = 0x8;
2063 * The following code cannot be run from FLASH!
2066 ulong flash_get_size(phys_addr_t base, int banknum)
2068 flash_info_t *info = &flash_info[banknum];
2070 flash_sect_t sect_cnt;
2074 uchar num_erase_regions;
2075 int erase_region_size;
2076 int erase_region_count;
2078 unsigned long max_size;
2080 memset(&qry, 0, sizeof(qry));
2083 info->cfi_version = 0;
2084 #ifdef CONFIG_SYS_FLASH_PROTECTION
2085 info->legacy_unlock = 0;
2088 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2090 if (flash_detect_cfi(info, &qry)) {
2091 info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
2092 info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
2093 num_erase_regions = qry.num_erase_regions;
2095 if (info->ext_addr) {
2096 info->cfi_version = (ushort)flash_read_uchar(info,
2097 info->ext_addr + 3) << 8;
2098 info->cfi_version |= (ushort)flash_read_uchar(info,
2099 info->ext_addr + 4);
2103 flash_printqry(&qry);
2106 switch (info->vendor) {
2107 case CFI_CMDSET_INTEL_PROG_REGIONS:
2108 case CFI_CMDSET_INTEL_STANDARD:
2109 case CFI_CMDSET_INTEL_EXTENDED:
2110 cmdset_intel_init(info, &qry);
2112 case CFI_CMDSET_AMD_STANDARD:
2113 case CFI_CMDSET_AMD_EXTENDED:
2114 cmdset_amd_init(info, &qry);
2117 printf("CFI: Unknown command set 0x%x\n",
2120 * Unfortunately, this means we don't know how
2121 * to get the chip back to Read mode. Might
2122 * as well try an Intel-style reset...
2124 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2128 /* Do manufacturer-specific fixups */
2129 switch (info->manufacturer_id) {
2130 case 0x0001: /* AMD */
2131 case 0x0037: /* AMIC */
2132 flash_fixup_amd(info, &qry);
2135 flash_fixup_atmel(info, &qry);
2138 flash_fixup_stm(info, &qry);
2140 case 0x00bf: /* SST */
2141 flash_fixup_sst(info, &qry);
2143 case 0x0089: /* Numonyx */
2144 flash_fixup_num(info, &qry);
2148 debug("manufacturer is %d\n", info->vendor);
2149 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2150 debug("device id is 0x%x\n", info->device_id);
2151 debug("device id2 is 0x%x\n", info->device_id2);
2152 debug("cfi version is 0x%04x\n", info->cfi_version);
2154 size_ratio = info->portwidth / info->chipwidth;
2155 /* if the chip is x8/x16 reduce the ratio by half */
2156 if ((info->interface == FLASH_CFI_X8X16)
2157 && (info->chipwidth == FLASH_CFI_BY8)) {
2160 debug("size_ratio %d port %d bits chip %d bits\n",
2161 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2162 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2163 info->size = 1 << qry.dev_size;
2164 /* multiply the size by the number of chips */
2165 info->size *= size_ratio;
2166 max_size = cfi_flash_bank_size(banknum);
2167 if (max_size && (info->size > max_size)) {
2168 debug("[truncated from %ldMiB]", info->size >> 20);
2169 info->size = max_size;
2171 debug("found %d erase regions\n", num_erase_regions);
2174 for (i = 0; i < num_erase_regions; i++) {
2175 if (i > NUM_ERASE_REGIONS) {
2176 printf("%d erase regions found, only %d used\n",
2177 num_erase_regions, NUM_ERASE_REGIONS);
2181 tmp = le32_to_cpu(get_unaligned(
2182 &(qry.erase_region_info[i])));
2183 debug("erase region %u: 0x%08lx\n", i, tmp);
2185 erase_region_count = (tmp & 0xffff) + 1;
2188 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2189 debug("erase_region_count = %d erase_region_size = %d\n",
2190 erase_region_count, erase_region_size);
2191 for (j = 0; j < erase_region_count; j++) {
2192 if (sector - base >= info->size)
2194 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2195 printf("ERROR: too many flash sectors\n");
2198 info->start[sect_cnt] =
2199 (ulong)map_physmem(sector,
2202 sector += (erase_region_size * size_ratio);
2205 * Only read protection status from
2206 * supported devices (intel...)
2208 switch (info->vendor) {
2209 case CFI_CMDSET_INTEL_PROG_REGIONS:
2210 case CFI_CMDSET_INTEL_EXTENDED:
2211 case CFI_CMDSET_INTEL_STANDARD:
2213 * Set flash to read-id mode. Otherwise
2214 * reading protected status is not
2217 flash_write_cmd(info, sect_cnt, 0,
2219 info->protect[sect_cnt] =
2220 flash_isset(info, sect_cnt,
2221 FLASH_OFFSET_PROTECT,
2222 FLASH_STATUS_PROTECT);
2223 flash_write_cmd(info, sect_cnt, 0,
2226 case CFI_CMDSET_AMD_EXTENDED:
2227 case CFI_CMDSET_AMD_STANDARD:
2228 if (!info->legacy_unlock) {
2229 /* default: not protected */
2230 info->protect[sect_cnt] = 0;
2234 /* Read protection (PPB) from sector */
2235 flash_write_cmd(info, 0, 0,
2237 flash_unlock_seq(info, 0);
2238 flash_write_cmd(info, 0,
2241 info->protect[sect_cnt] =
2244 FLASH_OFFSET_PROTECT,
2245 FLASH_STATUS_PROTECT);
2248 /* default: not protected */
2249 info->protect[sect_cnt] = 0;
2256 info->sector_count = sect_cnt;
2257 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2258 tmp = 1 << qry.block_erase_timeout_typ;
2259 info->erase_blk_tout = tmp *
2260 (1 << qry.block_erase_timeout_max);
2261 tmp = (1 << qry.buf_write_timeout_typ) *
2262 (1 << qry.buf_write_timeout_max);
2264 /* round up when converting to ms */
2265 info->buffer_write_tout = (tmp + 999) / 1000;
2266 tmp = (1 << qry.word_write_timeout_typ) *
2267 (1 << qry.word_write_timeout_max);
2268 /* round up when converting to ms */
2269 info->write_tout = (tmp + 999) / 1000;
2270 info->flash_id = FLASH_MAN_CFI;
2271 if ((info->interface == FLASH_CFI_X8X16) &&
2272 (info->chipwidth == FLASH_CFI_BY8)) {
2273 /* XXX - Need to test on x8/x16 in parallel. */
2274 info->portwidth >>= 1;
2277 flash_write_cmd(info, 0, 0, info->cmd_reset);
2280 return (info->size);
2283 #ifdef CONFIG_FLASH_CFI_MTD
2284 void flash_set_verbose(uint v)
2290 static void cfi_flash_set_config_reg(u32 base, u16 val)
2292 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2294 * Only set this config register if really defined
2295 * to a valid value (0xffff is invalid)
2301 * Set configuration register. Data is "encrypted" in the 16 lower
2304 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2305 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2308 * Finally issue reset-command to bring device back to
2311 flash_write16(FLASH_CMD_RESET, (void *)base);
2315 /*-----------------------------------------------------------------------
2318 static void flash_protect_default(void)
2320 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2325 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2328 /* Monitor protection ON by default */
2329 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2330 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2331 flash_protect(FLAG_PROTECT_SET,
2332 CONFIG_SYS_MONITOR_BASE,
2333 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2334 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2337 /* Environment protection ON by default */
2338 #ifdef CONFIG_ENV_IS_IN_FLASH
2339 flash_protect(FLAG_PROTECT_SET,
2341 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2342 flash_get_info(CONFIG_ENV_ADDR));
2345 /* Redundant environment protection ON by default */
2346 #ifdef CONFIG_ENV_ADDR_REDUND
2347 flash_protect(FLAG_PROTECT_SET,
2348 CONFIG_ENV_ADDR_REDUND,
2349 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2350 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2353 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2354 for (i = 0; i < ARRAY_SIZE(apl); i++) {
2355 debug("autoprotecting from %08lx to %08lx\n",
2356 apl[i].start, apl[i].start + apl[i].size - 1);
2357 flash_protect(FLAG_PROTECT_SET,
2359 apl[i].start + apl[i].size - 1,
2360 flash_get_info(apl[i].start));
2365 unsigned long flash_init(void)
2367 unsigned long size = 0;
2370 #ifdef CONFIG_SYS_FLASH_PROTECTION
2371 /* read environment from EEPROM */
2373 env_get_f("unlock", s, sizeof(s));
2376 #ifdef CONFIG_CFI_FLASH /* for driver model */
2377 cfi_flash_init_dm();
2380 /* Init: no FLASHes known */
2381 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2382 flash_info[i].flash_id = FLASH_UNKNOWN;
2384 /* Optionally write flash configuration register */
2385 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2386 cfi_flash_config_reg(i));
2388 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2389 flash_get_size(cfi_flash_bank_addr(i), i);
2390 size += flash_info[i].size;
2391 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2392 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2393 printf("## Unknown flash on Bank %d "
2394 "- Size = 0x%08lx = %ld MB\n",
2395 i + 1, flash_info[i].size,
2396 flash_info[i].size >> 20);
2397 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2399 #ifdef CONFIG_SYS_FLASH_PROTECTION
2400 else if (strcmp(s, "yes") == 0) {
2402 * Only the U-Boot image and it's environment
2403 * is protected, all other sectors are
2404 * unprotected (unlocked) if flash hardware
2405 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2406 * and the environment variable "unlock" is
2409 if (flash_info[i].legacy_unlock) {
2413 * Disable legacy_unlock temporarily,
2414 * since flash_real_protect would
2415 * relock all other sectors again
2418 flash_info[i].legacy_unlock = 0;
2421 * Legacy unlocking (e.g. Intel J3) ->
2422 * unlock only one sector. This will
2423 * unlock all sectors.
2425 flash_real_protect(&flash_info[i], 0, 0);
2427 flash_info[i].legacy_unlock = 1;
2430 * Manually mark other sectors as
2431 * unlocked (unprotected)
2433 for (k = 1; k < flash_info[i].sector_count; k++)
2434 flash_info[i].protect[k] = 0;
2437 * No legancy unlocking -> unlock all sectors
2439 flash_protect(FLAG_PROTECT_CLEAR,
2440 flash_info[i].start[0],
2441 flash_info[i].start[0]
2442 + flash_info[i].size - 1,
2446 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2449 flash_protect_default();
2450 #ifdef CONFIG_FLASH_CFI_MTD
2457 #ifdef CONFIG_CFI_FLASH /* for driver model */
2458 static int cfi_flash_probe(struct udevice *dev)
2460 void *blob = (void *)gd->fdt_blob;
2461 int node = dev_of_offset(dev);
2462 const fdt32_t *cell;
2464 int parent, addrc, sizec;
2467 parent = fdt_parent_offset(blob, node);
2468 fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
2469 /* decode regs, there may be multiple reg tuples. */
2470 cell = fdt_getprop(blob, node, "reg", &len);
2474 len /= sizeof(fdt32_t);
2476 addr = fdt_translate_address((void *)blob,
2478 flash_info[cfi_flash_num_flash_banks].dev = dev;
2479 flash_info[cfi_flash_num_flash_banks].base = addr;
2480 cfi_flash_num_flash_banks++;
2481 idx += addrc + sizec;
2483 gd->bd->bi_flashstart = flash_info[0].base;
2488 static const struct udevice_id cfi_flash_ids[] = {
2489 { .compatible = "cfi-flash" },
2490 { .compatible = "jedec-flash" },
2494 U_BOOT_DRIVER(cfi_flash) = {
2495 .name = "cfi_flash",
2497 .of_match = cfi_flash_ids,
2498 .probe = cfi_flash_probe,
2500 #endif /* CONFIG_CFI_FLASH */