arm64: zynqmp: Move dts zcu102 to zcu102-revA

[u-boot] / arch / arm / dts / uniphier-ld11.dtsi

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index a95cb6e97bd14bfec5be3a756251ac1decccf329..74f8f721a88891378a9992331f2c9adfad4cbdc5 100644 (file)
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -4,10 +4,10 @@
  * Copyright (C) 2016 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+        X11
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
-/memreserve/ 0x80000000 0x00000008;    /* cpu-release-addr */
+/memreserve/ 0x80000000 0x02000000;
 
 / {
        compatible = "socionext,uniphier-ld11";
@@ -34,31 +34,66 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x000>;
-                       enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000000>;
+                       clocks = <&sys_clk 33>;
+                       enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x001>;
-                       enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000000>;
+                       clocks = <&sys_clk 33>;
+                       enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
        };
 
+       cluster0_opp: opp_table {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-245000000 {
+                       opp-hz = /bits/ 64 <245000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-250000000 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-490000000 {
+                       opp-hz = /bits/ 64 <490000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-653334000 {
+                       opp-hz = /bits/ 64 <653334000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-666667000 {
+                       opp-hz = /bits/ 64 <666667000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-980000000 {
+                       opp-hz = /bits/ 64 <980000000>;
+                       clock-latency-ns = <300>;
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-1.0";
+               method = "smc";
+       };
+
        clocks {
                refclk: ref {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <25000000>;
                };
-
-               i2c_clk: i2c_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <50000000>;
-               };
        };
 
        timer {
@@ -69,12 +104,11 @@
                             <1 10 4>;
        };
 
-       soc {
+       soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
-               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -129,7 +163,7 @@
                        interrupts = <0 41 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c0>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 4>;
                        clock-frequency = <100000>;
                };
 
@@ -142,7 +176,7 @@
                        interrupts = <0 42 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c1>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 5>;
                        clock-frequency = <100000>;
                };
 
@@ -152,7 +186,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 43 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 6>;
                        clock-frequency = <400000>;
                };
 
@@ -165,7 +199,7 @@
                        interrupts = <0 44 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c3>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 7>;
                        clock-frequency = <100000>;
                };
 
@@ -178,7 +212,7 @@
                        interrupts = <0 45 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 8>;
                        clock-frequency = <100000>;
                };
 
@@ -188,7 +222,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 25 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 9>;
                        clock-frequency = <400000>;
                };
 
@@ -202,13 +236,24 @@
                        pinctrl-0 = <&pinctrl_system_bus>;
                };
 
-               smpctrl@59800000 {
+               smpctrl@59801000 {
                        compatible = "socionext,uniphier-smpctrl";
                        reg = <0x59801000 0x400>;
                };
 
+               sdctrl@59810000 {
+                       compatible = "socionext,uniphier-ld11-sdctrl",
+                                    "simple-mfd", "syscon";
+                       reg = <0x59810000 0x400>;
+
+                       sd_rst: reset {
+                               compatible = "socionext,uniphier-ld11-sd-reset";
+                               #reset-cells = <1>;
+                       };
+               };
+
                perictrl@59820000 {
-                       compatible = "socionext,uniphier-perictrl",
+                       compatible = "socionext,uniphier-ld11-perictrl",
                                     "simple-mfd", "syscon";
                        reg = <0x59820000 0x200>;
 
@@ -223,6 +268,23 @@
                        };
                };
 
+               emmc: sdhc@5a000000 {
+                       compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
+                       reg = <0x5a000000 0x400>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc_1v8>;
+                       clocks = <&sys_clk 4>;
+                       bus-width = <8>;
+                       mmc-ddr-1_8v;
+                       mmc-hs200-1_8v;
+                       cdns,phy-input-delay-legacy = <4>;
+                       cdns,phy-input-delay-mmc-highspeed = <2>;
+                       cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
+               };
+
                usb0: usb@5a800100 {
                        compatible = "socionext,uniphier-ehci", "generic-ehci";
                        status = "disabled";
@@ -260,7 +322,7 @@
                };
 
                mioctrl@5b3e0000 {
-                       compatible = "socionext,uniphier-mioctrl",
+                       compatible = "socionext,uniphier-ld11-mioctrl",
                                     "simple-mfd", "syscon";
                        reg = <0x5b3e0000 0x800>;
 
@@ -277,14 +339,12 @@
                };
 
                soc-glue@5f800000 {
-                       compatible = "socionext,uniphier-soc-glue",
+                       compatible = "socionext,uniphier-ld11-soc-glue",
                                     "simple-mfd", "syscon";
                        reg = <0x5f800000 0x2000>;
-                       u-boot,dm-pre-reloc;
 
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-ld11-pinctrl";
-                               u-boot,dm-pre-reloc;
                        };
                };
 
@@ -305,7 +365,7 @@
                sysctrl@61840000 {
                        compatible = "socionext,uniphier-ld11-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x61840000 0x4000>;
+                       reg = <0x61840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-ld11-clock";
@@ -317,6 +377,18 @@
                                #reset-cells = <1>;
                        };
                };
+
+               nand: nand@68000000 {
+                       compatible = "socionext,uniphier-denali-nand-v5b";
+                       status = "disabled";
+                       reg-names = "nand_data", "denali_reg";
+                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       interrupts = <0 65 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
+                       clocks = <&sys_clk 2>;
+                       nand-ecc-strength = <8>;
+               };
        };
 };