return get_mmc_clk(dev_index);
}
+static void exynos_dwmci_board_init(struct dwmci_host *host)
+{
+ if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
+ dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
+ dwmci_writel(host, EMMCP_SEND0, 0);
+ dwmci_writel(host, EMMCP_CTRL0,
+ MPSCTRL_SECURE_READ_BIT |
+ MPSCTRL_SECURE_WRITE_BIT |
+ MPSCTRL_NON_SECURE_READ_BIT |
+ MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
+ }
+}
+
/*
* This function adds the mmc channel to be registered with mmc core.
* index - mmc channel number.
#ifdef CONFIG_EXYNOS5420
host->quirks = DWMCI_QUIRK_DISABLE_SMU;
#endif
+ host->board_init = exynos_dwmci_board_init;
if (clksel) {
host->clksel_val = clksel;