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9b2ebcc)
For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
#include <i2c.h>
#define LPI2C_FIFO_SIZE 4
#include <i2c.h>
#define LPI2C_FIFO_SIZE 4
+#define LPI2C_NACK_TOUT_MS 1
#define LPI2C_TIMEOUT_MS 100
/* Weak linked function for overridden by some SoC power function */
#define LPI2C_TIMEOUT_MS 100
/* Weak linked function for overridden by some SoC power function */
{
lpi2c_status_t result;
u32 status;
{
lpi2c_status_t result;
u32 status;
result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
/* send stop command */
writel(LPI2C_MTDR_CMD(0x2), ®s->mtdr);
/* send stop command */
writel(LPI2C_MTDR_CMD(0x2), ®s->mtdr);
- while (result == LPI2C_SUCESS) {
+ start_time = get_timer(0);
+ while (1) {
status = readl(®s->msr);
result = imx_lpci2c_check_clear_error(regs);
/* stop detect flag */
status = readl(®s->msr);
result = imx_lpci2c_check_clear_error(regs);
/* stop detect flag */
writel(status, ®s->msr);
break;
}
writel(status, ®s->msr);
break;
}
+
+ if (get_timer(start_time) > LPI2C_NACK_TOUT_MS) {
+ debug("stop timeout\n");
+ return -ETIMEDOUT;
+ }
}
result = bus_i2c_stop(regs);
}
result = bus_i2c_stop(regs);
bus_i2c_init(bus, 100000);
bus_i2c_init(bus, 100000);