select ARM_ERRATA_621766
select ARM_ERRATA_725233
select USE_TINY_PRINTF
+ imply NAND_OMAP_GPMC
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_GPIO_SUPPORT
config OMAP44XX
bool "OMAP44XX SoC"
select USE_TINY_PRINTF
+ imply NAND_OMAP_ELM
+ imply NAND_OMAP_GPMC
imply SPL_DISPLAY_PRINT
imply SPL_EXT_SUPPORT
imply SPL_FAT_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
+ imply SPL_NAND_SIMPLE
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
bool "OMAP54XX SoC"
select ARM_ERRATA_798870
select SYS_THUMB_BUILD
+ imply NAND_OMAP_ELM
+ imply NAND_OMAP_GPMC
imply SPL_DISPLAY_PRINT
imply SPL_ENV_SUPPORT
imply SPL_EXT_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
+ imply SPL_NAND_AM33XX_BCH
+ imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
config TI816X
bool "TI816X SoC"
+ imply NAND_OMAP_ELM
+ imply NAND_OMAP_GPMC
help
Support for AM335x SOC from Texas Instruments.
The AM335x high performance SOC features a Cortex-A8
config AM43XX
bool "AM43XX SoC"
+ imply NAND_OMAP_ELM
+ imply NAND_OMAP_GPMC
imply SPL_DM
imply SPL_DM_SEQ_ALIAS
+ imply SPL_NAND_AM33XX_BCH
+ imply SPL_NAND_SUPPORT
imply SPL_OF_CONTROL
imply SPL_OF_TRANSLATE
imply SPL_SEPARATE_BSS
config AM33XX
bool "AM33XX SoC"
+ imply NAND_OMAP_ELM
+ imply NAND_OMAP_GPMC
+ imply SPL_NAND_AM33XX_BCH
+ imply SPL_NAND_SUPPORT
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply USE_TINY_PRINTF
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_FIT_VERBOSE=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_ICT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_NETBOOT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_MXC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_OF_LIBFDT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_BAV_VERSION=1
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_BAV_VERSION=2
CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_TARGET_BRXRE1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_BOOTDELAY=-2
# CONFIG_CONSOLE_MUX is not set
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_PROMPT="flea3 U-Boot > "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_OF_LIBFDT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_BOOTDELAY=1
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_OF_LIBFDT=y
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="REV1"
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="REV3"
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
CONFIG_LED_STATUS_STATE2=2
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_BCH=y
CONFIG_OF_LIBFDT=y
CONFIG_LED_STATUS_STATE2=2
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_BCH=y
CONFIG_OF_LIBFDT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
of OOB area before last ECC sector data starts. This is potentially
used to preserve the bad block marker in the OOB area.
+config NAND_OMAP_GPMC
+ bool "Support OMAP GPMC NAND controller"
+ depends on ARCH_OMAP2PLUS
+ help
+ Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
+ GPMC controller is used for parallel NAND flash devices, and can
+ do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
+ and BCH16 ECC algorithms.
+
+config NAND_OMAP_GPMC_PREFETCH
+ bool "Enable GPMC Prefetch"
+ depends on NAND_OMAP_GPMC
+ help
+ On OMAP platforms that use the GPMC controller
+ (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
+ uses the prefetch mode to speed up read operations.
+
+config NAND_OMAP_ELM
+ bool "Enable ELM driver for OMAPxx and AMxx platforms."
+ depends on NAND_OMAP_GPMC && !OMAP34XX
+ help
+ ELM controller is used for ECC error detection (not ECC calculation)
+ of BCH4, BCH8 and BCH16 ECC algorithms.
+ Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+ thus such SoC platforms need to depend on software library for ECC error
+ detection. However ECC calculation on such plaforms would still be
+ done by GPMC controller.
+
config NAND_VF610_NFC
bool "Support for Freescale NFC for VF610"
select SYS_NAND_SELF_INIT
controller. This uses the hardware ECC for read and
write operations.
+config NAND_MXC
+ bool "MXC NAND support"
+ depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
+ imply CMD_NAND
+ help
+ This enables the NAND driver for the NAND flash controller on the
+ i.MX27 / i.MX31 / i.MX5 rocessors.
+
config NAND_MXS
bool "MXS NAND support"
depends on MX6 || MX7
# option (mxc_nand, ndfc, omap_gpmc).
config SYS_NAND_BUSWIDTH_16BIT
bool "Use 16-bit NAND interface"
- depends on NAND_VF610_NFC
+ depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
help
Indicates that NAND device has 16-bit wide data-bus. In absence of this
config, bus-width of NAND device is assumed to be either 8-bit and later
Set the offset from the start of the nand where the redundant u-boot
should be loaded from.
+config SPL_NAND_AM33XX_BCH
+ bool "Enables SPL-NAND driver which supports ELM based"
+ depends on NAND_OMAP_GPMC && !OMAP34XX
+ default y
+ help
+ Hardware ECC correction. This is useful for platforms which have ELM
+ hardware engine and use NAND boot mode.
+ Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+ so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+ SPL-NAND driver with software ECC correction support.
+
config SPL_NAND_DENALI
bool "Support Denali NAND controller for SPL"
help
This is a small implementation of the Denali NAND controller
for use on SPL.
+config SPL_NAND_SIMPLE
+ bool "Use simple SPL NAND driver"
+ depends on !SPL_NAND_AM33XX_BCH
+ help
+ Support for NAND boot using simple NAND drivers that
+ expose the cmd_ctrl() interface.
endif
endif # if NAND
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
#define CONFIG_PHY_SMSC
/* NAND support */
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION 1
#define CONFIG_MTD_PARTITIONS
/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_NAND_OMAP_GPMC
-
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB sector */
#define CONFIG_ENV_OFFSET 0x260000
#define CONFIG_ENV_ADDR 0x260000
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_NAND_ECC
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
/* Board NAND Info. */
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
/*
* NAND
*/
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { \
2, 3, 4, 5, 6, 7, 8, 9, \
#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
#endif /* CONFIG_SPL_OS_BOOT */
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x8000000
-#define CONFIG_NAND_OMAP_GPMC
/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
/* USB configuration */
#define CONFIG_USB_MUSB_DSPS
/*
* Board NAND Info.
*/
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/*
* Board NAND Info.
*/
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
#endif
/* NAND support */
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_LOAD
#endif
/* SPL will use serial */
/* SPL loads an image from NAND */
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
/*
* NAND FLASH driver setup
*/
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
/*
* NAND
*/
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0xd8000000
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_LOAD
/*
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
/* Redundant Environment */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
/*
* NAND driver
*/
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/*
* NAND FLASH driver setup
*/
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
/*
* Board NAND Info.
*/
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
/* Defines for SPL */
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
/*
* Board NAND Info.
*/
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
#define CONFIG_EXTRA_ENV_SETTINGS \
/* NAND */
#if defined(CONFIG_NAND)
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
/* NAND config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-#define CONFIG_NAND_OMAP_GPMC
/* UBI configuration */
#define CONFIG_SPL_UBI 1
/* Board NAND Info. */
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
/* NAND devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
*/
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand at */
/* CS0 */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
/* Environment information */
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_MASK_CLE 0x10
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_LOAD
#endif
/* SPL */
/* NAND support */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
/* NAND Configuration. */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SPL_NAND_AM33XX_BCH
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
"512k(mtdoops)," \
"-(configuration)"
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
/* to access nand at */
/* CS0 */
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_NAND_OMAP_GPMC
/* Redundant Environment */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_CONSOLE
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_ECCSIZE 256
#define CONFIG_SYS_NAND_ECCBYTES 3
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
/*
* Board NAND Info.
*/
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
/* NAND: SPL related configs */
-#define CONFIG_SPL_NAND_AM33XX_BCH
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
/* SPL */
/* Defines for SPL */
-#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
#define CONFIG_SPL_TEXT_BASE 0x40400000
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
* s_init when we have SPL used.
*/
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
-#endif
-
/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_omap.h>
* access CS0 at is 0x8000000.
*/
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
#ifndef CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_NAND_BASE 0x8000000
#endif
(64 << 20))
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SYS_NAND_BASE 0x30000000
#endif
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
-#endif
-
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
-#endif
-
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_TIMER
#endif
"2m(fdt)," \
"-(ubi)"
-#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
/*
* NAND FLASH driver setup
*/
-#define CONFIG_NAND_MXC
#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
CONFIG_NAND_LPC32XX_MLC
CONFIG_NAND_LPC32XX_SLC
CONFIG_NAND_MODE_REG
-CONFIG_NAND_MXC
CONFIG_NAND_MXC_V1_1
CONFIG_NAND_NDFC
CONFIG_NAND_OMAP_ECCSCHEME
-CONFIG_NAND_OMAP_ELM
-CONFIG_NAND_OMAP_GPMC
-CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_GPMC_WSCFG
CONFIG_NAND_SECBOOT
CONFIG_NAND_SPL
CONFIG_SPL_MMC_MINIMAL
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
CONFIG_SPL_MXS_PSWITCH_WAIT
-CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_BASE
CONFIG_SPL_NAND_BOOT
CONFIG_SPL_NAND_DRIVERS
CONFIG_SPL_NAND_LOAD
CONFIG_SPL_NAND_MINIMAL
CONFIG_SPL_NAND_RAW_ONLY
-CONFIG_SPL_NAND_SIMPLE
CONFIG_SPL_NAND_SOFTECC
CONFIG_SPL_NAND_WORKSPACE
CONFIG_SPL_NO_CPU_SUPPORT_CODE