]> git.sur5r.net Git - u-boot/commitdiff
ARM: rmobile: Fix LBSC programming offset on M2 Porter
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Thu, 12 Apr 2018 13:48:54 +0000 (15:48 +0200)
committerMarek Vasut <marex@denx.de>
Fri, 13 Apr 2018 21:41:45 +0000 (23:41 +0200)
The offset of CSWCRx starts at 0x30, fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
board/renesas/porter/porter_spl.c

index f711aa9c356441c56e0d65dca072d25457429459..4b4dd4d4aa5a7c083bdb3c528ab0590a64468367 100644 (file)
@@ -169,8 +169,8 @@ static void tpl_init_lbsc(void)
        static const struct reg_config lbsc_config[] = {
                { 0x00, 0x00000020 },
                { 0x08, 0x00002020 },
-               { 0x10, 0x2a103320 },
-               { 0x18, 0xff70ff70 },
+               { 0x30, 0x2a103320 },
+               { 0x38, 0xff70ff70 },
        };
 
        static const u16 lbsc_offs[] = {