usTemp = ( ( *pc2 ) << 8 ) | *pc1;\r
\r
return usTemp;\r
-#warning The above code replaces the line below to ensure aborts are not received due to unaligned accesses. Alternatively use the --no_unaligned_access compiler option.\r
- //return endpoint->wMaxPacketSize;\r
}\r
\r
/**\r
* \param configuration Pointer to a USBConfigurationDescriptor instance.\r
* \return Total length (in bytes) of the configuration.\r
*/\r
-volatile unsigned long ulCount = 0;\r
uint32_t USBConfigurationDescriptor_GetTotalLength(\r
const USBConfigurationDescriptor *configuration)\r
{\r
-ulCount++;\r
-if( ulCount == 5 )\r
-{\r
- __asm volatile( "NOP" );\r
-}\r
return configuration->wTotalLength;\r
}\r
\r
WEAK void USBDCallbacks_Initialized(void)\r
{\r
/* Does nothing */\r
- __asm volatile( "NOP" );\r
}\r
\r
/**\r
is shared with other system peripherals, so System_Handler() must be\r
installed in place of FreeRTOS_Tick_Handler() if other system handlers are\r
required. The tick must be given the lowest priority (0 in the SAMA5 AIC) */\r
- IRQ_ConfigureIT( ID_PIT, 0, FreeRTOS_Tick_Handler );\r
+ IRQ_ConfigureIT( ID_PIT, AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE, FreeRTOS_Tick_Handler );\r
/* See commend directly above IRQ_ConfigureIT( ID_PIT, 0, System_Handler ); */\r
IRQ_EnableIT( ID_PIT );\r
PIT_EnableIT();\r
</option>\r
<option>\r
<name>CCDiagSuppress</name>\r
- <state>Pa131</state>\r
+ <state>Pa131, Pa039</state>\r
</option>\r
<option>\r
<name>CCDiagRemark</name>\r
\r
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
or 0 to run the more comprehensive test and demo application. */\r
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1\r
\r
/*-----------------------------------------------------------*/\r
\r
void vApplicationTickHook( void );\r
\r
/* Prototype for the IRQ handler called by the generic Cortex-A5 RTOS port\r
-layer. The address of the ISR is passed into this function as a parameter.\r
-Note this level of indirection could be removed by creating a SAMA5 specific\r
-port layer that calls the IRQ directly from the port layer rather than via this\r
-application callback. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress );\r
+layer. */\r
+void vApplicationIRQHandler( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Configure ports used by LEDs. */\r
vParTestInitialise();\r
\r
- CP15_EnableIcache();\r
+ #if defined (ddram)\r
+ MMU_Initialize( ( uint32_t * ) 0x30C000 );\r
+ CP15_EnableMMU();\r
+ CP15_EnableDcache();\r
+ CP15_EnableIcache();\r
+ #endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
internally by FreeRTOS API functions that create tasks, queues, software\r
timers, and semaphores. The size of the FreeRTOS heap is set by the\r
configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */\r
- taskDISABLE_INTERRUPTS();\r
- for( ;; );\r
+\r
+ /* Force an assert. */\r
+ configASSERT( ( volatile void * ) NULL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Run time stack overflow checking is performed if\r
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
function is called if a stack overflow is detected. */\r
- taskDISABLE_INTERRUPTS();\r
- for( ;; );\r
+\r
+ /* Force an assert. */\r
+ configASSERT( ( volatile void * ) NULL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* The function called by the RTOS port layer after it has managed interrupt\r
entry. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress )\r
+void vApplicationIRQHandler( void )\r
{\r
typedef void (*ISRFunction_t)( void );\r
ISRFunction_t pxISRFunction;\r
volatile uint32_t * pulAIC_IVR = ( uint32_t * ) configINTERRUPT_VECTOR_ADDRESS;\r
\r
- /* On the SAMA5 the parameter is a pointer to the ISR handling function. */\r
- pxISRFunction = ( ISRFunction_t ) ulInterruptVectorAddress;\r
+ /* Obtain the address of the interrupt handler from the AIR. */\r
+ pxISRFunction = ( ISRFunction_t ) *pulAIC_IVR;\r
\r
/* Write back to the SAMA5's interrupt controller's IVR register in case the\r
CPU is in protect mode. If the interrupt controller is not in protect mode\r
then this write is not necessary. */\r
- *pulAIC_IVR = 0;\r
+ *pulAIC_IVR = ( uint32_t ) pxISRFunction;\r
\r
/* Ensure the write takes before re-enabling interrupts. */\r
__DSB();\r
</Tab>\r
</Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd0><Wnd5><Tabs><Tab><Identity>TabID-31713-7906</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>\r
+ <SelectedTab>0</SelectedTab></Wnd0><Wnd3><Tabs><Tab><Identity>TabID-31713-7906</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>\r
<Editor>\r
\r
\r
\r
\r
- <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\
main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>127</YPos2><SelStart2>6411</SelStart2><SelEnd2>6411</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\Full_Demo\main_full.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>63</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\blinky_demo\main_blinky.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>63</YPos2><SelStart2>1373</SelStart2><SelEnd2>1373</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\Common\Minimal\GenQTest.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>796</YPos2><SelStart2>27238</SelStart2><SelEnd2>27238</SelEnd2></Tab><ActiveTab>3</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
\r+ <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\
CDCCommandConsole.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>441</YPos2><SelStart2>16342</SelStart2><SelEnd2>16359</SelEnd2></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>111</YPos2><SelStart2>6131</SelStart2><SelEnd2>6131</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portASM.s</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>117</YPos2><SelStart2>5123</SelStart2><SelEnd2>5123</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
\r <Positions>\r
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- <Top><Row0><Sizes><Toolbar-011172A8><key>iaridepm.enu1</key></Toolbar-011172A8></Sizes></Row0><Row1><Sizes><Toolbar-07251300><key>debuggergui.enu1</key></Toolbar-07251300></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>718</Bottom><Right>332</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203252</sizeHorzCY><sizeVertCX>198810</sizeVertCX><sizeVertCY>731707</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd5><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203252</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203252</sizeVertCY></Rect></Wnd5></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+ <Top><Row0><Sizes><Toolbar-002781D8><key>iaridepm.enu1</key></Toolbar-002781D8></Sizes></Row0><Row1><Sizes><Toolbar-1A6225A0><key>debuggergui.enu1</key></Toolbar-1A6225A0></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>718</Bottom><Right>332</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203252</sizeHorzCY><sizeVertCX>198810</sizeVertCX><sizeVertCY>731707</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203252</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203252</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
</Desktop>\r
</Project>\r
\r
Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0\r
CStepIntDis=_ 0\r
[DebugChecksum]\r
-Checksum=-1280642381\r
+Checksum=1420081031\r
[Exceptions]\r
StopOnUncaught=_ 0\r
StopOnThrow=_ 0\r
[Disassemble mode]\r
mode=0\r
[Breakpoints2]\r
-Bp0=_ 1 "EMUL_CODE" "{$PROJ_DIR$\main.c}.221.2" 0 0 1 "" 0 "" 0\r
-Count=1\r
+Bp0=_ 1 "EMUL_CODE" "{$PROJ_DIR$\main.c}.229.3" 0 0 1 "" 0 "" 0\r
+Bp1=_ 1 "EMUL_CODE" "{$PROJ_DIR$\CDCCommandConsole.c}.397.9" 0 0 1 "" 0 "" 0\r
+Count=2\r
[Aliases]\r
Count=0\r
SuppressDialog=0\r
\r
\r
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1216</ColumnWidth1><ColumnWidth2>324</ColumnWidth2><ColumnWidth3>81</ColumnWidth3></Build>\r
- <Debug-Log><ColumnWidth0>18</ColumnWidth0><ColumnWidth1>1624</ColumnWidth1></Debug-Log><TerminalIO/><Select-Ambiguous-Definitions><ColumnWidth0>552</ColumnWidth0><ColumnWidth1>78</ColumnWidth1><ColumnWidth2>946</ColumnWidth2></Select-Ambiguous-Definitions><Find-in-Files><ColumnWidth0>
497</ColumnWidth0><ColumnWidth1>82</ColumnWidth1><ColumnWidth2>746</ColumnWidth2><ColumnWidth3>331</ColumnWidth3></Find-in-Files><Breakpoints><col-names><item>Breakpoint</item><item>_I0</item></col-names><col-widths><item>500</item><item>35</item></col-widths><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Breakpoints></Static>
\r+ <Debug-Log><ColumnWidth0>18</ColumnWidth0><ColumnWidth1>1624</ColumnWidth1></Debug-Log><TerminalIO/><Select-Ambiguous-Definitions><ColumnWidth0>552</ColumnWidth0><ColumnWidth1>78</ColumnWidth1><ColumnWidth2>946</ColumnWidth2></Select-Ambiguous-Definitions><Find-in-Files><ColumnWidth0>
846</ColumnWidth0><ColumnWidth1>82</ColumnWidth1><ColumnWidth2>746</ColumnWidth2><ColumnWidth3>331</ColumnWidth3></Find-in-Files><Breakpoints><col-names><item>Breakpoint</item><item>_I0</item></col-names><col-widths><item>500</item><item>35</item></col-widths><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Breakpoints></Static>
\r <Windows>\r
\r
\r
- <Wnd0>\r
+ <Wnd2>\r
<Tabs>\r
<Tab>\r
<Identity>TabID-22351-19008</Identity>\r
</Tab>\r
</Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd0><Wnd2>\r
+ <SelectedTab>0</SelectedTab></Wnd2><Wnd3>\r
<Tabs>\r
<Tab>\r
<Identity>TabID-21076-19237</Identity>\r
</Tab>\r
<Tab><Identity>TabID-23502-23081</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab><Tab><Identity>TabID-24431-23894</Identity><TabName>Ambiguous Definitions</TabName><Factory>Select-Ambiguous-Definitions</Factory><Session/></Tab><Tab><Identity>TabID-9033-6116</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab></Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd2></Windows>\r
+ <SelectedTab>0</SelectedTab></Wnd3></Windows>\r
<Editor>\r
\r
\r
\r
\r
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\r
\r
\r
\r
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+ <Top><Row0><Sizes><Toolbar-002781D8><key>iaridepm.enu1</key></Toolbar-002781D8></Sizes></Row0><Row1><Sizes/></Row1></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>668</Bottom><Right>352</Right><x>-2</x><y>-2</y><xscreen>190</xscreen><yscreen>170</yscreen><sizeHorzCX>113095</sizeHorzCX><sizeHorzCY>172764</sizeHorzCY><sizeVertCX>210714</sizeVertCX><sizeVertCY>680894</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>272</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>274</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>278455</sizeHorzCY><sizeVertCX>113095</sizeVertCX><sizeVertCY>172764</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
</Desktop>\r
</Workspace>\r
\r
[MainWindow]\r
-WindowPlacement=_ 68 69 855 818 3\r
+WindowPlacement=_ 90 4 1190 900 3\r
/** Wakeup callback */\r
typedef void (*fGmacdWakeupCallback)(void);\r
\r
+/**\r
+ * GMAC scatter-gather entry.\r
+ */\r
+typedef struct _GmacSG {\r
+ uint32_t size;\r
+ void *pBuffer;\r
+} sGmacSG;\r
+\r
+/**\r
+ * GMAC scatter-gather list.\r
+ */\r
+typedef struct _GmacSGList {\r
+ uint32_t len;\r
+ sGmacSG *sg;\r
+} sGmacSGList;\r
+\r
/**\r
* GMAC driver struct.\r
*/\r
\r
extern void GMACD_Reset(sGmacd *pGmacd);\r
\r
+extern uint8_t GMACD_SendSG(sGmacd *pGmacd,\r
+ const sGmacSGList *sgl,\r
+ fGmacdTransferCallback fTxCb);\r
+\r
extern uint8_t GMACD_Send(sGmacd *pGmacd,\r
void *pBuffer,\r
uint32_t size,\r
define symbol __ICFEDIT_region_RAM_end__ = 0x21FFFF;\r
/*-Sizes-*/\r
define symbol __ICFEDIT_size_vectors__ = 0x100;\r
-define symbol __ICFEDIT_size_cstack__ = 0x4000; \r
-define symbol __ICFEDIT_size_irqstack__ = 0x60;\r
+define symbol __ICFEDIT_size_cstack__ = 0x900;\r
+define symbol __ICFEDIT_size_irqstack__ = 0x400;\r
define symbol __ICFEDIT_size_fiqstack__ = 0x60;\r
define symbol __ICFEDIT_size_abtstack__ = 0x60;\r
define symbol __ICFEDIT_size_undstack__ = 0x40;\r
\r
-define symbol __ICFEDIT_size_heap__ = 0x400;\r
+define symbol __ICFEDIT_size_heap__ = 0x0;\r
/*-Exports-*/\r
export symbol __ICFEDIT_region_RAM_start__;\r
export symbol __ICFEDIT_region_RAM_end__;\r
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };\r
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };\r
\r
-initialize by copy with packing=none { readwrite }; \r
+initialize by copy with packing=none { readwrite };\r
do not initialize { readonly section .noinit };\r
\r
place in VEC_region { section .vectors };\r
asm("AND R0, R0, R1"); // Calculate new CPSR value\r
asm("MSR CPSR_c,R0"); // Set new value\r
asm("bx lr");\r
+ ( void ) mask;\r
}\r
\r
void Dummy_Handler( void );\r
/**\r
* \brief Dummy default handler.\r
*/\r
-volatile uint32_t ulx = 0;\r
void Dummy_Handler( void )\r
{\r
- while ( ulx == 0 )\r
- {\r
- __asm volatile( "NOP" );\r
- }\r
- ulx = 0;\r
+ while ( 1 ) ;\r
}\r
\r
+volatile uint32_t ulSpuriousCount = 0;\r
void Spurious_Handler( void )\r
{\r
- while ( ulx == 0 )\r
- {\r
- __asm volatile( "NOP" );\r
- }\r
- ulx = 0;\r
+ ulSpuriousCount++;\r
}\r
\r
/**\r
* ----------------------------------------------------------------------------\r
*/\r
\r
-/** \addtogroup ddrd_module \r
+/** \addtogroup ddrd_module\r
*\r
* The DDR/SDR SDRAM Controller (DDRSDRC) is a multiport memory controller. It comprises\r
* four slave AHB interfaces. All simultaneous accesses (four independent AHB ports) are interleaved\r
* to maximize memory bandwidth and minimize transaction latency due to SDRAM protocol.\r
- * \r
+ *\r
* \section ddr2 Configures DDR2\r
*\r
* The DDR2-SDRAM devices are initialized by the following sequence:\r
* <li> Step 1. Program the memory device type into the Memory Device Register</li>\r
* <li> Step 2. Program the features of the SDR-SDRAM device into the Timing Register and into the Configuration Register.</li>\r
* <li> Step 3. For low-power SDRAM, temperature-compensated self refresh (TCSR), drive strength (DS) and partial array self refresh (PASR) must be set in the Low-power Register.</li>\r
- * <li> Step 4. A NOP command is issued to the SDR-SDRAM. Program NOP command into Mode Register, the application must \r
- * set Mode to 1 in the Mode Register. Perform a write access to any SDR-SDRAM address to acknowledge this command. \r
+ * <li> Step 4. A NOP command is issued to the SDR-SDRAM. Program NOP command into Mode Register, the application must\r
+ * set Mode to 1 in the Mode Register. Perform a write access to any SDR-SDRAM address to acknowledge this command.\r
* Now the clock which drives SDR-SDRAM device is enabled.</li>\r
* <li> Step 5. An all banks precharge command is issued to the SDR-SDRAM. Program all banks precharge command into Mode Register, the application must set Mode to 2 in the\r
* Mode Register . Perform a write access to any SDRSDRAM address to acknowledge this command.</li>\r
/*@{*/\r
/*@}*/\r
\r
- \r
- \r
+\r
+\r
/**\r
* \file\r
*\r
*\r
*/\r
\r
- \r
+\r
/*----------------------------------------------------------------------------\r
* Headers\r
*----------------------------------------------------------------------------*/\r
*/\r
void BOARD_ConfigureVddMemSel( uint8_t VddMemSel )\r
{\r
+ ( void ) VddMemSel;\r
}\r
- \r
+\r
#define DDR2_BA0(r) (1 << (26 + r))\r
#define DDR2_BA1(r) (1 << (27 + r))\r
\r
static void matrix_configure_slave_ddr(void)\r
{\r
int ddr_port;\r
- \r
+\r
/* Disable write protection */\r
MATRIX0->MATRIX_WPMR = MPDDRC_WPMR_WPKEY_PASSWD;\r
- \r
+\r
/* Partition internal SRAM */\r
MATRIX0->MATRIX_SSR[11] = 0;\r
MATRIX0->MATRIX_SRTSR[11] = 0x05;\r
MATRIX0->MATRIX_SASSR[11] = 0x04;\r
- \r
+\r
ddr_port = 1;\r
- \r
+\r
/* Partition external DDR */\r
/* DDR port 0 not used from NWd */\r
for (ddr_port = 1 ; ddr_port < 8 ; ddr_port++) {\r
Refresh count: 8K\r
Row address: A[12:0] (8K)\r
Column address A[9:0] (1K)\r
- Bank address BA[2:0] a(24,25) (8) \r
+ Bank address BA[2:0] a(24,25) (8)\r
*/\r
void BOARD_ConfigureDdram( void )\r
{\r
volatile uint32_t i;\r
\r
volatile uint32_t dummy_value;\r
- \r
+\r
matrix_configure_slave_ddr();\r
\r
/* Enable DDR2 clock x2 in PMC */\r
PMC->PMC_PCER0 = (1 << (ID_MPDDRC));\r
PMC->PMC_SCER |= PMC_SCER_DDRCK;\r
- \r
+\r
/* MPDDRC I/O Calibration Register */\r
dummy_value = MPDDRC->MPDDRC_IO_CALIBR;\r
dummy_value &= ~MPDDRC_IO_CALIBR_RDIV_Msk;\r
/* Step 1: Program the memory device type */\r
/* DBW = 0 (32 bits bus wide); Memory Device = 6 = DDR2-SDRAM = 0x00000006*/\r
\r
- MPDDRC->MPDDRC_MD = MPDDRC_MD_MD_DDR2_SDRAM | MPDDRC_MD_DBW_DBW_32_BITS; \r
+ MPDDRC->MPDDRC_MD = MPDDRC_MD_MD_DDR2_SDRAM | MPDDRC_MD_DBW_DBW_32_BITS;\r
\r
MPDDRC->MPDDRC_RD_DATA_PATH = MPDDRC_RD_DATA_PATH_SHIFT_SAMPLING_SHIFT_ONE_CYCLE;\r
\r
MPDDRC_CR_NB_8_BANKS |\r
MPDDRC_CR_NDQS_DISABLED |\r
MPDDRC_CR_UNAL_SUPPORTED |\r
- MPDDRC_CR_OCD_DDR2_EXITCALIB; \r
- \r
+ MPDDRC_CR_OCD_DDR2_EXITCALIB;\r
+\r
MPDDRC->MPDDRC_TPR0 = MPDDRC_TPR0_TRAS(8) // 40 ns\r
| MPDDRC_TPR0_TRCD(3) // 12.5 ns\r
| MPDDRC_TPR0_TWR(3) // 15 ns\r
| MPDDRC_TPR0_TRRD(2) // 8 ns\r
| MPDDRC_TPR0_TWTR(2) // 2 clock cycle\r
| MPDDRC_TPR0_TMRD(2); // 2 clock cycles\r
- \r
+\r
\r
MPDDRC->MPDDRC_TPR1 = MPDDRC_TPR1_TRFC(23)\r
| MPDDRC_TPR1_TXSNR(25)\r
| MPDDRC_TPR1_TXSRD(200)\r
| MPDDRC_TPR1_TXP(2);\r
\r
- MPDDRC->MPDDRC_TPR2 = MPDDRC_TPR2_TXARD(8) \r
+ MPDDRC->MPDDRC_TPR2 = MPDDRC_TPR2_TXARD(8)\r
| MPDDRC_TPR2_TXARDS(2)\r
| MPDDRC_TPR2_TRPA(3)\r
| MPDDRC_TPR2_TRTP(2)\r
/* DDRSDRC Low-power Register */\r
for (i = 0; i < 13300; i++) {\r
asm("nop");\r
- } \r
+ }\r
\r
/* Step 3: An NOP command is issued to the DDR2-SDRAM. Program the NOP command into\r
the Mode Register, the application must set MODE to 1 in the Mode Register. */\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_NOP_CMD;\r
/* Perform a write access to any DDR2-SDRAM address to acknowledge this command */\r
*pDdr = 0; /* Now clocks which drive DDR2-SDRAM device are enabled.*/\r
- \r
+\r
/* A minimum pause of 200 ¦Ìs is provided to precede any signal toggle. (6 core cycles per iteration, core is at 396MHz: min 13200 loops) */\r
for (i = 0; i < 13300; i++) {\r
asm("nop");\r
- } \r
- \r
+ }\r
+\r
/* Step 4: An NOP command is issued to the DDR2-SDRAM */\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_NOP_CMD;\r
/* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/\r
for (i = 0; i < 100; i++) {\r
asm("nop");\r
}\r
- \r
+\r
/* Step 5: An all banks precharge command is issued to the DDR2-SDRAM. */\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_PRCGALL_CMD;\r
/* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/\r
for (i = 0; i < 100; i++) {\r
asm("nop");\r
}\r
- \r
+\r
/* Step 11: An all banks precharge command is issued to the DDR2-SDRAM. */\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_PRCGALL_CMD;\r
*(pDdr) = 0; /* Perform a write access to any DDR2-SDRAM address to acknowledge this command */\r
}\r
\r
/* Step 13: Program DLL field into the Configuration Register to low(Disable DLL reset). */\r
- MPDDRC->MPDDRC_CR &= ~MPDDRC_CR_DLL_RESET_ENABLED; \r
+ MPDDRC->MPDDRC_CR &= ~MPDDRC_CR_DLL_RESET_ENABLED;\r
\r
/* Step 14: A Mode Register set (MRS) cycle is issued to program the parameters of the DDR2-SDRAM devices. */\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_LMR_CMD;\r
MPDDRC->MPDDRC_MR = MPDDRC_MR_MODE_NORMAL_CMD;\r
*(pDdr) = 0;\r
\r
-/* Step 21: Write the refresh rate into the count field in the Refresh Timer register. The DDR2-SDRAM device requires a refresh every 15.625 ¦Ìs or 7.81 ¦Ìs. \r
+/* Step 21: Write the refresh rate into the count field in the Refresh Timer register. The DDR2-SDRAM device requires a refresh every 15.625 ¦Ìs or 7.81 ¦Ìs.\r
With a 100MHz frequency, the refresh timer count register must to be set with (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781 i.e. 0x030d. */\r
/* For MT47H64M16HR, The refresh period is 64ms (commercial), This equates to an average\r
- refresh rate of 7.8125¦Ìs (commercial), To ensure all rows of all banks are properly \r
+ refresh rate of 7.8125¦Ìs (commercial), To ensure all rows of all banks are properly\r
refreshed, 8192 REFRESH commands must be issued every 64ms (commercial) */\r
/* ((64 x 10(^-3))/8192) x133 x (10^6) */\r
MPDDRC->MPDDRC_RTR = MPDDRC_RTR_COUNT(0x2b0); /* Set Refresh timer 7.8125 us*/\r
HSMC->HSMC_CS_NUMBER[3].HSMC_MODE = HSMC_MODE_READ_MODE |\r
HSMC_MODE_WRITE_MODE |\r
((busWidth == 8 )? HSMC_MODE_DBW_BIT_8 :HSMC_MODE_DBW_BIT_16) |\r
- HSMC_MODE_TDF_CYCLES(1); \r
+ HSMC_MODE_TDF_CYCLES(1);\r
}\r
\r
\r
{\r
uint32_t dbw;\r
PMC_EnablePeripheral(ID_HSMC);\r
- if (busWidth == 8) \r
+ if (busWidth == 8)\r
{\r
dbw = HSMC_MODE_DBW_BIT_8;\r
}\r
/*----------------------------------------------------------------------------\r
* Macro\r
*----------------------------------------------------------------------------*/\r
+\r
+/** Memory barriers */\r
+\r
+#define rmb() __ASM("dsb ")\r
+\r
+#if defined ( __ICCARM__ )\r
+ #define wmb() __ASM("dsb #st")\r
+#else\r
+ #define wmb() __ASM("dsb st")\r
+#endif\r
+\r
+/** ISO/IEC 14882:2003(E) - 5.6 Multiplicative operators:\r
+ * The binary / operator yields the quotient, and the binary % operator yields the remainder \r
+ * from the division of the first expression by the second. \r
+ * If the second operand of / or % is zero the behavior is undefined; otherwise (a/b)*b + a%b is equal to a.\r
+ * If both operands are nonnegative then the remainder is nonnegative;\r
+ * if not, the sign of the remainder is implementation-defined 74).\r
+ */\r
+static inline int fixed_mod(int a, int b)\r
+{\r
+ int rem = a % b;\r
+ while (rem < 0)\r
+ rem += b;\r
+\r
+ return rem;\r
+}\r
+\r
/** Return count in buffer */\r
-#define GCIRC_CNT(head,tail,size) (((head) - (tail)) % (size))\r
+#define GCIRC_CNT(head,tail,size) fixed_mod((head) - (tail), (size))\r
\r
/** Return space available, 0..size-1. always leave one free char as a completely full buffer \r
has head == tail, which is the same as empty */\r
so they can change underneath us without returning inconsistent results */\r
#define GCIRC_CNT_TO_END(head,tail,size) \\r
({int end = (size) - (tail); \\r
- int n = ((head) + end) % (size); \\r
+ int n = fixed_mod((head) + end, (size)); \\r
n < end ? n : end;})\r
\r
/** Return space available up to the end of the buffer */\r
#define GCIRC_SPACE_TO_END(head,tail,size) \\r
({int end = (size) - 1 - (head); \\r
- int n = (end + (tail)) % (size); \\r
+ int n = fixed_mod(end + (tail), (size)); \\r
n <= end ? n : end+1;})\r
\r
/** Increment head or tail */\r
#define GMAC_TX_ERR_BITS \\r
(GMAC_TX_RLE_BIT | GMAC_TX_UND_BIT | GMAC_TX_ERR_BIT)\r
\r
+// Interrupt bits\r
+#define GMAC_INT_RX_BITS \\r
+ (GMAC_IER_RCOMP | GMAC_IER_RXUBR | GMAC_IER_ROVR)\r
+#define GMAC_INT_TX_ERR_BITS \\r
+ (GMAC_IER_TUR | GMAC_IER_RLEX | GMAC_IER_TFC)\r
+#define GMAC_INT_TX_BITS \\r
+ (GMAC_INT_TX_ERR_BITS | GMAC_IER_TCOMP)\r
+\r
/*---------------------------------------------------------------------------\r
* Local functions\r
*---------------------------------------------------------------------------*/\r
GMAC_SetRxQueue(pHw, (uint32_t) pRd);\r
}\r
\r
- \r
+\r
+/**\r
+ * \brief Process successfully sent packets\r
+ * \param pGmacd Pointer to GMAC Driver instance.\r
+ */\r
+static void GMACD_TxCompleteHandler(sGmacd *pGmacd)\r
+{\r
+ Gmac *pHw = pGmacd->pHw;\r
+ sGmacTxDescriptor *pTxTd;\r
+ fGmacdTransferCallback fTxCb;\r
+ uint32_t tsr;\r
+\r
+ /* Clear status */\r
+ tsr = GMAC_GetTxStatus(pHw);\r
+ GMAC_ClearTxStatus(pHw, tsr);\r
+\r
+ while (!GCIRC_EMPTY(pGmacd->wTxHead, pGmacd->wTxTail)) {\r
+ pTxTd = &pGmacd->pTxD[pGmacd->wTxTail];\r
+\r
+ /* Make hw descriptor updates visible to CPU */\r
+ rmb();\r
+\r
+ /* Exit if frame has not been sent yet:\r
+ * On TX completion, the GMAC set the USED bit only into the\r
+ * very first buffer descriptor of the sent frame.\r
+ * Otherwise it updates this descriptor with status error bits.\r
+ * This is the descriptor writeback.\r
+ */\r
+ if ((pTxTd->status.val & GMAC_TX_USED_BIT) == 0)\r
+ break;\r
+\r
+ /* Process all buffers of the current transmitted frame */\r
+ while ((pTxTd->status.val & GMAC_TX_LAST_BUFFER_BIT) == 0) {\r
+ GCIRC_INC(pGmacd->wTxTail, pGmacd->wTxListSize);\r
+ pTxTd = &pGmacd->pTxD[pGmacd->wTxTail];\r
+ rmb();\r
+ }\r
+\r
+ /* Notify upper layer that a frame has been sent */\r
+ fTxCb = pGmacd->fTxCbList[pGmacd->wTxTail];\r
+ if (fTxCb)\r
+ fTxCb(tsr);\r
+\r
+ /* Go to next frame */\r
+ GCIRC_INC(pGmacd->wTxTail, pGmacd->wTxListSize);\r
+ }\r
+\r
+ /* If a wakeup has been scheduled, notify upper layer that it can\r
+ send other packets, send will be successfull. */\r
+ if (pGmacd->fWakupCb &&\r
+ GCIRC_SPACE(pGmacd->wTxHead,\r
+ pGmacd->wTxTail,\r
+ pGmacd->wTxListSize) >= pGmacd->bWakeupThreshold)\r
+ pGmacd->fWakupCb();\r
+}\r
+\r
+\r
+/**\r
+ * \brief Reset TX queue when errors are detected\r
+ * \param pGmacd Pointer to GMAC Driver instance.\r
+ */\r
+static void GMACD_TxErrorHandler(sGmacd *pGmacd)\r
+{\r
+ Gmac *pHw = pGmacd->pHw;\r
+ sGmacTxDescriptor *pTxTd;\r
+ fGmacdTransferCallback fTxCb;\r
+ uint32_t tsr;\r
+\r
+ /* Clear TXEN bit into the Network Configuration Register:\r
+ * this is a workaround to recover from TX lockups that \r
+ * occur on sama5d3 gmac (r1p24f2) when using scatter-gather.\r
+ * This issue has never been seen on sama5d4 gmac (r1p31).\r
+ */\r
+ GMAC_TransmitEnable(pHw, 0);\r
+\r
+ /* The following step should be optional since this function is called \r
+ * directly by the IRQ handler. Indeed, according to Cadence \r
+ * documentation, the transmission is halted on errors such as\r
+ * too many retries or transmit under run.\r
+ * However it would become mandatory if the call of this function\r
+ * were scheduled as a task by the IRQ handler (this is how Linux \r
+ * driver works). Then this function might compete with GMACD_Send().\r
+ *\r
+ * Setting bit 10, tx_halt, of the Network Control Register is not enough:\r
+ * We should wait for bit 3, tx_go, of the Transmit Status Register to \r
+ * be cleared at transmit completion if a frame is being transmitted.\r
+ */\r
+ GMAC_TransmissionHalt(pHw);\r
+ while (GMAC_GetTxStatus(pHw) & GMAC_TSR_TXGO);\r
+\r
+ /* Treat frames in TX queue including the ones that caused the error. */\r
+ while (!GCIRC_EMPTY(pGmacd->wTxHead, pGmacd->wTxTail)) {\r
+ int tx_completed = 0;\r
+ pTxTd = &pGmacd->pTxD[pGmacd->wTxTail];\r
+\r
+ /* Make hw descriptor updates visible to CPU */\r
+ rmb();\r
+\r
+ /* Check USED bit on the very first buffer descriptor to validate\r
+ * TX completion.\r
+ */\r
+ if (pTxTd->status.val & GMAC_TX_USED_BIT)\r
+ tx_completed = 1;\r
+\r
+ /* Go to the last buffer descriptor of the frame */\r
+ while ((pTxTd->status.val & GMAC_TX_LAST_BUFFER_BIT) == 0) {\r
+ GCIRC_INC(pGmacd->wTxTail, pGmacd->wTxListSize);\r
+ pTxTd = &pGmacd->pTxD[pGmacd->wTxTail];\r
+ rmb();\r
+ }\r
+\r
+ /* Notify upper layer that a frame status */\r
+ fTxCb = pGmacd->fTxCbList[pGmacd->wTxTail];\r
+ if (fTxCb)\r
+ fTxCb(tx_completed ? GMAC_TSR_TXCOMP : 0); // TODO: which error to notify?\r
+\r
+ /* Go to next frame */\r
+ GCIRC_INC(pGmacd->wTxTail, pGmacd->wTxListSize);\r
+ } \r
+\r
+ /* Reset TX queue */\r
+ GMACD_ResetTx(pGmacd);\r
+\r
+ /* Clear status */\r
+ tsr = GMAC_GetTxStatus(pHw);\r
+ GMAC_ClearTxStatus(pHw, tsr);\r
+\r
+ /* Now we are ready to start transmission again */\r
+ GMAC_TransmitEnable(pHw, 1);\r
+ if (pGmacd->fWakupCb)\r
+ pGmacd->fWakupCb();\r
+}\r
+\r
+ \r
/*---------------------------------------------------------------------------\r
* Exported functions\r
*---------------------------------------------------------------------------*/\r
void GMACD_Handler(sGmacd *pGmacd )\r
{\r
Gmac *pHw = pGmacd->pHw;\r
- sGmacTxDescriptor *pTxTd;\r
- fGmacdTransferCallback *pTxCb = NULL;\r
uint32_t isr;\r
uint32_t rsr;\r
- uint32_t tsr;\r
- \r
- uint32_t rxStatusFlag;\r
- uint32_t txStatusFlag;\r
- isr = GMAC_GetItStatus(pHw);\r
- rsr = GMAC_GetRxStatus(pHw);\r
- tsr = GMAC_GetTxStatus(pHw);\r
\r
- isr &= ~(GMAC_GetItMask(pHw)| 0xF8030300);\r
-\r
- /* RX packet */\r
- if ((isr & GMAC_ISR_RCOMP) || (rsr & GMAC_RSR_REC)) {\r
- asm("nop");\r
- rxStatusFlag = GMAC_RSR_REC;\r
- /* Frame received */\r
- /* Check OVR */\r
- if (rsr & GMAC_RSR_RXOVR) {\r
- rxStatusFlag |= GMAC_RSR_RXOVR;\r
- }\r
- /* Check BNA */\r
- if (rsr & GMAC_RSR_BNA) {\r
- rxStatusFlag |= GMAC_RSR_BNA;\r
+ /* Interrupt Status Register is cleared on read */\r
+ while ((isr = GMAC_GetItStatus(pHw)) != 0) {\r
+ /* RX packet */\r
+ if (isr & GMAC_INT_RX_BITS) {\r
+ /* Clear status */\r
+ rsr = GMAC_GetRxStatus(pHw);\r
+ GMAC_ClearRxStatus(pHw, rsr);\r
+\r
+ /* Invoke callback */\r
+ if (pGmacd->fRxCb)\r
+ pGmacd->fRxCb(rsr);\r
}\r
- /* Check HNO */\r
- if (rsr & GMAC_RSR_HNO) {\r
- rxStatusFlag |= GMAC_RSR_HNO;\r
- } \r
- /* Clear status */\r
- GMAC_ClearRxStatus(pHw, rxStatusFlag);\r
-\r
- /* Invoke callbacks */\r
- if (pGmacd->fRxCb)\r
- {\r
- pGmacd->fRxCb(rxStatusFlag);\r
- }\r
- }\r
\r
- /* TX packet */\r
- if ((isr & GMAC_ISR_TCOMP) || (tsr & GMAC_TSR_TXCOMP)) {\r
- asm("nop");\r
- txStatusFlag = GMAC_TSR_TXCOMP;\r
-\r
- /* A frame transmitted Check RLE */\r
- if (tsr & GMAC_TSR_RLE) {\r
- /* Status RLE & Number of discarded buffers */\r
- txStatusFlag = GMAC_TSR_RLE\r
- | GCIRC_CNT(pGmacd->wTxHead,\r
- pGmacd->wTxTail,\r
- pGmacd->wTxListSize);\r
- pTxCb = &pGmacd->fTxCbList[pGmacd->wTxTail];\r
- GMACD_ResetTx(pGmacd);\r
- TRACE_INFO("Tx RLE!!\n\r");\r
- GMAC_TransmitEnable(pHw, 1);\r
- }\r
- /* Check COL */\r
- if (tsr & GMAC_TSR_COL) {\r
- txStatusFlag |= GMAC_TSR_COL;\r
- }\r
- /* Check TFC */\r
- if (tsr & GMAC_TSR_TFC) {\r
- txStatusFlag |= GMAC_TSR_TFC;\r
- }\r
- /* Check UND */\r
- if (tsr & GMAC_TSR_UND) {\r
- txStatusFlag |= GMAC_TSR_UND;\r
+ /* TX error */\r
+ if (isr & GMAC_INT_TX_ERR_BITS) {\r
+ GMACD_TxErrorHandler(pGmacd);\r
+ break;\r
}\r
- /* Check HRESP */\r
- if (tsr & GMAC_TSR_HRESP) {\r
- txStatusFlag |= GMAC_TSR_HRESP;\r
- }\r
- /* Clear status */\r
- GMAC_ClearTxStatus(pHw, txStatusFlag);\r
\r
- if (!GCIRC_EMPTY(pGmacd->wTxHead, pGmacd->wTxTail))\r
- {\r
- /* Check the buffers */\r
- do {\r
- pTxTd = &pGmacd->pTxD[pGmacd->wTxTail];\r
- pTxCb = &pGmacd->fTxCbList[pGmacd->wTxTail];\r
- /* Exit if buffer has not been sent yet */\r
-\r
- if ((pTxTd->status.val & (uint32_t)GMAC_TX_USED_BIT) == 0) {\r
- break;\r
- }\r
- /* Notify upper layer that a packet has been sent */\r
- if (*pTxCb) {\r
- (*pTxCb)(txStatusFlag);\r
- }\r
- GCIRC_INC( pGmacd->wTxTail, pGmacd->wTxListSize );\r
- } while (GCIRC_CNT(pGmacd->wTxHead, pGmacd->wTxTail, pGmacd->wTxListSize));\r
- }\r
- \r
- if (tsr & GMAC_TSR_RLE) {\r
- /* Notify upper layer RLE */\r
- if (*pTxCb) {\r
- (*pTxCb)(txStatusFlag);\r
- }\r
- }\r
- \r
- /* If a wakeup has been scheduled, notify upper layer that it can\r
- send other packets, send will be successfull. */\r
- if((GCIRC_SPACE(pGmacd->wTxHead,\r
- pGmacd->wTxTail,\r
- pGmacd->wTxListSize) >= pGmacd->bWakeupThreshold) && pGmacd->fWakupCb)\r
- {\r
- pGmacd->fWakupCb();\r
+ /* TX packet */\r
+ if (isr & GMAC_IER_TCOMP)\r
+ GMACD_TxCompleteHandler(pGmacd);\r
+\r
+ if (isr & GMAC_IER_HRESP) {\r
+ TRACE_ERROR("HRESP\n\r");\r
}\r
}\r
-\r
- /* PAUSE Frame */\r
- if (isr & GMAC_ISR_PFNZ) TRACE_INFO("Pause!\n\r");\r
- if (isr & GMAC_ISR_PTZ) TRACE_INFO("Pause TO!\n\r");\r
}\r
\r
\r
GMAC_ReceiveEnable(pHw, 1);\r
GMAC_StatisticsWriteEnable(pHw, 1);\r
\r
- /* Setup the interrupts for TX (and errors) */\r
- GMAC_EnableIt(pHw, GMAC_IER_MFS \r
- |GMAC_IER_RCOMP\r
- |GMAC_IER_RXUBR\r
- |GMAC_IER_TXUBR\r
- |GMAC_IER_TUR\r
- |GMAC_IER_RLEX\r
- |GMAC_IER_TFC \r
- |GMAC_IER_TCOMP\r
- |GMAC_IER_ROVR \r
- |GMAC_IER_HRESP\r
- |GMAC_IER_PFNZ \r
- |GMAC_IER_PTZ \r
- |GMAC_IER_PFTR\r
- |GMAC_IER_EXINT\r
- |GMAC_IER_DRQFR\r
- |GMAC_IER_SFR\r
- |GMAC_IER_DRQFT\r
- |GMAC_IER_SFT\r
- |GMAC_IER_PDRQFR\r
- |GMAC_IER_PDRSFR\r
- |GMAC_IER_PDRQFT\r
- |GMAC_IER_PDRSFT);\r
- //0x03FCFCFF\r
+ /* Setup the interrupts for RX/TX completion (and errors) */\r
+ GMAC_EnableIt(pHw,\r
+ GMAC_INT_RX_BITS |\r
+ GMAC_INT_TX_BITS |\r
+ GMAC_IER_HRESP);\r
+\r
return GMACD_OK;\r
}\r
\r
}\r
\r
/**\r
- * \brief Send a packet with GMAC. If the packet size is larger than transfer buffer size \r
- * error returned. If packet transfer status is monitored, specify callback for each packet.\r
+ * \brief Send a frame splitted into buffers. If the frame size is larger than transfer buffer size\r
+ * error returned. If frame transfer status is monitored, specify callback for each frame.\r
* \param pGmacd Pointer to GMAC Driver instance. \r
- * \param buffer The buffer to be send\r
- * \param size The size of buffer to be send\r
- * \param fGMAC_TxCallback Threshold Wakeup callback\r
- * \param fWakeUpCb TX Wakeup\r
- * \return OK, Busy or invalid packet\r
+ * \param sgl Pointer to a scatter-gather list describing the buffers of the ethernet frame.\r
*/\r
-uint8_t GMACD_Send(sGmacd *pGmacd,\r
- void *pBuffer,\r
- uint32_t size,\r
- fGmacdTransferCallback fTxCb )\r
+uint8_t GMACD_SendSG(sGmacd *pGmacd,\r
+ const sGmacSGList *sgl,\r
+ fGmacdTransferCallback fTxCb)\r
{\r
Gmac *pHw = pGmacd->pHw;\r
- sGmacTxDescriptor *pTxTd;\r
- volatile fGmacdTransferCallback *pfTxCb;\r
- \r
- TRACE_DEBUG("GMAC_Send\n\r");\r
- /* Check parameter */\r
- if (size > GMAC_TX_UNITSIZE) {\r
+ sGmacTxDescriptor *pTxTd;\r
+ uint16_t wTxPos, wTxHead;\r
+ int i;\r
\r
- TRACE_ERROR("GMAC driver does not split send packets.");\r
+ TRACE_DEBUG("GMACD_SendSG\n\r");\r
+\r
+ /* Check parameter */\r
+ if (!sgl->len) {\r
+ TRACE_ERROR("GMACD_SendSG: ethernet frame is empty.\r\n");\r
+ return GMACD_PARAM;\r
+ }\r
+ if (sgl->len >= pGmacd->wTxListSize) {\r
+ TRACE_ERROR("GMACD_SendSG: ethernet frame has too many buffers.\r\n");\r
return GMACD_PARAM;\r
}\r
\r
- /* Pointers to the current TxTd */\r
- pTxTd = &pGmacd->pTxD[pGmacd->wTxHead];\r
- /* If no free TxTd, buffer can't be sent */\r
- if( GCIRC_SPACE(pGmacd->wTxHead, pGmacd->wTxTail, pGmacd->wTxListSize) == 0)\r
+ /* Check available space */\r
+ if (GCIRC_SPACE(pGmacd->wTxHead, pGmacd->wTxTail, pGmacd->wTxListSize) < (int)sgl->len)\r
return GMACD_TX_BUSY;\r
- /* Pointers to the current Tx Callback */\r
- pfTxCb = &pGmacd->fTxCbList[pGmacd->wTxHead];\r
- /* Sanity check */\r
-\r
- /* Setup/Copy data to transmition buffer */\r
- if (pBuffer && size) {\r
- // Driver manage the ring buffer\r
- memcpy((void *)pTxTd->addr, pBuffer, size);\r
- }\r
- /* Tx Callback */\r
- *pfTxCb = fTxCb;\r
-\r
- /* Update TD status. The buffer size defined is length of ethernet frame\r
- so it's always the last buffer of the frame. */\r
- if (pGmacd->wTxHead == pGmacd->wTxListSize-1) {\r
- pTxTd->status.val = \r
- (size & GMAC_LENGTH_FRAME) | GMAC_TX_LAST_BUFFER_BIT | GMAC_TX_WRAP_BIT;\r
- }\r
- else {\r
- pTxTd->status.val = (size & GMAC_LENGTH_FRAME) | GMAC_TX_LAST_BUFFER_BIT;\r
+\r
+ /* Tag end of TX queue */\r
+ wTxHead = fixed_mod(pGmacd->wTxHead + sgl->len, pGmacd->wTxListSize);\r
+ wTxPos = wTxHead;\r
+ pGmacd->fTxCbList[wTxPos] = NULL;\r
+ pTxTd = &pGmacd->pTxD[wTxPos];\r
+ pTxTd->status.val = GMAC_TX_USED_BIT;\r
+\r
+ /* Update buffer descriptors in reverse order to avoid a race \r
+ * condition with hardware.\r
+ */\r
+ for (i = (int)(sgl->len-1); i >= 0; --i) {\r
+ const sGmacSG *sg = &sgl->sg[i];\r
+ uint32_t status;\r
+\r
+ if (sg->size > GMAC_TX_UNITSIZE) {\r
+ TRACE_ERROR("GMACD_SendSG: buffer size is too big.\r\n");\r
+ return GMACD_PARAM;\r
+ }\r
+\r
+ if (wTxPos == 0)\r
+ wTxPos = pGmacd->wTxListSize-1;\r
+ else\r
+ wTxPos--;\r
+\r
+ /* Reset TX callback */\r
+ pGmacd->fTxCbList[wTxPos] = NULL;\r
+\r
+ pTxTd = &pGmacd->pTxD[wTxPos];\r
+#ifdef GMAC_ZERO_COPY\r
+ /** Update buffer descriptor address word:\r
+ * MUST be done before status word to avoid a race condition.\r
+ */\r
+ pTxTd->addr = (uint32_t)sg->pBuffer;\r
+ wmb();\r
+#else\r
+ /* Copy data into transmittion buffer */\r
+ if (sg->pBuffer && sg->size)\r
+ memcpy((void *)pTxTd->addr, sg->pBuffer, sg->size);\r
+#endif\r
+\r
+ /* Compute buffer descriptor status word */\r
+ status = sg->size & GMAC_LENGTH_FRAME;\r
+ if (i == (int)(sgl->len-1)) {\r
+ status |= GMAC_TX_LAST_BUFFER_BIT;\r
+ pGmacd->fTxCbList[wTxPos] = fTxCb;\r
+ }\r
+ if (wTxPos == pGmacd->wTxListSize-1)\r
+ status |= GMAC_TX_WRAP_BIT;\r
+\r
+ /* Update buffer descriptor status word: clear USED bit */\r
+ pTxTd->status.val = status;\r
+\r
+ /* Make newly initialized descriptor visible to hardware */\r
+ wmb();\r
}\r
- \r
- GCIRC_INC(pGmacd->wTxHead, pGmacd->wTxListSize);\r
- \r
- //CP15_flush_dcache_for_dma ((uint32_t)(pTxTd), ((uint32_t)(pTxTd) + sizeof(pTxTd)));\r
- /* Tx packets count */\r
+\r
+ /* Update TX ring buffer pointers */\r
+ pGmacd->wTxHead = wTxHead;\r
\r
/* Now start to transmit if it is not already done */\r
GMAC_TransmissionStart(pHw);\r
return GMACD_OK;\r
}\r
\r
+/**\r
+ * \brief Send a packet with GMAC. If the packet size is larger than transfer buffer size \r
+ * error returned. If packet transfer status is monitored, specify callback for each packet.\r
+ * \param pGmacd Pointer to GMAC Driver instance. \r
+ * \param buffer The buffer to be send\r
+ * \param size The size of buffer to be send\r
+ * \param fGMAC_TxCallback Threshold Wakeup callback\r
+ * \param fWakeUpCb TX Wakeup\r
+ * \return OK, Busy or invalid packet\r
+ */\r
+uint8_t GMACD_Send(sGmacd *pGmacd,\r
+ void *pBuffer,\r
+ uint32_t size,\r
+ fGmacdTransferCallback fTxCb)\r
+{\r
+ sGmacSGList sgl;\r
+ sGmacSG sg;\r
+\r
+ /* Init single entry scatter-gather list */\r
+ sg.size = size;\r
+ sg.pBuffer = pBuffer;\r
+ sgl.len = 1;\r
+ sgl.sg = &sg;\r
+\r
+ return GMACD_SendSG(pGmacd, &sgl, fTxCb);\r
+}\r
+\r
\r
/**\r
* Return current load of TX.\r
*/\r
\r
/** Softpack Version */\r
-#define SOFTPACK_VERSION "1.0"\r
+#define SOFTPACK_VERSION "1.1"\r
\r
#define TRACE_LEVEL_DEBUG 5\r
#define TRACE_LEVEL_INFO 4\r
/* ----------------------------------------------------------------------------\r
- * SAM Software Package License \r
+ * SAM Software Package License\r
* ----------------------------------------------------------------------------\r
* Copyright (c) 2013, Atmel Corporation\r
*\r
{\r
TRACE_DEBUG( "PIO_Initialize()\n\r" ) ;\r
\r
+ ( void ) dwPriority;\r
+\r
/* Reset sources */\r
_dwNumSources = 0 ;\r
\r
}\r
\r
/* if bit field of selected pin is 1, set as edge detection source */\r
- if (pPin->attribute & PIO_IT_EDGE) \r
+ if (pPin->attribute & PIO_IT_EDGE)\r
pio->PIO_ESR = pPin->mask;\r
else\r
pio->PIO_LSR = pPin->mask;\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * SAM Software Package License \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2011, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+\r
+/** \file\r
+ * \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "board.h"\r
+#include "include/USBD_Config.h"\r
+#include "CDCDSerialDriver.h"\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_serial_device_ids CDC Serial Device IDs\r
+ * @{\r
+ * This page lists the IDs used in the CDC Serial Device Descriptor.\r
+ *\r
+ * \section IDs\r
+ * - CDCDSerialDriverDescriptors_PRODUCTID\r
+ * - CDCDSerialDriverDescriptors_VENDORID\r
+ * - CDCDSerialDriverDescriptors_RELEASE\r
+ */\r
+\r
+/** Device product ID. */\r
+#define CDCDSerialDriverDescriptors_PRODUCTID 0x6119\r
+/** Device vendor ID (Atmel). */\r
+#define CDCDSerialDriverDescriptors_VENDORID 0x03EB\r
+/** Device release number. */\r
+#define CDCDSerialDriverDescriptors_RELEASE 0x0100\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Macros\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Returns the minimum between two values. */\r
+#define MIN(a, b) ((a < b) ? a : b)\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported variables\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Standard USB device descriptor for the CDC serial driver */\r
+const USBDeviceDescriptor deviceDescriptor = {\r
+\r
+ sizeof(USBDeviceDescriptor),\r
+ USBGenericDescriptor_DEVICE,\r
+ USBDeviceDescriptor_USB2_00,\r
+ CDCDeviceDescriptor_CLASS,\r
+ CDCDeviceDescriptor_SUBCLASS,\r
+ CDCDeviceDescriptor_PROTOCOL,\r
+ CHIP_USB_ENDPOINTS_MAXPACKETSIZE(0),\r
+ CDCDSerialDriverDescriptors_VENDORID,\r
+ CDCDSerialDriverDescriptors_PRODUCTID,\r
+ CDCDSerialDriverDescriptors_RELEASE,\r
+ 0, /* No string descriptor for manufacturer */\r
+ 1, /* Index of product string descriptor is #1 */\r
+ 0, /* No string descriptor for serial number */\r
+ 1 /* Device has 1 possible configuration */\r
+};\r
+\r
+/** Standard USB configuration descriptor for the CDC serial driver */\r
+const CDCDSerialDriverConfigurationDescriptors configurationDescriptorsFS = {\r
+\r
+ /* Standard configuration descriptor */\r
+ {\r
+ sizeof(USBConfigurationDescriptor),\r
+ USBGenericDescriptor_CONFIGURATION,\r
+ sizeof(CDCDSerialDriverConfigurationDescriptors),\r
+ 2, /* There are two interfaces in this configuration */\r
+ 1, /* This is configuration #1 */\r
+ 0, /* No string descriptor for this configuration */\r
+ USBD_BMATTRIBUTES,\r
+ USBConfigurationDescriptor_POWER(100)\r
+ },\r
+ /* Communication class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 0, /* This is interface #0 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 1, /* This interface uses 1 endpoint */\r
+ CDCCommunicationInterfaceDescriptor_CLASS,\r
+ CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,\r
+ CDCCommunicationInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Class-specific header functional descriptor */\r
+ {\r
+ sizeof(CDCHeaderDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_HEADER,\r
+ CDCGenericDescriptor_CDC1_10\r
+ },\r
+ /* Class-specific call management functional descriptor */\r
+ {\r
+ sizeof(CDCCallManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_CALLMANAGEMENT,\r
+ CDCCallManagementDescriptor_SELFCALLMANAGEMENT,\r
+ 0 /* No associated data interface */\r
+ },\r
+ /* Class-specific abstract control management functional descriptor */\r
+ {\r
+ sizeof(CDCAbstractControlManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,\r
+ CDCAbstractControlManagementDescriptor_LINE\r
+ },\r
+ /* Class-specific union functional descriptor with one slave interface */\r
+ {\r
+ sizeof(CDCUnionDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_UNION,\r
+ 0, /* Number of master interface is #0 */\r
+ 1 /* First slave interface is #1 */\r
+ },\r
+ /* Notification endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_INTERRUPT,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),\r
+ 10 /* Endpoint is polled every 10ms */\r
+ },\r
+ /* Data class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 1, /* This is interface #1 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 2, /* This interface uses 2 endpoints */\r
+ CDCDataInterfaceDescriptor_CLASS,\r
+ CDCDataInterfaceDescriptor_SUBCLASS,\r
+ CDCDataInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Bulk-OUT endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,\r
+ CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_MAXBULKSIZE_FS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ },\r
+ /* Bulk-IN endpoint descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_MAXBULKSIZE_FS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ }\r
+};\r
+\r
+/** Other-speed configuration descriptor (when in full-speed). */\r
+const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsFS = {\r
+\r
+ /* Standard configuration descriptor */\r
+ {\r
+ sizeof(USBConfigurationDescriptor),\r
+ USBGenericDescriptor_OTHERSPEEDCONFIGURATION,\r
+ sizeof(CDCDSerialDriverConfigurationDescriptors),\r
+ 2, /* There are two interfaces in this configuration */\r
+ 1, /* This is configuration #1 */\r
+ 0, /* No string descriptor for this configuration */\r
+ BOARD_USB_BMATTRIBUTES,\r
+ USBConfigurationDescriptor_POWER(100)\r
+ },\r
+ /* Communication class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 0, /* This is interface #0 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 1, /* This interface uses 1 endpoint */\r
+ CDCCommunicationInterfaceDescriptor_CLASS,\r
+ CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,\r
+ CDCCommunicationInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Class-specific header functional descriptor */\r
+ {\r
+ sizeof(CDCHeaderDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_HEADER,\r
+ CDCGenericDescriptor_CDC1_10\r
+ },\r
+ /* Class-specific call management functional descriptor */\r
+ {\r
+ sizeof(CDCCallManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_CALLMANAGEMENT,\r
+ CDCCallManagementDescriptor_SELFCALLMANAGEMENT,\r
+ 0 /* No associated data interface */\r
+ },\r
+ /* Class-specific abstract control management functional descriptor */\r
+ {\r
+ sizeof(CDCAbstractControlManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,\r
+ CDCAbstractControlManagementDescriptor_LINE\r
+ },\r
+ /* Class-specific union functional descriptor with one slave interface */\r
+ {\r
+ sizeof(CDCUnionDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_UNION,\r
+ 0, /* Number of master interface is #0 */\r
+ 1 /* First slave interface is #1 */\r
+ },\r
+ /* Notification endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_INTERRUPT,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),\r
+ 8 /* Endpoint is polled every 16ms */\r
+ },\r
+ /* Data class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 1, /* This is interface #1 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 2, /* This interface uses 2 endpoints */\r
+ CDCDataInterfaceDescriptor_CLASS,\r
+ CDCDataInterfaceDescriptor_SUBCLASS,\r
+ CDCDataInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Bulk-OUT endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,\r
+ CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_MAXBULKSIZE_HS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ },\r
+ /* Bulk-IN endpoint descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_MAXBULKSIZE_HS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ }\r
+};\r
+\r
+/** Configuration descriptor (when in high-speed). */\r
+const CDCDSerialDriverConfigurationDescriptors configurationDescriptorsHS = {\r
+\r
+ /* Standard configuration descriptor */\r
+ {\r
+ sizeof(USBConfigurationDescriptor),\r
+ USBGenericDescriptor_CONFIGURATION,\r
+ sizeof(CDCDSerialDriverConfigurationDescriptors),\r
+ 2, /* There are two interfaces in this configuration */\r
+ 1, /* This is configuration #1 */\r
+ 0, /* No string descriptor for this configuration */\r
+ BOARD_USB_BMATTRIBUTES,\r
+ USBConfigurationDescriptor_POWER(100)\r
+ },\r
+ /* Communication class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 0, /* This is interface #0 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 1, /* This interface uses 1 endpoint */\r
+ CDCCommunicationInterfaceDescriptor_CLASS,\r
+ CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,\r
+ CDCCommunicationInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Class-specific header functional descriptor */\r
+ {\r
+ sizeof(CDCHeaderDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_HEADER,\r
+ CDCGenericDescriptor_CDC1_10\r
+ },\r
+ /* Class-specific call management functional descriptor */\r
+ {\r
+ sizeof(CDCCallManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_CALLMANAGEMENT,\r
+ CDCCallManagementDescriptor_SELFCALLMANAGEMENT,\r
+ 0 /* No associated data interface */\r
+ },\r
+ /* Class-specific abstract control management functional descriptor */\r
+ {\r
+ sizeof(CDCAbstractControlManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,\r
+ CDCAbstractControlManagementDescriptor_LINE\r
+ },\r
+ /* Class-specific union functional descriptor with one slave interface */\r
+ {\r
+ sizeof(CDCUnionDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_UNION,\r
+ 0, /* Number of master interface is #0 */\r
+ 1 /* First slave interface is #1 */\r
+ },\r
+ /* Notification endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_INTERRUPT,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),\r
+ 8 /* Endpoint is polled every 16ms */\r
+ },\r
+ /* Data class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 1, /* This is interface #1 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 2, /* This interface uses 2 endpoints */\r
+ CDCDataInterfaceDescriptor_CLASS,\r
+ CDCDataInterfaceDescriptor_SUBCLASS,\r
+ CDCDataInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Bulk-OUT endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,\r
+ CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_MAXBULKSIZE_HS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ },\r
+ /* Bulk-IN endpoint descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_MAXBULKSIZE_HS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ }\r
+};\r
+\r
+/** Other-speed configuration descriptor (when in high-speed). */\r
+const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsHS = {\r
+\r
+ /* Standard configuration descriptor */\r
+ {\r
+ sizeof(USBConfigurationDescriptor),\r
+ USBGenericDescriptor_OTHERSPEEDCONFIGURATION,\r
+ sizeof(CDCDSerialDriverConfigurationDescriptors),\r
+ 2, /* There are two interfaces in this configuration */\r
+ 1, /* This is configuration #1 */\r
+ 0, /* No string descriptor for this configuration */\r
+ BOARD_USB_BMATTRIBUTES,\r
+ USBConfigurationDescriptor_POWER(100)\r
+ },\r
+ /* Communication class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 0, /* This is interface #0 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 1, /* This interface uses 1 endpoint */\r
+ CDCCommunicationInterfaceDescriptor_CLASS,\r
+ CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,\r
+ CDCCommunicationInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Class-specific header functional descriptor */\r
+ {\r
+ sizeof(CDCHeaderDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_HEADER,\r
+ CDCGenericDescriptor_CDC1_10\r
+ },\r
+ /* Class-specific call management functional descriptor */\r
+ {\r
+ sizeof(CDCCallManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_CALLMANAGEMENT,\r
+ CDCCallManagementDescriptor_SELFCALLMANAGEMENT,\r
+ 0 /* No associated data interface */\r
+ },\r
+ /* Class-specific abstract control management functional descriptor */\r
+ {\r
+ sizeof(CDCAbstractControlManagementDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,\r
+ CDCAbstractControlManagementDescriptor_LINE\r
+ },\r
+ /* Class-specific union functional descriptor with one slave interface */\r
+ {\r
+ sizeof(CDCUnionDescriptor),\r
+ CDCGenericDescriptor_INTERFACE,\r
+ CDCGenericDescriptor_UNION,\r
+ 0, /* Number of master interface is #0 */\r
+ 1 /* First slave interface is #1 */\r
+ },\r
+ /* Notification endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_INTERRUPT,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),\r
+ USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),\r
+ 10 /* Endpoint is polled every 10ms */\r
+ },\r
+ /* Data class interface standard descriptor */\r
+ {\r
+ sizeof(USBInterfaceDescriptor),\r
+ USBGenericDescriptor_INTERFACE,\r
+ 1, /* This is interface #1 */\r
+ 0, /* This is alternate setting #0 for this interface */\r
+ 2, /* This interface uses 2 endpoints */\r
+ CDCDataInterfaceDescriptor_CLASS,\r
+ CDCDataInterfaceDescriptor_SUBCLASS,\r
+ CDCDataInterfaceDescriptor_NOPROTOCOL,\r
+ 0 /* No string descriptor for this interface */\r
+ },\r
+ /* Bulk-OUT endpoint standard descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor), \r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,\r
+ CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),\r
+ USBEndpointDescriptor_MAXBULKSIZE_FS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ },\r
+ /* Bulk-IN endpoint descriptor */\r
+ {\r
+ sizeof(USBEndpointDescriptor),\r
+ USBGenericDescriptor_ENDPOINT,\r
+ USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,\r
+ CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_BULK,\r
+ MIN(CHIP_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),\r
+ USBEndpointDescriptor_MAXBULKSIZE_FS),\r
+ 0 /* Must be 0 for full-speed bulk endpoints */\r
+ }\r
+};\r
+\r
+/** Language ID string descriptor */\r
+const unsigned char languageIdStringDescriptor[] = {\r
+\r
+ USBStringDescriptor_LENGTH(1),\r
+ USBGenericDescriptor_STRING,\r
+ USBStringDescriptor_ENGLISH_US\r
+};\r
+\r
+/** Product string descriptor */\r
+const unsigned char productStringDescriptor[] = {\r
+\r
+ USBStringDescriptor_LENGTH(13),\r
+ USBGenericDescriptor_STRING,\r
+ USBStringDescriptor_UNICODE('A'),\r
+ USBStringDescriptor_UNICODE('T'),\r
+ USBStringDescriptor_UNICODE('9'),\r
+ USBStringDescriptor_UNICODE('1'),\r
+ USBStringDescriptor_UNICODE('U'),\r
+ USBStringDescriptor_UNICODE('S'),\r
+ USBStringDescriptor_UNICODE('B'),\r
+ USBStringDescriptor_UNICODE('S'),\r
+ USBStringDescriptor_UNICODE('e'),\r
+ USBStringDescriptor_UNICODE('r'),\r
+ USBStringDescriptor_UNICODE('i'),\r
+ USBStringDescriptor_UNICODE('a'),\r
+ USBStringDescriptor_UNICODE('l')\r
+};\r
+\r
+/** List of string descriptors used by the device */\r
+const unsigned char *stringDescriptors[] = {\r
+\r
+ languageIdStringDescriptor,\r
+ productStringDescriptor,\r
+};\r
+\r
+/** List of standard descriptors for the serial driver. */\r
+WEAK const USBDDriverDescriptors cdcdSerialDriverDescriptors = {\r
+\r
+ &deviceDescriptor,\r
+ (USBConfigurationDescriptor *) &(configurationDescriptorsFS),\r
+ 0, /* No full-speed device qualifier descriptor */\r
+ (USBConfigurationDescriptor *) &(otherSpeedDescriptorsFS),\r
+ 0, /* No high-speed device descriptor (uses FS one) */\r
+ (USBConfigurationDescriptor *) &(configurationDescriptorsHS),\r
+ 0, /* No high-speed device qualifier descriptor */\r
+ (USBConfigurationDescriptor *) &(otherSpeedDescriptorsHS),\r
+ stringDescriptors,\r
+ 2 /* 2 string descriptors in list */\r
+};\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ Implementation of the CDCLineCoding class.\r
+ */\r
+/** \addtogroup usb_cdc\r
+ *@{\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <CDCRequests.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Exported functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Initializes the bitrate, number of stop bits, parity checking and\r
+ * number of data bits of a CDCLineCoding object.\r
+ * \param lineCoding Pointer to a CDCLineCoding instance.\r
+ * \param bitrate Bitrate of the virtual COM connection.\r
+ * \param stopbits Number of stop bits\r
+ * (\ref usb_cdc_stop CDC LineCoding StopBits).\r
+ * \param parity Parity check type\r
+ * (\ref usb_cdc_parity CDC LineCoding ParityChecking).\r
+ * \param databits Number of data bits.\r
+ */\r
+void CDCLineCoding_Initialize(CDCLineCoding *lineCoding,\r
+ uint32_t bitrate,\r
+ uint8_t stopbits,\r
+ uint8_t parity,\r
+ uint8_t databits)\r
+{\r
+ lineCoding->dwDTERate = bitrate;\r
+ lineCoding->bCharFormat = stopbits;\r
+ lineCoding->bParityType = parity;\r
+ lineCoding->bDataBits = databits;\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * Implementation of the CDCSetControlLineStateRequest class.\r
+ */\r
+\r
+/** \addtogroup usb_cdc\r
+ *@{\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <CDCRequests.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Exported functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Notifies if the given request indicates that the DTE signal is present.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return 1 if the DTE signal is present, otherwise 0.\r
+ */\r
+uint8_t CDCSetControlLineStateRequest_IsDtePresent(\r
+ const USBGenericRequest *request)\r
+{\r
+ if ((USBGenericRequest_GetValue(request) & 0x0001) != 0) {\r
+\r
+ return 1;\r
+ }\r
+ else {\r
+\r
+ return 0;\r
+ }\r
+}\r
+\r
+/**\r
+ * Notifies if the given request indicates that the device carrier should\r
+ * be activated.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return 1 is the device should activate its carrier, 0 otherwise.\r
+ */\r
+uint8_t CDCSetControlLineStateRequest_ActivateCarrier(\r
+ const USBGenericRequest *request)\r
+{\r
+ if ((USBGenericRequest_GetValue(request) & 0x0002) != 0) {\r
+\r
+ return 1;\r
+ }\r
+ else {\r
+\r
+ return 0;\r
+ }\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * Implements for USB descriptor methods described by the USB specification.\r
+ */\r
+\r
+/** \addtogroup usb_descriptor\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "USBDescriptors.h"\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Returns the length of a descriptor.\r
+ * \param descriptor Pointer to a USBGenericDescriptor instance.\r
+ * \return Length of descriptor in bytes.\r
+ */\r
+uint32_t USBGenericDescriptor_GetLength(\r
+ const USBGenericDescriptor *descriptor)\r
+{\r
+ return descriptor->bLength;\r
+}\r
+\r
+/**\r
+ * Returns the type of a descriptor.\r
+ * \param descriptor Pointer to a USBGenericDescriptor instance.\r
+ * \return Type of descriptor.\r
+ */\r
+uint8_t USBGenericDescriptor_GetType(\r
+ const USBGenericDescriptor *descriptor)\r
+{\r
+ return descriptor->bDescriptorType;\r
+}\r
+\r
+/**\r
+ * Returns a pointer to the descriptor right after the given one, when\r
+ * parsing a Configuration descriptor.\r
+ * \param descriptor - Pointer to a USBGenericDescriptor instance.\r
+ * \return Pointer to the next descriptor.\r
+ */\r
+USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor(\r
+ const USBGenericDescriptor *descriptor)\r
+{\r
+ return (USBGenericDescriptor *)\r
+ (((char *) descriptor) + USBGenericDescriptor_GetLength(descriptor));\r
+}\r
+\r
+/** Parses the given descriptor list via costomized function.\r
+ * \param descriptor Pointer to the start of the whole descriptors list.\r
+ * \param totalLength Total size of descriptors in bytes.\r
+ * \param parseFunction Function to parse each descriptor scanned.\r
+ * Return 0 to continue parsing.\r
+ * \param parseArg Argument passed to parse function.\r
+ * \return Pointer to USBGenericDescriptor instance for next descriptor.\r
+ */\r
+USBGenericDescriptor *USBGenericDescriptor_Parse(\r
+ const USBGenericDescriptor *descriptor,\r
+ uint32_t totalLength,\r
+ USBDescriptorParseFunction parseFunction,\r
+ void *parseArg)\r
+{\r
+ int32_t size = totalLength;\r
+\r
+ if (size == 0)\r
+ return 0;\r
+\r
+ /* Start parsing descriptors */\r
+ while (1) {\r
+\r
+ uint32_t parseRC = 0;\r
+\r
+ /* Parse current descriptor */\r
+ if (parseFunction) {\r
+\r
+ parseRC = parseFunction((void*)descriptor, parseArg);\r
+ }\r
+\r
+ /* Get next descriptor */\r
+ size -= USBGenericDescriptor_GetLength(descriptor);\r
+ descriptor = USBGenericDescriptor_GetNextDescriptor(descriptor);\r
+\r
+ if (size) {\r
+ if (parseRC != 0) {\r
+\r
+ return (USBGenericDescriptor *)descriptor;\r
+ }\r
+ }\r
+ else\r
+ break;\r
+ }\r
+ /* No descriptors remaining */\r
+ return 0;\r
+}\r
+\r
+\r
+/**\r
+ * Returns the number of an endpoint given its descriptor.\r
+ * \param endpoint Pointer to a USBEndpointDescriptor instance.\r
+ * \return Endpoint number.\r
+ */\r
+uint8_t USBEndpointDescriptor_GetNumber(\r
+ const USBEndpointDescriptor *endpoint)\r
+{\r
+ return endpoint->bEndpointAddress & 0xF;\r
+}\r
+\r
+/**\r
+ * Returns the direction of an endpoint given its descriptor.\r
+ * \param endpoint Pointer to a USBEndpointDescriptor instance.\r
+ * \return Endpoint direction (see \ref usb_ep_dir).\r
+ */\r
+uint8_t USBEndpointDescriptor_GetDirection(\r
+ const USBEndpointDescriptor *endpoint)\r
+{\r
+ if ((endpoint->bEndpointAddress & 0x80) != 0) {\r
+\r
+ return USBEndpointDescriptor_IN;\r
+ }\r
+ else {\r
+\r
+ return USBEndpointDescriptor_OUT;\r
+ }\r
+}\r
+\r
+/**\r
+ * Returns the type of an endpoint given its descriptor.\r
+ * \param endpoint Pointer to a USBEndpointDescriptor instance.\r
+ * \return Endpoint type (see \ref usb_ep_type).\r
+ */\r
+uint8_t USBEndpointDescriptor_GetType(\r
+ const USBEndpointDescriptor *endpoint)\r
+{\r
+ return endpoint->bmAttributes & 0x3;\r
+}\r
+\r
+/**\r
+ * Returns the maximum size of a packet (in bytes) on an endpoint given\r
+ * its descriptor.\r
+ * \param endpoint - Pointer to a USBEndpointDescriptor instance.\r
+ * \return Maximum packet size of endpoint.\r
+ */\r
+uint16_t USBEndpointDescriptor_GetMaxPacketSize(\r
+ const USBEndpointDescriptor *endpoint)\r
+{\r
+uint16_t usTemp;\r
+uint8_t *pc1, *pc2;\r
+\r
+ /* Note this is an unaligned access hence it is performed as two byte\r
+ accesses. */\r
+ pc1 = ( uint8_t * ) &( endpoint->wMaxPacketSize );\r
+ pc2 = pc1 + 1;\r
+ usTemp = ( ( *pc2 ) << 8 ) | *pc1;\r
+\r
+ return usTemp;\r
+}\r
+\r
+/**\r
+ * Returns the polling interval on an endpoint given its descriptor.\r
+ * \param endpoint - Pointer to a USBEndpointDescriptor instance.\r
+ * \return Polling interval of endpoint.\r
+ */\r
+uint8_t USBEndpointDescriptor_GetInterval(\r
+ const USBEndpointDescriptor *endpoint)\r
+{\r
+ return endpoint->bInterval;\r
+}\r
+\r
+\r
+\r
+/** Returns the total length of a configuration, i.e. including the\r
+ * descriptors following it.\r
+ * \param configuration Pointer to a USBConfigurationDescriptor instance.\r
+ * \return Total length (in bytes) of the configuration.\r
+ */\r
+uint32_t USBConfigurationDescriptor_GetTotalLength(\r
+ const USBConfigurationDescriptor *configuration)\r
+{\r
+ return configuration->wTotalLength;\r
+}\r
+\r
+/** Returns the number of interfaces in a configuration.\r
+ * \param configuration Pointer to a USBConfigurationDescriptor instance.\r
+ * \return Number of interfaces in configuration.\r
+ */\r
+unsigned char USBConfigurationDescriptor_GetNumInterfaces(\r
+ const USBConfigurationDescriptor *configuration)\r
+{\r
+ return configuration->bNumInterfaces;\r
+}\r
+\r
+/** Indicates if the device is self-powered when in a given configuration.\r
+ * \param configuration Pointer to a USBConfigurationDescriptor instance.\r
+ * \return 1 if the device is self-powered when in the given configuration;\r
+ * otherwise 0.\r
+ */\r
+unsigned char USBConfigurationDescriptor_IsSelfPowered(\r
+ const USBConfigurationDescriptor *configuration)\r
+{\r
+ if ((configuration->bmAttributes & (1 << 6)) != 0) {\r
+\r
+ return 1;\r
+ }\r
+ else {\r
+\r
+ return 0;\r
+ }\r
+}\r
+\r
+/** Parses the given Configuration descriptor (followed by relevant\r
+ * interface, endpoint and class-specific descriptors) into three arrays.\r
+ * *Each array must have its size equal or greater to the number of\r
+ * descriptors it stores plus one*. A null-value is inserted after the last\r
+ * descriptor of each type to indicate the array end.\r
+ *\r
+ * Note that if the pointer to an array is null (0), nothing is stored in\r
+ * it.\r
+ * \param configuration Pointer to the start of the whole Configuration\r
+ * descriptor.\r
+ * \param interfaces Pointer to the Interface descriptor array.\r
+ * \param endpoints Pointer to the Endpoint descriptor array.\r
+ * \param others Pointer to the class-specific descriptor array.\r
+ */\r
+void USBConfigurationDescriptor_Parse(\r
+ const USBConfigurationDescriptor *configuration,\r
+ USBInterfaceDescriptor **interfaces,\r
+ USBEndpointDescriptor **endpoints,\r
+ USBGenericDescriptor **others)\r
+{\r
+ /* Get size of configuration to parse */\r
+ int size = USBConfigurationDescriptor_GetTotalLength(configuration);\r
+ size -= sizeof(USBConfigurationDescriptor);\r
+\r
+ /* Start parsing descriptors */\r
+ USBGenericDescriptor *descriptor = (USBGenericDescriptor *) configuration;\r
+ while (size > 0) {\r
+\r
+ /* Get next descriptor */\r
+ descriptor = USBGenericDescriptor_GetNextDescriptor(descriptor);\r
+ size -= USBGenericDescriptor_GetLength(descriptor);\r
+\r
+ /* Store descriptor in correponding array */\r
+ if (USBGenericDescriptor_GetType(descriptor)\r
+ == USBGenericDescriptor_INTERFACE) {\r
+\r
+ if (interfaces) {\r
+\r
+ *interfaces = (USBInterfaceDescriptor *) descriptor;\r
+ interfaces++;\r
+ }\r
+ }\r
+ else if (USBGenericDescriptor_GetType(descriptor)\r
+ == USBGenericDescriptor_ENDPOINT) {\r
+\r
+ if (endpoints) {\r
+\r
+ *endpoints = (USBEndpointDescriptor *) descriptor;\r
+ endpoints++;\r
+ }\r
+ }\r
+ else if (others) {\r
+\r
+ *others = descriptor;\r
+ others++;\r
+ }\r
+ }\r
+\r
+ /* Null-terminate arrays */\r
+ if (interfaces) {\r
+\r
+ *interfaces = 0;\r
+ }\r
+ if (endpoints) {\r
+\r
+ *endpoints = 0;\r
+ }\r
+ if (others) {\r
+\r
+ *others = 0;\r
+ }\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \section Purpose\r
+ * \r
+ * Implements for USB requests described by the USB specification.\r
+ */\r
+\r
+/** \addtogroup usb_request\r
+ * @{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+ \r
+#include <USBRequests.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Returns the type of the given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return "USB Request Types"\r
+ */\r
+extern uint8_t USBGenericRequest_GetType(const USBGenericRequest *request)\r
+{\r
+ return ((request->bmRequestType >> 5) & 0x3);\r
+}\r
+\r
+/**\r
+ * Returns the request code of the given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Request code.\r
+ * \sa "USB Request Codes"\r
+ */\r
+uint8_t USBGenericRequest_GetRequest(const USBGenericRequest *request)\r
+{\r
+ return request->bRequest;\r
+}\r
+\r
+/**\r
+ * Returns the wValue field of the given request.\r
+ * \param request - Pointer to a USBGenericRequest instance.\r
+ * \return Request value.\r
+ */\r
+uint16_t USBGenericRequest_GetValue(const USBGenericRequest *request)\r
+{\r
+ return request->wValue;\r
+}\r
+\r
+/**\r
+ * Returns the wIndex field of the given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Request index;\r
+ */\r
+uint16_t USBGenericRequest_GetIndex(const USBGenericRequest *request)\r
+{\r
+ return request->wIndex;\r
+}\r
+\r
+/**\r
+ * Returns the expected length of the data phase following a request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Length of data phase.\r
+ */\r
+uint16_t USBGenericRequest_GetLength(const USBGenericRequest *request)\r
+{\r
+ return request->wLength;\r
+}\r
+\r
+/**\r
+ * Returns the endpoint number targetted by a given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Endpoint number.\r
+ */\r
+uint8_t USBGenericRequest_GetEndpointNumber(\r
+ const USBGenericRequest *request)\r
+{\r
+ return USBGenericRequest_GetIndex(request) & 0xF;\r
+}\r
+\r
+/**\r
+ * Returns the intended recipient of a given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Request recipient.\r
+ * \sa "USB Request Recipients"\r
+ */\r
+uint8_t USBGenericRequest_GetRecipient(const USBGenericRequest *request)\r
+{\r
+ /* Recipient is in bits [0..4] of the bmRequestType field */\r
+ return request->bmRequestType & 0xF;\r
+}\r
+\r
+/**\r
+ * Returns the direction of the data transfer following the given request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Transfer direction.\r
+ * \sa "USB Request Directions"\r
+ */\r
+uint8_t USBGenericRequest_GetDirection(const USBGenericRequest *request)\r
+{\r
+ /* Transfer direction is located in bit D7 of the bmRequestType field */\r
+ if ((request->bmRequestType & 0x80) != 0) {\r
+\r
+ return USBGenericRequest_IN;\r
+ }\r
+ else {\r
+\r
+ return USBGenericRequest_OUT;\r
+ }\r
+}\r
+\r
+\r
+/**\r
+ * Returns the type of the descriptor requested by the host given the\r
+ * corresponding GET_DESCRIPTOR request.\r
+ * \param request Pointer to a USBGenericDescriptor instance.\r
+ * \return Type of the requested descriptor.\r
+ */\r
+uint8_t USBGetDescriptorRequest_GetDescriptorType(\r
+ const USBGenericRequest *request)\r
+{\r
+ /* Requested descriptor type is in the high-byte of the wValue field */\r
+ return (USBGenericRequest_GetValue(request) >> 8) & 0xFF;\r
+}\r
+\r
+/**\r
+ * Returns the index of the requested descriptor, given the corresponding\r
+ * GET_DESCRIPTOR request.\r
+ * \param request Pointer to a USBGenericDescriptor instance.\r
+ * \return Index of the requested descriptor.\r
+ */\r
+uint8_t USBGetDescriptorRequest_GetDescriptorIndex(\r
+ const USBGenericRequest *request)\r
+{\r
+ /* Requested descriptor index if in the low byte of the wValue field */\r
+ return USBGenericRequest_GetValue(request) & 0xFF;\r
+}\r
+\r
+\r
+/**\r
+ * Returns the address that the device must take in response to a\r
+ * SET_ADDRESS request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return New device address.\r
+ */\r
+uint8_t USBSetAddressRequest_GetAddress(const USBGenericRequest *request)\r
+{\r
+ return USBGenericRequest_GetValue(request) & 0x7F;\r
+}\r
+\r
+\r
+/**\r
+ * Returns the number of the configuration that should be set in response\r
+ * to the given SET_CONFIGURATION request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Number of the requested configuration.\r
+ */\r
+uint8_t USBSetConfigurationRequest_GetConfiguration(\r
+ const USBGenericRequest *request)\r
+{\r
+ return USBGenericRequest_GetValue(request);\r
+}\r
+\r
+\r
+/**\r
+ * Indicates which interface is targetted by a GET_INTERFACE or\r
+ * SET_INTERFACE request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Interface number.\r
+ */\r
+uint8_t USBInterfaceRequest_GetInterface(const USBGenericRequest *request)\r
+{\r
+ return (USBGenericRequest_GetIndex(request) & 0xFF);\r
+}\r
+\r
+/**\r
+ * Indicates the new alternate setting that the interface targetted by a\r
+ * SET_INTERFACE request should use.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return New active setting for the interface.\r
+ */\r
+uint8_t USBInterfaceRequest_GetAlternateSetting(\r
+ const USBGenericRequest *request)\r
+{\r
+ return (USBGenericRequest_GetValue(request) & 0xFF);\r
+}\r
+\r
+\r
+/**\r
+ * Returns the feature selector of a given CLEAR_FEATURE or SET_FEATURE\r
+ * request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Feature selector.\r
+ */\r
+uint8_t USBFeatureRequest_GetFeatureSelector(\r
+ const USBGenericRequest *request)\r
+{\r
+ return USBGenericRequest_GetValue(request);\r
+}\r
+\r
+/**\r
+ * Indicates the test that the device must undertake following a\r
+ * SET_FEATURE request.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return Test selector.\r
+ */\r
+uint8_t USBFeatureRequest_GetTestSelector(\r
+ const USBGenericRequest *request)\r
+{\r
+ return (USBGenericRequest_GetIndex(request) >> 8) & 0xFF;\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\file\r
+ * Implementation of a single CDC serial port function for USB device.\r
+ */\r
+\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "CDCDSerial.h"\r
+\r
+#include <USBLib_Trace.h>\r
+#include <USBDDriver.h>\r
+#include <USBD_HAL.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal variables\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Serial Port instance list */\r
+static CDCDSerialPort cdcdSerial;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * USB CDC Serial Port Event Handler.\r
+ * \param event Event code.\r
+ * \param param Event parameter.\r
+ */\r
+static uint32_t CDCDSerial_EventHandler(uint32_t event,\r
+ uint32_t param)\r
+{\r
+ switch (event) {\r
+ case CDCDSerialPortEvent_SETCONTROLLINESTATE:\r
+ {\r
+ if (CDCDSerial_ControlLineStateChanged != NULL) {\r
+ CDCDSerial_ControlLineStateChanged(\r
+ (param & CDCControlLineState_DTR) > 0,\r
+ (param & CDCControlLineState_RTS) > 0);\r
+ }\r
+ }\r
+ break;\r
+ case CDCDSerialPortEvent_SETLINECODING:\r
+ {\r
+ if (NULL != CDCDSerial_LineCodingIsToChange) {\r
+ event = CDCDSerial_LineCodingIsToChange(\r
+ (CDCLineCoding*)param);\r
+ if (event != USBRC_SUCCESS)\r
+ return event;\r
+ }\r
+ }\r
+ break;\r
+ default:\r
+ return USBRC_SUCCESS;\r
+ }\r
+\r
+ return USBRC_SUCCESS;\r
+}\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Initializes the USB Device CDC serial driver & USBD Driver.\r
+ * \param pUsbd Pointer to USBDDriver instance.\r
+ * \param bInterfaceNb Interface number for the function.\r
+ */\r
+void CDCDSerial_Initialize(\r
+ USBDDriver *pUsbd, uint8_t bInterfaceNb)\r
+{\r
+ CDCDSerialPort *pCdcd = &cdcdSerial;\r
+\r
+ TRACE_INFO("CDCDSerial_Initialize\n\r");\r
+\r
+ /* Initialize serial port function */\r
+ CDCDSerialPort_Initialize(\r
+ pCdcd, pUsbd,\r
+ (CDCDSerialPortEventHandler)CDCDSerial_EventHandler,\r
+ 0,\r
+ bInterfaceNb, 2);\r
+}\r
+\r
+/**\r
+ * Invoked whenever the device is changed by the\r
+ * host.\r
+ * \pDescriptors Pointer to the descriptors for function configure.\r
+ * \wLength Length of descriptors in number of bytes.\r
+ */\r
+void CDCDSerial_ConfigureFunction(USBGenericDescriptor *pDescriptors,\r
+ uint16_t wLength)\r
+{\r
+ CDCDSerialPort *pCdcd = &cdcdSerial;\r
+ CDCDSerialPort_ParseInterfaces(pCdcd,\r
+ (USBGenericDescriptor*)pDescriptors,\r
+ wLength);\r
+}\r
+\r
+/**\r
+ * Handles CDC-specific SETUP requests. Should be called from a\r
+ * re-implementation of USBDCallbacks_RequestReceived() method.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ */\r
+uint32_t CDCDSerial_RequestHandler(const USBGenericRequest *request)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+\r
+ TRACE_INFO_WP("Cdcf ");\r
+ return CDCDSerialPort_RequestHandler(pCdcd, request);\r
+}\r
+\r
+/**\r
+ * Receives data from the host through the virtual COM port created by\r
+ * the CDC device serial driver. This function behaves like USBD_Read.\r
+ * \param data Pointer to the data buffer to put received data.\r
+ * \param size Size of the data buffer in bytes.\r
+ * \param callback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param argument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint32_t CDCDSerial_Read(void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ return CDCDSerialPort_Read(pCdcd, data, size, callback, argument);\r
+}\r
+\r
+/**\r
+ * Sends a data buffer through the virtual COM port created by the CDC\r
+ * device serial driver. This function behaves exactly like USBD_Write.\r
+ * \param data Pointer to the data buffer to send.\r
+ * \param size Size of the data buffer in bytes.\r
+ * \param callback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param argument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint32_t CDCDSerial_Write(void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ return CDCDSerialPort_Write(pCdcd, data, size, callback, argument);\r
+}\r
+\r
+/**\r
+ * Returns the current control line state of the RS-232 line.\r
+ */\r
+uint8_t CDCDSerial_GetControlLineState(void)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ return CDCDSerialPort_GetControlLineState(pCdcd);\r
+}\r
+\r
+/**\r
+ * Copy current line coding settings to pointered space.\r
+ * \param pLineCoding Pointer to CDCLineCoding instance.\r
+ */\r
+void CDCDSerial_GetLineCoding(CDCLineCoding* pLineCoding)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ CDCDSerialPort_GetLineCoding(pCdcd, pLineCoding);\r
+}\r
+\r
+/**\r
+ * Returns the current status of the RS-232 line.\r
+ */\r
+uint16_t CDCDSerial_GetSerialState(void)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ return CDCDSerialPort_GetSerialState(pCdcd);\r
+}\r
+\r
+/**\r
+ * Sets the current serial state of the device to the given value.\r
+ * \param serialState New device state.\r
+ */\r
+void CDCDSerial_SetSerialState(uint16_t serialState)\r
+{\r
+ CDCDSerialPort * pCdcd = &cdcdSerial;\r
+ CDCDSerialPort_SetSerialState(pCdcd, serialState);\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\file\r
+ * Title: CDCDSerialDriver implementation\r
+ *\r
+ * About: Purpose\r
+ * Implementation of the CDCDSerialDriver class methods.\r
+ */\r
+\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "CDCDSerialDriver.h"\r
+\r
+#include <USBLib_Trace.h>\r
+#include <USBDDriver.h>\r
+#include <USBD_HAL.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal variables\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Initializes the USB Device CDC serial driver & USBD Driver.\r
+ * \param pDescriptors Pointer to Descriptors list for CDC Serial Device.\r
+ */\r
+void CDCDSerialDriver_Initialize(const USBDDriverDescriptors *pDescriptors)\r
+{\r
+ USBDDriver *pUsbd = USBD_GetDriver();\r
+\r
+ /* Initialize the standard driver */\r
+ USBDDriver_Initialize(pUsbd,\r
+ pDescriptors,\r
+ 0); /* Multiple settings for interfaces not supported */\r
+\r
+ CDCDSerial_Initialize(pUsbd, CDCDSerialDriver_CC_INTERFACE);\r
+\r
+ /* Initialize the USB driver */\r
+ USBD_Init();\r
+}\r
+\r
+/**\r
+ * Invoked whenever the active configuration of device is changed by the\r
+ * host.\r
+ * \param cfgnum Configuration number.\r
+ */\r
+void CDCDSerialDriver_ConfigurationChangedHandler(uint8_t cfgnum)\r
+{\r
+ USBDDriver *pUsbd = USBD_GetDriver();\r
+ USBConfigurationDescriptor *pDesc;\r
+ if (cfgnum) {\r
+ pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum);\r
+ CDCDSerial_ConfigureFunction((USBGenericDescriptor *)pDesc,\r
+ pDesc->wTotalLength);\r
+ }\r
+}\r
+\r
+/**\r
+ * Handles CDC-specific SETUP requests. Should be called from a\r
+ * re-implementation of USBDCallbacks_RequestReceived() method.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ */\r
+void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request)\r
+{\r
+ USBDDriver *pUsbd = USBD_GetDriver();\r
+ TRACE_INFO_WP("NewReq ");\r
+ if (CDCDSerial_RequestHandler(request))\r
+ USBDDriver_RequestHandler(pUsbd, request);\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\file\r
+ * Implementation of the CDCDSerialPort class methods.\r
+ */\r
+\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include <CDCDSerialPort.h>\r
+#include <CDCDescriptors.h>\r
+#include <USBLib_Trace.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Parse data extention for descriptor parsing */\r
+typedef struct _CDCDParseData {\r
+ /** Pointer to CDCDSerialPort instance */\r
+ CDCDSerialPort * pCdcd;\r
+ /** Pointer to found interface descriptor */\r
+ USBInterfaceDescriptor * pIfDesc;\r
+ \r
+} CDCDParseData;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal variables\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Line coding values */\r
+static CDCLineCoding lineCoding;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Internal functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Parse descriptors: Interface, Bulk IN/OUT, Interrupt IN.\r
+ * \param desc Pointer to descriptor list.\r
+ * \param arg Argument, pointer to AUDDParseData instance.\r
+ */\r
+static uint32_t _Interfaces_Parse(USBGenericDescriptor *pDesc,\r
+ CDCDParseData * pArg)\r
+{\r
+ CDCDSerialPort *pCdcd = pArg->pCdcd;\r
+\r
+ /* Not a valid descriptor */\r
+ if (pDesc->bLength == 0)\r
+ return USBRC_PARAM_ERR;\r
+\r
+ /* Find interface descriptor */\r
+ if (pDesc->bDescriptorType == USBGenericDescriptor_INTERFACE) {\r
+ USBInterfaceDescriptor *pIf = (USBInterfaceDescriptor*)pDesc;\r
+\r
+ /* Obtain interface from descriptor */\r
+ if (pCdcd->bInterfaceNdx == 0xFF) {\r
+ /* First interface is communication */\r
+ if (pIf->bInterfaceClass ==\r
+ CDCCommunicationInterfaceDescriptor_CLASS) {\r
+ pCdcd->bInterfaceNdx = pIf->bInterfaceNumber;\r
+ pCdcd->bNumInterface = 2;\r
+ }\r
+ /* Only data interface */\r
+ else if(pIf->bInterfaceClass == CDCDataInterfaceDescriptor_CLASS) {\r
+ pCdcd->bInterfaceNdx = pIf->bInterfaceNumber;\r
+ pCdcd->bNumInterface = 1;\r
+ }\r
+ pArg->pIfDesc = pIf;\r
+ }\r
+ else if (pCdcd->bInterfaceNdx <= pIf->bInterfaceNumber\r
+ && pCdcd->bInterfaceNdx + pCdcd->bNumInterface\r
+ > pIf->bInterfaceNumber) {\r
+ pArg->pIfDesc = pIf;\r
+ }\r
+ }\r
+\r
+ /* Parse valid interfaces */\r
+ if (pArg->pIfDesc == 0)\r
+ return 0;\r
+\r
+ /* Find endpoint descriptors */\r
+ if (pDesc->bDescriptorType == USBGenericDescriptor_ENDPOINT) {\r
+ USBEndpointDescriptor *pEp = (USBEndpointDescriptor*)pDesc;\r
+ switch(pEp->bmAttributes & 0x3) {\r
+ case USBEndpointDescriptor_INTERRUPT:\r
+ if (pEp->bEndpointAddress & 0x80)\r
+ pCdcd->bIntInPIPE = pEp->bEndpointAddress & 0x7F;\r
+ break;\r
+ case USBEndpointDescriptor_BULK:\r
+ if (pEp->bEndpointAddress & 0x80)\r
+ pCdcd->bBulkInPIPE = pEp->bEndpointAddress & 0x7F;\r
+ else\r
+ pCdcd->bBulkOutPIPE = pEp->bEndpointAddress;\r
+ }\r
+ }\r
+\r
+ if ( pCdcd->bInterfaceNdx != 0xFF\r
+ && pCdcd->bBulkInPIPE != 0\r
+ && pCdcd->bBulkOutPIPE != 0)\r
+ return USBRC_FINISHED;\r
+\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Callback function which should be invoked after the data of a\r
+ * SetLineCoding request has been retrieved. Sends a zero-length packet\r
+ * to the host for acknowledging the request.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ */\r
+static void _SetLineCodingCallback(CDCDSerialPort * pCdcd)\r
+{\r
+ uint32_t exec = 1;\r
+ if (pCdcd->fEventHandler) {\r
+ uint32_t rc = pCdcd->fEventHandler(\r
+ CDCDSerialPortEvent_SETLINECODING,\r
+ (uint32_t)(&lineCoding),\r
+ pCdcd->pArg);\r
+ if (rc == USBD_STATUS_SUCCESS) {\r
+ pCdcd->lineCoding.dwDTERate = lineCoding.dwDTERate;\r
+ pCdcd->lineCoding.bCharFormat = lineCoding.bCharFormat;\r
+ pCdcd->lineCoding.bParityType = lineCoding.bParityType;\r
+ pCdcd->lineCoding.bDataBits = lineCoding.bDataBits;\r
+ }\r
+ else\r
+ exec = 0;\r
+ }\r
+ if (exec) USBD_Write(0, 0, 0, 0, 0);\r
+ else USBD_Stall(0);\r
+}\r
+\r
+/**\r
+ * Receives new line coding information from the USB host.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ */\r
+static void _SetLineCoding(CDCDSerialPort * pCdcd)\r
+{\r
+ TRACE_INFO_WP("sLineCoding ");\r
+\r
+ USBD_Read(0,\r
+ (void *) & (lineCoding),\r
+ sizeof(CDCLineCoding),\r
+ (TransferCallback)_SetLineCodingCallback,\r
+ (void*)pCdcd);\r
+}\r
+\r
+/**\r
+ * Sends the current line coding information to the host through Control\r
+ * endpoint 0.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ */\r
+static void _GetLineCoding(CDCDSerialPort * pCdcd)\r
+{\r
+ TRACE_INFO_WP("gLineCoding ");\r
+\r
+ USBD_Write(0,\r
+ (void *) &(pCdcd->lineCoding),\r
+ sizeof(CDCLineCoding),\r
+ 0,\r
+ 0);\r
+}\r
+\r
+/**\r
+ * Changes the state of the serial driver according to the information\r
+ * sent by the host via a SetControlLineState request, and acknowledges\r
+ * the request with a zero-length packet.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ */\r
+static void _SetControlLineState(\r
+ CDCDSerialPort * pCdcd,\r
+ const USBGenericRequest *request)\r
+{\r
+ #if (TRACE_LEVEL >= TRACE_LEVEL_INFO)\r
+ uint8_t DTR, RTS;\r
+\r
+ DTR = ((request->wValue & CDCControlLineState_DTR) > 0);\r
+ RTS = ((request->wValue & CDCControlLineState_RTS) > 0);\r
+ TRACE_INFO_WP("sControlLineState(%d, %d) ", DTR, RTS);\r
+ #endif\r
+\r
+ pCdcd->bControlLineState = (uint8_t)request->wValue;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+\r
+ if (pCdcd->fEventHandler)\r
+ pCdcd->fEventHandler(CDCDSerialPortEvent_SETCONTROLLINESTATE,\r
+
+ (uint32_t)pCdcd->bControlLineState,\r
+ pCdcd->pArg);\r
+}\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Initializes the USB Device CDC serial port function.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param pUsbd Pointer to USBDDriver instance.\r
+ * \param fEventHandler Pointer to event handler function.\r
+ * \param firstInterface First interface index for the function\r
+ * (0xFF to parse from descriptors).\r
+ * \param numInterface Number of interfaces for the function.\r
+ */\r
+void CDCDSerialPort_Initialize(CDCDSerialPort * pCdcd,\r
+ USBDDriver * pUsbd,\r
+ CDCDSerialPortEventHandler fEventHandler,\r
+ void * pArg,\r
+ uint8_t firstInterface,uint8_t numInterface)\r
+{\r
+ TRACE_INFO("CDCDSerialPort_Initialize\n\r");\r
+\r
+ /* Initialize event handler */\r
+ pCdcd->fEventHandler = fEventHandler;\r
+ pCdcd->pArg = pArg;\r
+\r
+ /* Initialize USB Device Driver interface */\r
+ pCdcd->pUsbd = pUsbd;\r
+ pCdcd->bInterfaceNdx = firstInterface;\r
+ pCdcd->bNumInterface = numInterface;\r
+ pCdcd->bIntInPIPE = 0;\r
+ pCdcd->bBulkInPIPE = 0;\r
+ pCdcd->bBulkOutPIPE = 0;\r
+\r
+ /* Initialize Abstract Control Model attributes */\r
+ pCdcd->bControlLineState = 0;\r
+ pCdcd->wSerialState = 0;\r
+ CDCLineCoding_Initialize(&(pCdcd->lineCoding),\r
+ 115200,\r
+ CDCLineCoding_ONESTOPBIT,\r
+ CDCLineCoding_NOPARITY,\r
+ 8);\r
+}\r
+\r
+/**\r
+ * Parse CDC Serial Port information for CDCDSerialPort instance.\r
+ * Accepted interfaces:\r
+ * - Communication Interface + Data Interface\r
+ * - Data Interface ONLY\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param pDescriptors Pointer to descriptor list.\r
+ * \param dwLength Descriptor list size in bytes.\r
+ */\r
+USBGenericDescriptor *CDCDSerialPort_ParseInterfaces(\r
+ CDCDSerialPort *pCdcd,\r
+ USBGenericDescriptor *pDescriptors,\r
+ uint32_t dwLength)\r
+{\r
+ CDCDParseData parseData;\r
+\r
+ parseData.pCdcd = pCdcd;\r
+ parseData.pIfDesc = 0;\r
+\r
+ return USBGenericDescriptor_Parse(\r
+ pDescriptors, dwLength,\r
+ (USBDescriptorParseFunction)_Interfaces_Parse,\r
+ &parseData);\r
+}\r
+\r
+\r
+/**\r
+ * Handles CDC-specific SETUP requests. Should be called from a\r
+ * re-implementation of USBDCallbacks_RequestReceived() method.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param request Pointer to a USBGenericRequest instance.\r
+ * \return USBRC_SUCCESS if request handled, otherwise error.\r
+ */\r
+uint32_t CDCDSerialPort_RequestHandler(\r
+ CDCDSerialPort *pCdcd,\r
+ const USBGenericRequest *request)\r
+{\r
+ if (USBGenericRequest_GetType(request) != USBGenericRequest_CLASS)\r
+ return USBRC_PARAM_ERR;\r
+\r
+ TRACE_INFO_WP("Cdcs ");\r
+\r
+ /* Validate interface */\r
+ if (request->wIndex >= pCdcd->bInterfaceNdx &&\r
+ request->wIndex < pCdcd->bInterfaceNdx + pCdcd->bNumInterface) {\r
+ }\r
+ else {\r
+ return USBRC_PARAM_ERR;\r
+ }\r
+\r
+ /* Handle the request */\r
+ switch (USBGenericRequest_GetRequest(request)) {\r
+\r
+ case CDCGenericRequest_SETLINECODING:\r
+\r
+ _SetLineCoding(pCdcd);\r
+ break;\r
+\r
+ case CDCGenericRequest_GETLINECODING:\r
+\r
+ _GetLineCoding(pCdcd);\r
+ break;\r
+\r
+ case CDCGenericRequest_SETCONTROLLINESTATE:\r
+\r
+ _SetControlLineState(pCdcd, request);\r
+ break;\r
+\r
+ default:\r
+\r
+ return USBRC_PARAM_ERR;\r
+ }\r
+\r
+ return USBRC_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Receives data from the host through the virtual COM port created by\r
+ * the CDC device serial driver. This function behaves like USBD_Read.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param pData Pointer to the data buffer to put received data.\r
+ * \param dwSize Size of the data buffer in bytes.\r
+ * \param fCallback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param pArg Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint32_t CDCDSerialPort_Read(const CDCDSerialPort * pCdcd,\r
+ void * pData,uint32_t dwSize,\r
+ TransferCallback fCallback,void * pArg)\r
+{\r
+ if (pCdcd->bBulkOutPIPE == 0)\r
+ return USBRC_PARAM_ERR;\r
+\r
+ return USBD_Read(pCdcd->bBulkOutPIPE,\r
+ pData, dwSize,\r
+ fCallback, pArg);\r
+}\r
+\r
+/**\r
+ * Sends a data buffer through the virtual COM port created by the CDC\r
+ * device serial driver. This function behaves exactly like USBD_Write.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param pData Pointer to the data buffer to send.\r
+ * \param dwSize Size of the data buffer in bytes.\r
+ * \param fCallback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param pArg Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint32_t CDCDSerialPort_Write(const CDCDSerialPort * pCdcd,\r
+ void * pData, uint32_t dwSize,\r
+ TransferCallback fCallback, void * pArg)\r
+{\r
+ if (pCdcd->bBulkInPIPE == 0)\r
+ return USBRC_PARAM_ERR;\r
+\r
+ return USBD_Write(pCdcd->bBulkInPIPE,\r
+ pData, dwSize,\r
+ fCallback, pArg);\r
+}\r
+\r
+/**\r
+ * Returns the current control line state of the RS-232 line.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ */\r
+uint8_t CDCDSerialPort_GetControlLineState(const CDCDSerialPort * pCdcd)\r
+{\r
+ return pCdcd->bControlLineState;\r
+}\r
+\r
+/**\r
+ * Copy current line coding settings to pointered space.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param pLineCoding Pointer to CDCLineCoding instance.\r
+ */\r
+void CDCDSerialPort_GetLineCoding(const CDCDSerialPort * pCdcd,\r
+ CDCLineCoding* pLineCoding)\r
+{\r
+ if (pLineCoding) {\r
+ pLineCoding->dwDTERate = pCdcd->lineCoding.dwDTERate;\r
+ pLineCoding->bCharFormat = pCdcd->lineCoding.bCharFormat;\r
+ pLineCoding->bParityType = pCdcd->lineCoding.bParityType;\r
+ pLineCoding->bDataBits = pCdcd->lineCoding.bDataBits;\r
+ }\r
+}\r
+\r
+/**\r
+ * Returns the current status of the RS-232 line.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ */\r
+uint16_t CDCDSerialPort_GetSerialState(const CDCDSerialPort * pCdcd)\r
+{\r
+ return pCdcd->wSerialState;\r
+}\r
+\r
+/**\r
+ * Sets the current serial state of the device to the given value.\r
+ * \param pCdcd Pointer to CDCDSerialPort instance.\r
+ * \param wSerialState New device state.\r
+ */\r
+void CDCDSerialPort_SetSerialState(CDCDSerialPort * pCdcd,\r
+ uint16_t wSerialState)\r
+{\r
+ if (pCdcd->bIntInPIPE == 0)\r
+ return;\r
+\r
+ /* If new state is different from previous one, send a notification to the\r
+ host */\r
+ if (pCdcd->wSerialState != wSerialState) {\r
+\r
+ pCdcd->wSerialState = wSerialState;\r
+ USBD_Write(pCdcd->bIntInPIPE,\r
+ &(pCdcd->wSerialState),\r
+ 2,\r
+ 0,\r
+ 0);\r
+\r
+ /* Reset one-time flags */\r
+ pCdcd->wSerialState &= ~(CDCSerialState_OVERRUN\r
+ | CDCSerialState_PARITY\r
+ | CDCSerialState_FRAMING\r
+ | CDCSerialState_RINGSIGNAL\r
+ | CDCSerialState_BREAK);\r
+ }\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99\r
+ by working group ISO/IEC JTC1/SC22/WG14. */\r
+#include <stdint.h>\r
+\r
+#include "CDCDSerial.h"\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Default callback functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Invoked when the CDC LineCoding is requested to changed\r
+ * \param port Port number.\r
+ * \param pLineCoding Pointer to new LineCoding settings.\r
+ * \return USBRC_SUCCESS if ready to receive the line coding.\r
+ */\r
+extern WEAK uint8_t CDCDSerial_LineCodingIsToChange(\r
+ CDCLineCoding * pLineCoding)\r
+{\r
+ /* Accept any of linecoding settings */\r
+ pLineCoding = pLineCoding;\r
+ return USBRC_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Invoked when the CDC ControlLineState is changed\r
+ * \param port Port number.\r
+ * \param DTR New DTR value.\r
+ * \param RTS New RTS value.\r
+ */\r
+extern WEAK void CDCDSerial_ControlLineStateChanged(uint8_t DTR,\r
+ uint8_t RTS)\r
+{\r
+ /* Do nothing */\r
+ DTR = DTR; RTS = RTS;\r
+}\r
+\r
--- /dev/null
+; $Id: 6119.inf,v 1.1.2.1 2006/12/05 08:33:25 danielru Exp $\r
+\r
+[Version] ; Version section\r
+Signature="$Chicago$" ; All Windows versions\r
+Class=Ports ; This is a serial port driver\r
+ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} ; Associated GUID\r
+Provider=%ATMEL% ; Driver is provided by ATMEL\r
+DriverVer=09/12/2006,1.1.1.5 ; Driver version 1.1.1.5 published on 23 February 2007\r
+\r
+[DestinationDirs] ; DestinationDirs section\r
+DefaultDestDir=12 ; Default install directory is \drivers or \IOSubSys\r
+\r
+[Manufacturer] ; Manufacturer section\r
+%ATMEL%=AtmelMfg ; Only one manufacturer (ATMEL), models section is named\r
+ ; AtmelMfg\r
+\r
+[AtmelMfg] ; Models section corresponding to ATMEL\r
+%USBtoSerialConverter%=USBtoSer.Install,USB\VID_03EB&PID_6119 ; Identifies a device with ATMEL Vendor ID (03EBh) and\r
+ ; Product ID equal to 6119h. Corresponding Install section\r
+ ; is named USBtoSer.Install\r
+\r
+[USBtoSer.Install] ; Install section\r
+include=mdmcpq.inf\r
+CopyFiles=FakeModemCopyFileSection\r
+AddReg=USBtoSer.AddReg ; Registry keys to add are listed in USBtoSer.AddReg\r
+\r
+[USBtoSer.AddReg] ; AddReg section\r
+HKR,,DevLoader,,*ntkern ;\r
+HKR,,NTMPDriver,,usbser.sys\r
+HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"\r
+\r
+[USBtoSer.Install.Services] ; Services section\r
+AddService=usbser,0x00000002,USBtoSer.AddService ; Assign usbser as the PnP driver for the device\r
+\r
+[USBtoSer.AddService] ; Service install section\r
+DisplayName=%USBSer% ; Name of the serial driver\r
+ServiceType=1 ; Service kernel driver\r
+StartType=3 ; Driver is started by the PnP manager\r
+ErrorControl=1 ; Warn about errors\r
+ServiceBinary=%12%\usbser.sys ; Driver filename\r
+\r
+[Strings] ; Strings section\r
+ATMEL="ATMEL Corp." ; String value for the ATMEL symbol\r
+USBtoSerialConverter="AT91 USB to Serial Converter" ; String value for the USBtoSerialConverter symbol\r
+USBSer="USB Serial Driver" ; String value for the USBSer symbol
\ No newline at end of file
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Implementation of USB device functions on a UDP controller.\r
+ *\r
+ * See \ref usbd_api "USBD API Methods".\r
+ */\r
+\r
+/** \addtogroup usbd_interface\r
+ *@{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include "USBD.h"\r
+#include "USBD_HAL.h"\r
+\r
+#include <USBLib_Trace.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal variables\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Device current state. */\r
+static uint8_t deviceState;\r
+/** Indicates the previous device state */\r
+static uint8_t previousDeviceState;\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal Functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * USBD: Event handlers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Handle the USB suspend event, should be invoked whenever\r
+ * HW reports a suspend signal.\r
+ */\r
+void USBD_SuspendHandler(void)\r
+{\r
+ /* Don't do anything if the device is already suspended */\r
+ if (deviceState != USBD_STATE_SUSPENDED) {\r
+\r
+ /* Switch to the Suspended state */\r
+ previousDeviceState = deviceState;\r
+ deviceState = USBD_STATE_SUSPENDED;\r
+\r
+ /* Suspend HW interface */\r
+ USBD_HAL_Suspend();\r
+\r
+ /* Invoke the User Suspended callback (Suspend System?) */\r
+ if (NULL != USBDCallbacks_Suspended)\r
+ USBDCallbacks_Suspended();\r
+ }\r
+}\r
+\r
+/**\r
+ * Handle the USB resume event, should be invoked whenever\r
+ * HW reports a resume signal.\r
+ */\r
+void USBD_ResumeHandler(void)\r
+{\r
+ /* Don't do anything if the device was not suspended */\r
+ if (deviceState == USBD_STATE_SUSPENDED) {\r
+ /* Active the device */\r
+ USBD_HAL_Activate();\r
+ deviceState = previousDeviceState;\r
+ if (deviceState >= USBD_STATE_DEFAULT) {\r
+ /* Invoke the Resume callback */\r
+ if (NULL != USBDCallbacks_Resumed)\r
+ USBDCallbacks_Resumed();\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * Handle the USB reset event, should be invoked whenever\r
+ * HW found USB reset signal on bus, which usually is called\r
+ * "end of bus reset" status.\r
+ */\r
+void USBD_ResetHandler()\r
+{\r
+ /* The device enters the Default state */\r
+ deviceState = USBD_STATE_DEFAULT;\r
+ /* Active the USB HW */\r
+ USBD_HAL_Activate();\r
+ /* Only EP0 enabled */\r
+ USBD_HAL_ResetEPs(0xFFFFFFFF, USBD_STATUS_RESET, 0);\r
+ USBD_ConfigureEndpoint(0);\r
+ /* Invoke the Reset callback */\r
+ if (NULL != USBDCallbacks_Reset)\r
+ USBDCallbacks_Reset();\r
+}\r
+\r
+/**\r
+ * Handle the USB setup package received, should be invoked\r
+ * when an endpoint got a setup package as request.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pRequest Pointer to content of request.\r
+ */\r
+void USBD_RequestHandler(uint8_t bEndpoint,\r
+ const USBGenericRequest* pRequest)\r
+{\r
+ if (bEndpoint != 0) {\r
+ TRACE_WARNING("EP%d request not supported, default EP only",\r
+ bEndpoint);\r
+ }\r
+ else if (NULL != USBDCallbacks_RequestReceived) {\r
+ USBDCallbacks_RequestReceived(pRequest);\r
+ }\r
+}\r
+\r
+/*---------------------------------------------------------------------------\r
+ * USBD: Library interface\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Configures an endpoint according to its Endpoint Descriptor.\r
+ * \param pDescriptor Pointer to an Endpoint descriptor.\r
+ */\r
+void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor)\r
+{\r
+ USBD_HAL_ConfigureEP(pDescriptor);\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \param fCallback Optional callback function to invoke when the transfer is\r
+ * complete.\r
+ * \param pArgument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+uint8_t USBD_Write( uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength,\r
+ TransferCallback fCallback,\r
+ void *pArgument )\r
+{\r
+ USBD_HAL_SetTransferCallback(bEndpoint, fCallback, pArgument);\r
+ return USBD_HAL_Write(bEndpoint, pData, dLength);\r
+}\r
+#if 0\r
+/**\r
+ * Sends data frames through a USB endpoint. Sets up the transfer descriptor\r
+ * list, writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the frame is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the frame is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pMbl Pointer to a frame (USBDTransferBuffer) list that describes\r
+ * the buffer list to send.\r
+ * \param wListSize Size of the frame list.\r
+ * \param bCircList Circle the list.\r
+ * \param wStartNdx For circled list only, the first buffer index to transfer.\r
+ * \param fCallback Optional callback function to invoke when the transfer is\r
+ * complete.\r
+ * \param pArgument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ * \see USBDTransferBuffer, MblTransferCallback, USBD_MblReuse\r
+ */\r
+uint8_t USBD_MblWrite( uint8_t bEndpoint,\r
+ void *pMbl,\r
+ uint16_t wListSize,\r
+ uint8_t bCircList,\r
+ uint16_t wStartNdx,\r
+ MblTransferCallback fCallback,\r
+ void *pArgument )\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pTransfer = (MblTransfer*)&(pEndpoint->transfer);\r
+ uint16_t i;\r
+\r
+ /* EP0 is not suitable for Mbl */\r
+\r
+ if (bEndpoint == 0) {\r
+\r
+ return USBD_STATUS_INVALID_PARAMETER;\r
+ }\r
+\r
+ /* Check that the endpoint is in Idle state */\r
+\r
+ if (pEndpoint->state != UDP_ENDPOINT_IDLE) {\r
+\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ pEndpoint->state = UDP_ENDPOINT_SENDINGM;\r
+\r
+ TRACE_DEBUG_WP("WriteM%d(0x%x,%d) ", bEndpoint, pMbl, wListSize);\r
+\r
+ /* Start from first if not circled list */\r
+\r
+ if (!bCircList) wStartNdx = 0;\r
+\r
+ /* Setup the transfer descriptor */\r
+\r
+ pTransfer->pMbl = (USBDTransferBuffer*)pMbl;\r
+ pTransfer->listSize = wListSize;\r
+ pTransfer->fCallback = fCallback;\r
+ pTransfer->pArgument = pArgument;\r
+ pTransfer->currBuffer = wStartNdx;\r
+ pTransfer->freedBuffer = 0;\r
+ pTransfer->pLastLoaded = &(((USBDTransferBuffer*)pMbl)[wStartNdx]);\r
+ pTransfer->circList = bCircList;\r
+ pTransfer->allUsed = 0;\r
+\r
+ /* Clear all buffer */\r
+\r
+ for (i = 0; i < wListSize; i ++) {\r
+\r
+ pTransfer->pMbl[i].transferred = 0;\r
+ pTransfer->pMbl[i].buffered = 0;\r
+ pTransfer->pMbl[i].remaining = pTransfer->pMbl[i].size;\r
+ }\r
+\r
+ /* Send the first packet */\r
+\r
+ while((UDP->UDP_CSR[bEndpoint]&UDP_CSR_TXPKTRDY)==UDP_CSR_TXPKTRDY);\r
+ UDP_MblWriteFifo(bEndpoint);\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+\r
+ /* If double buffering is enabled and there is data remaining, */\r
+\r
+ /* prepare another packet */\r
+\r
+ if ((CHIP_USB_ENDPOINTS_BANKS(bEndpoint) > 1)\r
+ && (pTransfer->pMbl[pTransfer->currBuffer].remaining > 0)) {\r
+\r
+ UDP_MblWriteFifo(bEndpoint);\r
+ }\r
+\r
+ /* Enable interrupt on endpoint */\r
+\r
+ UDP->UDP_IER = 1 << bEndpoint;\r
+\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+#endif\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \param fCallback Optional end-of-transfer callback function.\r
+ * \param pArgument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint8_t USBD_Read(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength,\r
+ TransferCallback fCallback,\r
+ void *pArgument)\r
+{\r
+ USBD_HAL_SetTransferCallback(bEndpoint, fCallback, pArgument);\r
+ return USBD_HAL_Read(bEndpoint, pData, dLength);\r
+}\r
+#if 0\r
+/**\r
+ * Reuse first used/released buffer with new buffer address and size to be used\r
+ * in transfer again. Only valid when frame list is ringed. Can be used for\r
+ * both read & write.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pNewBuffer Pointer to new buffer with data to send (0 to keep last).\r
+ * \param wNewSize Size of the data buffer\r
+ */\r
+uint8_t USBD_MblReuse( uint8_t bEndpoint,\r
+ uint8_t *pNewBuffer,\r
+ uint16_t wNewSize )\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pTransfer = (MblTransfer*)&(pEndpoint->transfer);\r
+ USBDTransferBuffer *pBi = &(pTransfer->pMbl[pTransfer->freedBuffer]);\r
+\r
+ TRACE_DEBUG_WP("MblReuse(%d), st%x, circ%d\n\r",\r
+ bEndpoint, pEndpoint->state, pTransfer->circList);\r
+\r
+ /* Only for Multi-buffer-circle list */\r
+\r
+ if (bEndpoint != 0\r
+ && (pEndpoint->state == UDP_ENDPOINT_RECEIVINGM\r
+ || pEndpoint->state == UDP_ENDPOINT_SENDINGM)\r
+ && pTransfer->circList) {\r
+ }\r
+ else {\r
+\r
+ return USBD_STATUS_WRONG_STATE;\r
+ }\r
+\r
+ /* Check if there is freed buffer */\r
+\r
+ if (pTransfer->freedBuffer == pTransfer->currBuffer\r
+ && !pTransfer->allUsed) {\r
+\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+\r
+ /* Update transfer information */\r
+\r
+ if ((++ pTransfer->freedBuffer) == pTransfer->listSize)\r
+ pTransfer->freedBuffer = 0;\r
+ if (pNewBuffer) {\r
+ pBi->pBuffer = pNewBuffer;\r
+ pBi->size = wNewSize;\r
+ }\r
+ pBi->buffered = 0;\r
+ pBi->transferred = 0;\r
+ pBi->remaining = pBi->size;\r
+\r
+ /* At least one buffer is not processed */\r
+\r
+ pTransfer->allUsed = 0;\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+#endif\r
+/**\r
+ * Sets the HALT feature on the given endpoint (if not already in this state).\r
+ * \param bEndpoint Endpoint number.\r
+ */\r
+void USBD_Halt(uint8_t bEndpoint)\r
+{\r
+ USBD_HAL_Halt(bEndpoint, 1);\r
+}\r
+\r
+/**\r
+ * Clears the Halt feature on the given endpoint.\r
+ * \param bEndpoint Index of endpoint\r
+ */\r
+void USBD_Unhalt(uint8_t bEndpoint)\r
+{\r
+ USBD_HAL_Halt(bEndpoint, 0);\r
+}\r
+\r
+/**\r
+ * Returns the current Halt status of an endpoint.\r
+ * \param bEndpoint Index of endpoint\r
+ * \return 1 if the endpoint is currently halted; otherwise 0\r
+ */\r
+uint8_t USBD_IsHalted(uint8_t bEndpoint)\r
+{\r
+ return USBD_HAL_Halt(bEndpoint, 0xFF);\r
+}\r
+\r
+/**\r
+ * Indicates if the device is running in high or full-speed. Always returns 0\r
+ * since UDP does not support high-speed mode.\r
+ */\r
+uint8_t USBD_IsHighSpeed(void)\r
+{\r
+ return USBD_HAL_IsHighSpeed();\r
+}\r
+\r
+/**\r
+ * Causes the given endpoint to acknowledge the next packet it receives\r
+ * with a STALL handshake.\r
+ * \param bEndpoint Endpoint number.\r
+ * \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED.\r
+ */\r
+uint8_t USBD_Stall(uint8_t bEndpoint)\r
+\r
+{\r
+ return USBD_HAL_Stall(bEndpoint);\r
+}\r
+\r
+/**\r
+ * Sets the device address to the given value.\r
+ * \param address New device address.\r
+ */\r
+void USBD_SetAddress(uint8_t address)\r
+{\r
+ TRACE_INFO_WP("SetAddr(%d) ", address);\r
+\r
+ USBD_HAL_SetAddress(address);\r
+ if (address == 0) deviceState = USBD_STATE_DEFAULT;\r
+ else deviceState = USBD_STATE_ADDRESS;\r
+}\r
+\r
+/**\r
+ * Sets the current device configuration.\r
+ * \param cfgnum - Configuration number to set.\r
+ */\r
+void USBD_SetConfiguration(uint8_t cfgnum)\r
+{\r
+ TRACE_INFO_WP("SetCfg(%d) ", cfgnum);\r
+\r
+ USBD_HAL_SetConfiguration(cfgnum);\r
+\r
+ if (cfgnum != 0) {\r
+ deviceState = USBD_STATE_CONFIGURED;\r
+ }\r
+ else {\r
+ deviceState = USBD_STATE_ADDRESS;\r
+ /* Reset all endpoints but Control 0 */\r
+ USBD_HAL_ResetEPs(0xFFFFFFFE, USBD_STATUS_RESET, 0);\r
+ }\r
+}\r
+\r
+/*---------------------------------------------------------------------------\r
+ * USBD: Library API\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Starts a remote wake-up procedure.\r
+ */\r
+void USBD_RemoteWakeUp(void)\r
+{\r
+ /* Device is NOT suspended */\r
+ if (deviceState != USBD_STATE_SUSPENDED) {\r
+\r
+ TRACE_INFO("USBD_RemoteWakeUp: Device is not suspended\n\r");\r
+ return;\r
+ }\r
+ USBD_HAL_Activate();\r
+ USBD_HAL_RemoteWakeUp();\r
+}\r
+\r
+/**\r
+ * Connects the pull-up on the D+ line of the USB.\r
+ */\r
+void USBD_Connect(void)\r
+{\r
+ USBD_HAL_Connect();\r
+}\r
+\r
+/**\r
+ * Disconnects the pull-up from the D+ line of the USB.\r
+ */\r
+void USBD_Disconnect(void)\r
+{\r
+ USBD_HAL_Disconnect();\r
+\r
+ /* Device returns to the Powered state */\r
+\r
+ if (deviceState > USBD_STATE_POWERED) {\r
+\r
+ deviceState = USBD_STATE_POWERED;\r
+ }\r
+\r
+ if (previousDeviceState > USBD_STATE_POWERED) {\r
+\r
+ previousDeviceState = USBD_STATE_POWERED;\r
+ }\r
+}\r
+\r
+/**\r
+ * Initializes the USB driver.\r
+ */\r
+void USBD_Init(void)\r
+{\r
+ TRACE_INFO_WP("USBD_Init\n\r");\r
+\r
+ /* HW Layer Initialize */\r
+ USBD_HAL_Init();\r
+\r
+ /* Device is in the Attached state */\r
+ deviceState = USBD_STATE_SUSPENDED;\r
+ previousDeviceState = USBD_STATE_POWERED;\r
+\r
+ /* Upper Layer Initialize */\r
+ if (NULL != USBDCallbacks_Initialized)\r
+ USBDCallbacks_Initialized();\r
+}\r
+\r
+/**\r
+ * Returns the current state of the USB device.\r
+ * \return Device current state.\r
+ */\r
+uint8_t USBD_GetState(void)\r
+{\r
+ return deviceState;\r
+}\r
+\r
+/**\r
+ * Certification test for High Speed device.\r
+ * \param bIndex Test to be done\r
+ */\r
+void USBD_Test(uint8_t bIndex)\r
+{\r
+ USBD_HAL_Test(bIndex);\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * Definitions of callbacks used by the USBD API to notify the user\r
+ * application of incoming events. These functions are declared as 'weak',\r
+ * so they can be re-implemented elsewhere in the application in a\r
+ * transparent way.\r
+ *\r
+ * \addtogroup usbd_interface \r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "USBD.h"\r
+#include "USBDDriver.h"\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported function\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Invoked after the USB driver has been initialized. By default, do nothing.\r
+ */\r
+WEAK void USBDCallbacks_Initialized(void)\r
+{\r
+ /* Does nothing */\r
+}\r
+\r
+/**\r
+ * Invoked when the USB driver is reset. Does nothing by default.\r
+ */\r
+WEAK void USBDCallbacks_Reset(void)\r
+{\r
+ /* Does nothing*/\r
+}\r
+\r
+/**\r
+ * Invoked when the USB device gets suspended. By default, do nothing.\r
+ */\r
+WEAK void USBDCallbacks_Suspended(void) {}\r
+\r
+/**\r
+ * Invoked when the USB device leaves the Suspended state. By default,\r
+ * Do nothing.\r
+ */\r
+WEAK void USBDCallbacks_Resumed(void) {}\r
+\r
+/**\r
+ * USBDCallbacks_RequestReceived - Invoked when a new SETUP request is\r
+ * received. Does nothing by default.\r
+ * \param request Pointer to the request to handle.\r
+ */\r
+WEAK void USBDCallbacks_RequestReceived(const USBGenericRequest *request)\r
+{\r
+ /* Does basic enumeration */\r
+ USBDDriver_RequestHandler(USBD_GetDriver(), request);\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \addtogroup usbd_interface\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include <USBLib_Trace.h>\r
+\r
+#include "USBDDriver.h"\r
+#include "USBD.h"\r
+#include "USBD_HAL.h"\r
+\r
+#include <string.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Local variables\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Default device driver instance, for all class drivers in USB Lib. */\r
+static USBDDriver usbdDriver;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Local functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Send a NULL packet\r
+ */\r
+static void TerminateCtrlInWithNull(void *pArg,\r
+ uint8_t status,\r
+ uint32_t transferred,\r
+ uint32_t remaining)\r
+{\r
+ pArg = pArg; status = status;\r
+ transferred = transferred; remaining = remaining;\r
+ USBD_Write(0, /* Endpoint #0 */\r
+ 0, /* No data buffer */\r
+ 0, /* No data buffer */\r
+ (TransferCallback) 0,\r
+ (void *) 0);\r
+}\r
+\r
+/**\r
+ * Configures the device by setting it into the Configured state and\r
+ * initializing all endpoints.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param cfgnum Configuration number to set.\r
+ */\r
+static void SetConfiguration(USBDDriver *pDriver, uint8_t cfgnum)\r
+{\r
+ USBEndpointDescriptor *pEndpoints[17];\r
+ const USBConfigurationDescriptor *pConfiguration;\r
+\r
+ /* Use different descriptor depending on device speed */\r
+ if ( USBD_HAL_IsHighSpeed()\r
+ && pDriver->pDescriptors->pHsConfiguration) {\r
+\r
+ pConfiguration = pDriver->pDescriptors->pHsConfiguration;\r
+ }\r
+ else {\r
+\r
+ pConfiguration = pDriver->pDescriptors->pFsConfiguration;\r
+ }\r
+\r
+ /* Set & save the desired configuration */\r
+ USBD_SetConfiguration(cfgnum);\r
+\r
+ pDriver->cfgnum = cfgnum;\r
+ pDriver->isRemoteWakeUpEnabled =\r
+ ((pConfiguration->bmAttributes & 0x20) > 0);\r
+\r
+ /* If the configuration is not 0, configure endpoints */\r
+ if (cfgnum != 0) {\r
+\r
+ /* Parse configuration to get endpoint descriptors */\r
+ USBConfigurationDescriptor_Parse(pConfiguration, 0, pEndpoints, 0);\r
+\r
+ /* Configure endpoints */\r
+ int i = 0;\r
+ while (pEndpoints[i] != 0) {\r
+\r
+ USBD_ConfigureEndpoint(pEndpoints[i]);\r
+ i++;\r
+ }\r
+ }\r
+ /* Should be done before send the ZLP */\r
+ if (NULL != USBDDriverCallbacks_ConfigurationChanged)\r
+ USBDDriverCallbacks_ConfigurationChanged(cfgnum);\r
+\r
+ /* Acknowledge the request */\r
+ USBD_Write(0, /* Endpoint #0 */\r
+ 0, /* No data buffer */\r
+ 0, /* No data buffer */\r
+ (TransferCallback) 0,\r
+ (void *) 0);\r
+}\r
+\r
+/**\r
+ * Sends the current configuration number to the host.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ */\r
+static void GetConfiguration(const USBDDriver *pDriver)\r
+{\r
+ unsigned long tmp; // Coud be unsigned char : unsigned long has been chose to avoid any potential alignment issue with DMA \r
+ \r
+ if( USBD_GetState() < USBD_STATE_CONFIGURED) \r
+ tmp = 0; // If device is unconfigured, returned configuration must be 0 \r
+ else \r
+ tmp = pDriver->cfgnum; \r
+\r
+ USBD_Write(0, &tmp, 1, 0, 0); \r
+}\r
+\r
+/**\r
+ * Sends the current status of the device to the host.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ */\r
+static void GetDeviceStatus(const USBDDriver *pDriver)\r
+{\r
+ static unsigned short data;\r
+ const USBConfigurationDescriptor *pConfiguration;\r
+\r
+ data = 0;\r
+ /* Use different configuration depending on device speed */\r
+\r
+ if (USBD_IsHighSpeed()) {\r
+\r
+ pConfiguration = pDriver->pDescriptors->pHsConfiguration;\r
+ }\r
+ else {\r
+\r
+ pConfiguration = pDriver->pDescriptors->pFsConfiguration;\r
+ }\r
+\r
+ /* Check current configuration for power mode (if device is configured) */\r
+\r
+ if (pDriver->cfgnum != 0) {\r
+\r
+ if (USBConfigurationDescriptor_IsSelfPowered(pConfiguration)) {\r
+\r
+ data |= 1;\r
+ }\r
+ }\r
+\r
+ /* Check if remote wake-up is enabled */\r
+\r
+ if (pDriver->isRemoteWakeUpEnabled) {\r
+\r
+ data |= 2;\r
+ }\r
+\r
+ /* Send the device status */\r
+\r
+ USBD_Write(0, &data, 2, 0, 0);\r
+}\r
+\r
+/**\r
+ * Sends the current status of an endpoints to the USB host.\r
+ * \param bEndpoint Endpoint number.\r
+ */\r
+static void GetEndpointStatus(uint8_t bEndpoint)\r
+{\r
+ static unsigned short data;\r
+\r
+ data = 0;\r
+\r
+ switch (USBD_HAL_Halt(bEndpoint, 0xFF)) {\r
+\r
+ case USBD_STATUS_INVALID_PARAMETER: /* the endpoint not exists */\r
+ USBD_Stall(0);\r
+ break;\r
+\r
+ case 1:\r
+ data = 1;\r
+ case 0:\r
+ /* Send the endpoint status */\r
+ USBD_Write(0, &data, 2, 0, 0);\r
+ break;\r
+ }\r
+}\r
+\r
+/**\r
+ * Sends the requested USB descriptor to the host if available, or STALLs the\r
+ * request.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param type Type of the requested descriptor\r
+ * \param index Index of the requested descriptor.\r
+ * \param length Maximum number of bytes to return.\r
+ */\r
+static void GetDescriptor(\r
+ const USBDDriver *pDriver,\r
+ uint8_t type,\r
+ uint8_t indexRDesc,\r
+ uint32_t length)\r
+{\r
+ const USBDeviceDescriptor *pDevice;\r
+ const USBConfigurationDescriptor *pConfiguration;\r
+ const USBDeviceQualifierDescriptor *pQualifier;\r
+ const USBConfigurationDescriptor *pOtherSpeed;\r
+ const USBGenericDescriptor **pStrings =\r
+ (const USBGenericDescriptor **) pDriver->pDescriptors->pStrings;\r
+ const USBGenericDescriptor *pString;\r
+ uint8_t numStrings = pDriver->pDescriptors->numStrings;\r
+ uint8_t terminateWithNull = 0;\r
+\r
+ /* Use different set of descriptors depending on device speed */\r
+\r
+ /* By default, we uses full speed values */\r
+ pDevice = pDriver->pDescriptors->pFsDevice;\r
+ pConfiguration = pDriver->pDescriptors->pFsConfiguration;\r
+\r
+ /* HS, we try HS values */\r
+ if (USBD_HAL_IsHighSpeed()) {\r
+\r
+ TRACE_DEBUG_WP("HS ");\r
+ if (pDriver->pDescriptors->pHsDevice)\r
+ pDevice = pDriver->pDescriptors->pHsDevice;\r
+ if (pDriver->pDescriptors->pHsConfiguration)\r
+ pConfiguration = pDriver->pDescriptors->pHsConfiguration;\r
+ pQualifier = pDriver->pDescriptors->pHsQualifier;\r
+ pOtherSpeed = pDriver->pDescriptors->pHsOtherSpeed;\r
+ }\r
+ else {\r
+\r
+ TRACE_DEBUG_WP("FS ");\r
+ pQualifier = pDriver->pDescriptors->pFsQualifier;\r
+ pOtherSpeed = pDriver->pDescriptors->pFsOtherSpeed;\r
+ }\r
+\r
+ /* Check the descriptor type */\r
+\r
+ switch (type) {\r
+\r
+ case USBGenericDescriptor_DEVICE:\r
+ TRACE_INFO_WP("Dev ");\r
+\r
+ /* Adjust length and send descriptor */\r
+\r
+ if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice)) {\r
+\r
+ length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice);\r
+ }\r
+ USBD_Write(0, pDevice, length, 0, 0);\r
+ break;\r
+\r
+ case USBGenericDescriptor_CONFIGURATION:\r
+ TRACE_INFO_WP("Cfg ");\r
+\r
+ /* Adjust length and send descriptor */\r
+\r
+ if (length > USBConfigurationDescriptor_GetTotalLength(pConfiguration)) {\r
+\r
+ length = USBConfigurationDescriptor_GetTotalLength(pConfiguration);\r
+ terminateWithNull = ((length % pDevice->bMaxPacketSize0) == 0);\r
+ }\r
+ USBD_Write(0,\r
+ pConfiguration,\r
+ length,\r
+ terminateWithNull ? TerminateCtrlInWithNull : 0,\r
+ 0);\r
+ break;\r
+\r
+ case USBGenericDescriptor_DEVICEQUALIFIER:\r
+ TRACE_INFO_WP("Qua ");\r
+\r
+ /* Check if descriptor exists */\r
+\r
+ if (!pQualifier) {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ else {\r
+\r
+ /* Adjust length and send descriptor */\r
+\r
+ if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier)) {\r
+\r
+ length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier);\r
+ }\r
+ USBD_Write(0, pQualifier, length, 0, 0);\r
+ }\r
+ break;\r
+\r
+ case USBGenericDescriptor_OTHERSPEEDCONFIGURATION:\r
+ TRACE_INFO_WP("OSC ");\r
+\r
+ /* Check if descriptor exists */\r
+\r
+ if (!pOtherSpeed) {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ else {\r
+\r
+ /* Adjust length and send descriptor */\r
+\r
+ if (length > USBConfigurationDescriptor_GetTotalLength(pOtherSpeed)) {\r
+\r
+ length = USBConfigurationDescriptor_GetTotalLength(pOtherSpeed);\r
+ terminateWithNull = ((length % pDevice->bMaxPacketSize0) == 0);\r
+ }\r
+ USBD_Write(0,\r
+ pOtherSpeed,\r
+ length,\r
+ terminateWithNull ? TerminateCtrlInWithNull : 0,\r
+ 0);\r
+ }\r
+ break;\r
+\r
+ case USBGenericDescriptor_STRING:\r
+ TRACE_INFO_WP("Str%d ", indexRDesc);\r
+\r
+ /* Check if descriptor exists */\r
+\r
+ if (indexRDesc >= numStrings) {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ else {\r
+\r
+ pString = pStrings[indexRDesc];\r
+\r
+ /* Adjust length and send descriptor */\r
+\r
+ if (length > USBGenericDescriptor_GetLength(pString)) {\r
+\r
+ length = USBGenericDescriptor_GetLength(pString);\r
+ terminateWithNull = ((length % pDevice->bMaxPacketSize0) == 0);\r
+ }\r
+ USBD_Write(0,\r
+ pString,\r
+ length,\r
+ terminateWithNull ? TerminateCtrlInWithNull : 0,\r
+ 0);\r
+ }\r
+ break;\r
+\r
+ default:\r
+ TRACE_WARNING(\r
+ "USBDDriver_GetDescriptor: Unknown descriptor type (%d)\n\r",\r
+ type);\r
+ USBD_Stall(0);\r
+ }\r
+}\r
+\r
+/**\r
+ * Sets the active setting of the given interface if the configuration supports\r
+ * it; otherwise, the control pipe is STALLed. If the setting of an interface\r
+ * changes.\r
+ * \parma pDriver Pointer to a USBDDriver instance.\r
+ * \parma infnum Interface number.\r
+ * \parma setting New active setting for the interface.\r
+ */\r
+static void SetInterface(\r
+ USBDDriver *pDriver,\r
+ uint8_t infnum,\r
+ uint8_t setting)\r
+{\r
+ /* Make sure alternate settings are supported */\r
+\r
+ if (!pDriver->pInterfaces) {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ else {\r
+\r
+ /* Change the current setting of the interface and trigger the callback */\r
+ /* if necessary */\r
+ if (pDriver->pInterfaces[infnum] != setting) {\r
+\r
+ pDriver->pInterfaces[infnum] = setting;\r
+ if (NULL != USBDDriverCallbacks_InterfaceSettingChanged)\r
+ USBDDriverCallbacks_InterfaceSettingChanged(infnum, setting);\r
+ }\r
+\r
+ /* Acknowledge the request */\r
+\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ }\r
+}\r
+\r
+/**\r
+ * Sends the currently active setting of the given interface to the USB\r
+ * host. If alternate settings are not supported, this function STALLs the\r
+ * control pipe.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param infnum Interface number.\r
+ */\r
+static void GetInterface(\r
+ const USBDDriver *pDriver,\r
+ uint8_t infnum)\r
+{\r
+ /* Make sure alternate settings are supported, or STALL the control pipe */\r
+\r
+ if (!pDriver->pInterfaces) {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ else {\r
+\r
+ /* Sends the current interface setting to the host */\r
+\r
+ USBD_Write(0, &(pDriver->pInterfaces[infnum]), 1, 0, 0);\r
+ }\r
+}\r
+\r
+/**\r
+ * Performs the selected test on the USB device (high-speed only).\r
+ * \param test Test selector value.\r
+ */\r
+static void USBDDriver_Test(const USBDDriver *pDriver, uint8_t test)\r
+{\r
+ pDriver = pDriver;\r
+ TRACE_DEBUG("UDPHS_Test\n\r");\r
+\r
+ /* the lower byte of wIndex must be zero\r
+ the most significant byte of wIndex is used to specify the specific test mode */\r
+\r
+ switch (test) {\r
+ case USBFeatureRequest_TESTPACKET:\r
+ /*Test mode Test_Packet: */\r
+ /*Upon command, a port must repetitively transmit the following test packet until */\r
+ /*the exit action is taken. This enables the testing of rise and fall times, eye */\r
+ /*patterns, jitter, and any other dynamic waveform specifications. */\r
+ /*The test packet is made up by concatenating the following strings. */\r
+ /*(Note: For J/K NRZI data, and for NRZ data, the bit on the left is the first one */\r
+ /*transmitted. \93S?indicates that a bit stuff occurs, which inserts an \93extra?NRZI data bit. */\r
+ /*? N?is used to indicate N occurrences of a string of bits or symbols.) */\r
+ /*A port in Test_Packet mode must send this packet repetitively. The inter-packet timing */\r
+ /*must be no less than the minimum allowable inter-packet gap as defined in Section 7.1.18 and */\r
+ /*no greater than 125 us. */\r
+\r
+ /* Send ZLP */\r
+ USBD_Test(USBFeatureRequest_TESTSENDZLP);\r
+ /* Tst PACKET */\r
+ USBD_Test(USBFeatureRequest_TESTPACKET);\r
+ while (1);\r
+ /*break; not reached */\r
+\r
+\r
+ case USBFeatureRequest_TESTJ:\r
+ /*Test mode Test_J: */\r
+ /*Upon command, a port\92s transceiver must enter the high-speed J state and remain in that */\r
+ /*state until the exit action is taken. This enables the testing of the high output drive */\r
+ /*level on the D+ line. */\r
+\r
+ /* Send ZLP */\r
+ USBD_Test(USBFeatureRequest_TESTSENDZLP);\r
+ /* Tst J */\r
+ USBD_Test(USBFeatureRequest_TESTJ);\r
+ while (1);\r
+ /*break; not reached */\r
+\r
+\r
+ case USBFeatureRequest_TESTK:\r
+ /*Test mode Test_K: */\r
+ /*Upon command, a port\92s transceiver must enter the high-speed K state and remain in */\r
+ /*that state until the exit action is taken. This enables the testing of the high output drive */\r
+ /*level on the D- line. */\r
+\r
+ /* Send a ZLP */\r
+ USBD_Test(USBFeatureRequest_TESTSENDZLP);\r
+ USBD_Test(USBFeatureRequest_TESTK);\r
+ while (1);\r
+ /*break; not reached */\r
+\r
+\r
+ case USBFeatureRequest_TESTSE0NAK:\r
+ /*Test mode Test_SE0_NAK: */\r
+ /*Upon command, a port\92s transceiver must enter the high-speed receive mode */\r
+ /*and remain in that mode until the exit action is taken. This enables the testing */\r
+ /*of output impedance, low level output voltage, and loading characteristics. */\r
+ /*In addition, while in this mode, upstream facing ports (and only upstream facing ports) */\r
+ /*must respond to any IN token packet with a NAK handshake (only if the packet CRC is */\r
+ /*determined to be correct) within the normal allowed device response time. This enables testing of */\r
+ /*the device squelch level circuitry and, additionally, provides a general purpose stimulus/response */\r
+ /*test for basic functional testing. */\r
+\r
+ /* Send a ZLP */\r
+ USBD_Test(USBFeatureRequest_TESTSENDZLP);\r
+ /* Test SE0_NAK */\r
+ USBD_Test(USBFeatureRequest_TESTSE0NAK);\r
+ while (1);\r
+ /*break; not reached */\r
+\r
+\r
+ default:\r
+ USBD_Stall(0);\r
+ break;\r
+\r
+ }\r
+ /* The exit action is to power cycle the device. */\r
+ /* The device must be disconnected from the host */\r
+}\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Return USBDDriver instance pointer for global usage.\r
+ */\r
+USBDDriver *USBD_GetDriver(void)\r
+{\r
+ return &usbdDriver;\r
+}\r
+\r
+/**\r
+ * Initializes a USBDDriver instance with a list of descriptors. If\r
+ * interfaces can have multiple alternate settings, an array to store the\r
+ * current setting for each interface must be provided.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param pDescriptors Pointer to a USBDDriverDescriptors instance.\r
+ * \param pInterfaces Pointer to an array for storing the current alternate\r
+ * setting of each interface (optional).\r
+ */\r
+void USBDDriver_Initialize(\r
+ USBDDriver *pDriver,\r
+ const USBDDriverDescriptors *pDescriptors,\r
+ uint8_t *pInterfaces)\r
+{\r
+\r
+ pDriver->cfgnum = 0;\r
+ pDriver->isRemoteWakeUpEnabled = 0;\r
+\r
+ pDriver->pDescriptors = pDescriptors;\r
+ pDriver->pInterfaces = pInterfaces;\r
+\r
+ /* Initialize interfaces array if not null */\r
+\r
+ if (pInterfaces != 0) {\r
+\r
+ memset(pInterfaces, sizeof(pInterfaces), 0);\r
+ }\r
+}\r
+\r
+/**\r
+ * Returns configuration descriptor list.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param cfgNum Reserved.\r
+ */\r
+USBConfigurationDescriptor *USBDDriver_GetCfgDescriptors(\r
+ USBDDriver *pDriver, uint8_t cfgNum)\r
+{\r
+ USBDDriverDescriptors *pDescList = (USBDDriverDescriptors *)pDriver->pDescriptors;\r
+ USBConfigurationDescriptor *pCfg;\r
+\r
+ cfgNum = cfgNum;\r
+ if (USBD_HAL_IsHighSpeed() && pDescList->pHsConfiguration)\r
+ pCfg = (USBConfigurationDescriptor *)pDescList->pHsConfiguration;\r
+ else\r
+ pCfg = (USBConfigurationDescriptor *)pDescList->pFsConfiguration;\r
+\r
+ return pCfg;\r
+}\r
+\r
+/**\r
+ * Handles the given request if it is standard, otherwise STALLs it.\r
+ * \param pDriver Pointer to a USBDDriver instance.\r
+ * \param pRequest Pointer to a USBGenericRequest instance.\r
+ */\r
+void USBDDriver_RequestHandler(\r
+ USBDDriver *pDriver,\r
+ const USBGenericRequest *pRequest)\r
+{\r
+ uint8_t cfgnum;\r
+ uint8_t infnum;\r
+ uint8_t eptnum;\r
+ uint8_t setting;\r
+ uint8_t type;\r
+ uint8_t indexDesc;\r
+ uint32_t length;\r
+ uint32_t address;\r
+\r
+ TRACE_INFO_WP("Std ");\r
+\r
+ /* Check request code */\r
+ switch (USBGenericRequest_GetRequest(pRequest)) {\r
+\r
+ case USBGenericRequest_GETDESCRIPTOR:\r
+ TRACE_INFO_WP("gDesc ");\r
+\r
+ /* Send the requested descriptor */\r
+ type = USBGetDescriptorRequest_GetDescriptorType(pRequest);\r
+ indexDesc = USBGetDescriptorRequest_GetDescriptorIndex(pRequest);\r
+ length = USBGenericRequest_GetLength(pRequest);\r
+ GetDescriptor(pDriver, type, indexDesc, length);\r
+ break;\r
+\r
+ case USBGenericRequest_SETADDRESS:\r
+ TRACE_INFO_WP("sAddr ");\r
+\r
+ /* Sends a zero-length packet and then set the device address */\r
+ address = USBSetAddressRequest_GetAddress(pRequest);\r
+ USBD_Write(0, 0, 0, (TransferCallback) USBD_SetAddress, (void *) address);\r
+ break;\r
+\r
+ case USBGenericRequest_SETCONFIGURATION:\r
+ TRACE_INFO_WP("sCfg ");\r
+\r
+ /* Set the requested configuration */\r
+ cfgnum = USBSetConfigurationRequest_GetConfiguration(pRequest);\r
+ SetConfiguration(pDriver, cfgnum);\r
+ break;\r
+\r
+ case USBGenericRequest_GETCONFIGURATION:\r
+ TRACE_INFO_WP("gCfg ");\r
+\r
+ /* Send the current configuration number */\r
+ GetConfiguration(pDriver);\r
+ break;\r
+\r
+ case USBGenericRequest_GETSTATUS:\r
+ TRACE_INFO_WP("gSta ");\r
+\r
+ /* Check who is the recipient */\r
+ switch (USBGenericRequest_GetRecipient(pRequest)) {\r
+\r
+ case USBGenericRequest_DEVICE:\r
+ TRACE_INFO_WP("Dev ");\r
+\r
+ /* Send the device status */\r
+ GetDeviceStatus(pDriver);\r
+ break;\r
+\r
+ case USBGenericRequest_ENDPOINT:\r
+ TRACE_INFO_WP("Ept ");\r
+\r
+ /* Send the endpoint status */\r
+ eptnum = USBGenericRequest_GetEndpointNumber(pRequest);\r
+ GetEndpointStatus(eptnum);\r
+ break;\r
+\r
+ default:\r
+ TRACE_WARNING(\r
+ "USBDDriver_RequestHandler: Unknown recipient (%d)\n\r",\r
+ USBGenericRequest_GetRecipient(pRequest));\r
+ USBD_Stall(0);\r
+ }\r
+ break;\r
+\r
+ case USBGenericRequest_CLEARFEATURE:\r
+ TRACE_INFO_WP("cFeat ");\r
+\r
+ /* Check which is the requested feature */\r
+ switch (USBFeatureRequest_GetFeatureSelector(pRequest)) {\r
+\r
+ case USBFeatureRequest_ENDPOINTHALT:\r
+ TRACE_INFO_WP("Hlt ");\r
+\r
+ /* Unhalt endpoint and send a zero-length packet */\r
+ USBD_Unhalt(USBGenericRequest_GetEndpointNumber(pRequest));\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+\r
+ case USBFeatureRequest_DEVICEREMOTEWAKEUP:\r
+ TRACE_INFO_WP("RmWU ");\r
+\r
+ /* Disable remote wake-up and send a zero-length packet */\r
+ pDriver->isRemoteWakeUpEnabled = 0;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+\r
+ default:\r
+ TRACE_WARNING(\r
+ "USBDDriver_RequestHandler: Unknown feature selector (%d)\n\r",\r
+ USBFeatureRequest_GetFeatureSelector(pRequest));\r
+ USBD_Stall(0);\r
+ }\r
+ break;\r
+\r
+ case USBGenericRequest_SETFEATURE:\r
+ TRACE_INFO_WP("sFeat ");\r
+\r
+ /* Check which is the selected feature */\r
+ switch (USBFeatureRequest_GetFeatureSelector(pRequest)) {\r
+\r
+ case USBFeatureRequest_DEVICEREMOTEWAKEUP:\r
+ TRACE_INFO_WP("RmWU ");\r
+\r
+ /* Enable remote wake-up and send a ZLP */\r
+ pDriver->isRemoteWakeUpEnabled = 1;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+\r
+ case USBFeatureRequest_ENDPOINTHALT:\r
+ TRACE_INFO_WP("Halt ");\r
+ /* Halt endpoint */\r
+ USBD_Halt(USBGenericRequest_GetEndpointNumber(pRequest));\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+\r
+ case USBFeatureRequest_TESTMODE:\r
+ /* 7.1.20 Test Mode Support, 9.4.9 Set Feature */\r
+ if ((USBGenericRequest_GetRecipient(pRequest) == USBGenericRequest_DEVICE)\r
+ && ((USBGenericRequest_GetIndex(pRequest) & 0x000F) == 0)) {\r
+\r
+ /* Handle test request */\r
+ USBDDriver_Test(pDriver,\r
+ USBFeatureRequest_GetTestSelector(pRequest));\r
+ }\r
+ else {\r
+\r
+ USBD_Stall(0);\r
+ }\r
+ break;\r
+\r
+#if 0\r
+ case USBFeatureRequest_OTG_B_HNP_ENABLE:\r
+ TRACE_INFO_WP("OTG_B_HNP_ENABLE ");\r
+ pDriver->otg_features_supported |=\r
+ 1<<USBFeatureRequest_OTG_B_HNP_ENABLE;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+ case USBFeatureRequest_OTG_A_HNP_SUPPORT:\r
+ TRACE_INFO_WP("OTG_A_HNP_SUPPORT ");\r
+ pDriver->otg_features_supported |=\r
+ 1<<USBFeatureRequest_OTG_A_HNP_SUPPORT;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+ case USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT:\r
+ TRACE_INFO_WP("OTG_A_ALT_HNP_SUPPORT ");\r
+ pDriver->otg_features_supported |=\r
+ 1<<USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT;\r
+ USBD_Write(0, 0, 0, 0, 0);\r
+ break;\r
+#endif\r
+ default:\r
+ TRACE_WARNING(\r
+ "USBDDriver_RequestHandler: Unknown feature selector (%d)\n\r",\r
+ USBFeatureRequest_GetFeatureSelector(pRequest));\r
+ USBD_Stall(0);\r
+ }\r
+ break;\r
+\r
+ case USBGenericRequest_SETINTERFACE:\r
+ TRACE_INFO_WP("sInterface ");\r
+\r
+ infnum = USBInterfaceRequest_GetInterface(pRequest);\r
+ setting = USBInterfaceRequest_GetAlternateSetting(pRequest);\r
+ SetInterface(pDriver, infnum, setting);\r
+ break;\r
+\r
+ case USBGenericRequest_GETINTERFACE:\r
+ TRACE_INFO_WP("gInterface ");\r
+\r
+ infnum = USBInterfaceRequest_GetInterface(pRequest);\r
+ GetInterface(pDriver, infnum);\r
+ break;\r
+\r
+ default:\r
+ TRACE_WARNING(\r
+ "USBDDriver_RequestHandler: Unknown request code (%d)\n\r",\r
+ USBGenericRequest_GetRequest(pRequest));\r
+ USBD_Stall(0);\r
+ }\r
+}\r
+\r
+\r
+/**\r
+ * Test if RemoteWakeUP feature is enabled\r
+ * \param pDriver Pointer to an USBDDriver instance.\r
+ * \return 1 if remote wake up has been enabled by the host; otherwise, returns\r
+ * 0\r
+ */\r
+uint8_t USBDDriver_IsRemoteWakeUpEnabled(const USBDDriver *pDriver)\r
+{\r
+ return pDriver->isRemoteWakeUpEnabled;\r
+}\r
+\r
+/**\r
+ * Return OTG features supported\r
+ * \param pDriver Pointer to an USBDDriver instance.\r
+ * \return the OTG features\r
+ */\r
+uint8_t USBDDriver_returnOTGFeatures(const USBDDriver *pDriver)\r
+{\r
+ return pDriver->otg_features_supported;\r
+}\r
+\r
+/**\r
+ * Clear OTG features supported\r
+ * \param pDriver Pointer to an USBDDriver instance.\r
+ * \return none\r
+ */\r
+void USBDDriver_clearOTGFeatures(USBDDriver *pDriver)\r
+{\r
+ pDriver->otg_features_supported = 0;\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * \section Purpose\r
+ * \r
+ * Definition of several callbacks which are triggered by the USB software\r
+ * driver after receiving specific requests.\r
+ * \r
+ * \section Usage\r
+ * \r
+ * -# Re-implement the USBDDriverCallbacks_ConfigurationChanged\r
+ * callback to know when the hosts changes the active configuration of\r
+ * the device.\r
+ * -# Re-implement the USBDDriverCallbacks_InterfaceSettingChanged\r
+ * callback to get notified whenever the active setting of an interface\r
+ * is changed by the host.\r
+ *\r
+ * \addtogroup usbd_interface \r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "USBDDriver.h"\r
+#include <USBLib_Trace.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Global functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Indicates that the current configuration of the device has changed.\r
+ * \param cfgnum New device configuration index.\r
+ */\r
+WEAK void USBDDriverCallbacks_ConfigurationChanged(uint8_t cfgnum)\r
+{\r
+ cfgnum = cfgnum;\r
+ TRACE_INFO_WP("cfgChanged%d ", cfgnum);\r
+}\r
+\r
+/**\r
+ * Notifies of a change in the currently active setting of an interface.\r
+ * \param interface Number of the interface whose setting has changed.\r
+ * \param setting New interface setting.\r
+ */\r
+WEAK void USBDDriverCallbacks_InterfaceSettingChanged(\r
+ uint8_t interface,\r
+ uint8_t setting)\r
+{\r
+ interface = interface; setting = setting;\r
+ TRACE_INFO_WP("ifSettingChanged%d.%d ", interface, setting);\r
+}\r
+\r
+/**@}*/\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+\r
+ \file\r
+\r
+ \section Purpose\r
+\r
+ Implementation of USB device functions on a UDP controller.\r
+\r
+ See \ref usbd_api_method USBD API Methods.\r
+*/\r
+\r
+/** \addtogroup usbd_hal\r
+ *@{*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include "chip.h"\r
+#include "USBD_HAL.h"\r
+\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Indicates chip has an UDP Full Speed. */\r
+#define CHIP_USB_UDP\r
+\r
+/** Indicates chip has an internal pull-up. */\r
+#define CHIP_USB_PULLUP_INTERNAL\r
+\r
+/** Number of USB endpoints */\r
+#define CHIP_USB_NUMENDPOINTS 8\r
+\r
+/** Endpoints max paxcket size */\r
+#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \\r
+ ((i == 0) ? 64 : \\r
+ ((i == 1) ? 64 : \\r
+ ((i == 2) ? 64 : \\r
+ ((i == 3) ? 64 : \\r
+ ((i == 4) ? 512 : \\r
+ ((i == 5) ? 512 : \\r
+ ((i == 6) ? 64 : \\r
+ ((i == 7) ? 64 : 0 ))))))))\r
+\r
+/** Endpoints Number of Bank */\r
+#define CHIP_USB_ENDPOINTS_BANKS(i) \\r
+ ((i == 0) ? 1 : \\r
+ ((i == 1) ? 2 : \\r
+ ((i == 2) ? 2 : \\r
+ ((i == 3) ? 1 : \\r
+ ((i == 4) ? 2 : \\r
+ ((i == 5) ? 2 : \\r
+ ((i == 6) ? 2 : \\r
+ ((i == 7) ? 2 : 0 ))))))))\r
+\r
+/**\r
+ * \section UDP_registers_sec "UDP Register field values"\r
+ *\r
+ * This section lists the initialize values of UDP registers.\r
+ *\r
+ * \subsection Values\r
+ * - UDP_RXDATA\r
+ */\r
+/** Bit mask for both banks of the UDP_CSR register. */\r
+#define UDP_CSR_RXDATA_BK (UDP_CSR_RX_DATA_BK0 | UDP_CSR_RX_DATA_BK1)\r
+\r
+/**\r
+ * \section endpoint_states_sec "UDP Endpoint states"\r
+ *\r
+ * This page lists the endpoint states.\r
+ *\r
+ * \subsection States\r
+ * - UDP_ENDPOINT_DISABLED\r
+ * - UDP_ENDPOINT_HALTED\r
+ * - UDP_ENDPOINT_IDLE\r
+ * - UDP_ENDPOINT_SENDING\r
+ * - UDP_ENDPOINT_RECEIVING\r
+ * - UDP_ENDPOINT_SENDINGM\r
+ * - UDP_ENDPOINT_RECEIVINGM\r
+ */\r
+\r
+/** Endpoint states: Endpoint is disabled */\r
+#define UDP_ENDPOINT_DISABLED 0\r
+/** Endpoint states: Endpoint is halted (i.e. STALLs every request) */\r
+#define UDP_ENDPOINT_HALTED 1\r
+/** Endpoint states: Endpoint is idle (i.e. ready for transmission) */\r
+#define UDP_ENDPOINT_IDLE 2\r
+/** Endpoint states: Endpoint is sending data */\r
+#define UDP_ENDPOINT_SENDING 3\r
+/** Endpoint states: Endpoint is receiving data */\r
+#define UDP_ENDPOINT_RECEIVING 4\r
+/** Endpoint states: Endpoint is sending MBL */\r
+#define UDP_ENDPOINT_SENDINGM 5\r
+/** Endpoint states: Endpoint is receiving MBL */\r
+#define UDP_ENDPOINT_RECEIVINGM 6\r
+\r
+/**\r
+ * \section udp_csr_register_access_sec "UDP CSR register access"\r
+ *\r
+ * This page lists the macros to access UDP CSR register.\r
+ *\r
+ * \comment\r
+ * In a preemptive environment, set or clear the flag and wait for a time of\r
+ * 1 UDPCK clock cycle and 1 peripheral clock cycle. However, RX_DATA_BK0,\r
+ * TXPKTRDY, RX_DATA_BK1 require wait times of 3 UDPCK clock cycles and\r
+ * 5 peripheral clock cycles before accessing DPR.\r
+ * See datasheet\r
+ *\r
+ * !Macros\r
+ * - CLEAR_CSR\r
+ * - SET_CSR\r
+ */\r
+\r
+#if defined ( __CC_ARM )\r
+ #define nop() {volatile int h; for(h=0;h<10;h++){}}\r
+#elif defined ( __ICCARM__ )\r
+ #include <intrinsics.h>\r
+ #define nop() (__no_operation())\r
+#elif defined ( __GNUC__ )\r
+ #define nop() __asm__ __volatile__ ( "nop" )\r
+#endif\r
+\r
+\r
+/** Bitmap for all status bits in CSR. */\r
+#define REG_NO_EFFECT_1_ALL UDP_CSR_RX_DATA_BK0 | UDP_CSR_RX_DATA_BK1 \\r
+ |UDP_CSR_STALLSENTISOERROR | UDP_CSR_RXSETUP \\r
+ |UDP_CSR_TXCOMP\r
+\r
+/**\r
+ * Sets the specified bit(s) in the UDP_CSR register.\r
+ *\r
+ * \param endpoint The endpoint number of the CSR to process.\r
+ * \param flags The bitmap to set to 1.\r
+ */\r
+#define SET_CSR(endpoint, flags) \\r
+ { \\r
+ volatile uint32_t reg; \\r
+ int32_t nop_count ; \\r
+ reg = UDP->UDP_CSR[endpoint] ; \\r
+ reg |= REG_NO_EFFECT_1_ALL; \\r
+ reg |= (flags); \\r
+ UDP->UDP_CSR[endpoint] = reg; \\r
+ for( nop_count=0; nop_count<15; nop_count++ ) {\\r
+ nop();\\r
+ }\\r
+ }\r
+\r
+/**\r
+ * Clears the specified bit(s) in the UDP_CSR register.\r
+ *\r
+ * \param endpoint The endpoint number of the CSR to process.\r
+ * \param flags The bitmap to clear to 0.\r
+ */\r
+#define CLEAR_CSR(endpoint, flags) \\r
+{ \\r
+ volatile uint32_t reg; \\r
+ int32_t nop_count ; \\r
+ reg = UDP->UDP_CSR[endpoint]; \\r
+ reg |= REG_NO_EFFECT_1_ALL; \\r
+ reg &= ~((uint32_t)(flags)); \\r
+ UDP->UDP_CSR[endpoint] = reg; \\r
+ for( nop_count=0; nop_count<15; nop_count++ ) {\\r
+ nop();\\r
+ }\\r
+}\r
+\r
+\r
+/** Get Number of buffer in Multi-Buffer-List\r
+ * \param i input index\r
+ * \param o output index\r
+ * \param size list size\r
+ */\r
+#define MBL_NbBuffer(i, o, size) (((i)>(o))?((i)-(o)):((i)+(size)-(o)))\r
+\r
+/** Buffer list is full */\r
+#define MBL_FULL 1\r
+/** Buffer list is null */\r
+#define MBL_NULL 2\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Describes header for UDP endpoint transfer. */\r
+typedef struct {\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ void* fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void* pArgument;\r
+ /** Transfer type */\r
+ uint8_t transType;\r
+} TransferHeader;\r
+\r
+/** Describes a transfer on a UDP endpoint. */\r
+typedef struct {\r
+\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ TransferCallback fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void *pArgument;\r
+ /** Transfer type */\r
+ uint16_t transType;\r
+ /** Number of bytes which have been written into the UDP internal FIFO\r
+ * buffers. */\r
+ int16_t buffered;\r
+ /** Pointer to a data buffer used for emission/reception. */\r
+ uint8_t *pData;\r
+ /** Number of bytes which have been sent/received. */\r
+ int32_t transferred;\r
+ /** Number of bytes which have not been buffered/transferred yet. */\r
+ int32_t remaining;\r
+} Transfer;\r
+\r
+/** Describes Multi Buffer List transfer on a UDP endpoint. */\r
+typedef struct {\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ MblTransferCallback fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void *pArgument;\r
+ /** Transfer type */\r
+ volatile uint8_t transType;\r
+ /** List state (OK, FULL, NULL) (run time) */\r
+ uint8_t listState;\r
+ /** Multi-Buffer List size */\r
+ uint16_t listSize;\r
+ /** Pointer to multi-buffer list */\r
+ USBDTransferBuffer *pMbl;\r
+ /** Offset number of buffers to start transfer */\r
+ uint16_t offsetSize;\r
+ /** Current processing buffer index (run time) */\r
+ uint16_t outCurr;\r
+ /** Loast loaded buffer index (run time) */\r
+ uint16_t outLast;\r
+ /** Current buffer for input (run time) */\r
+ uint16_t inCurr;\r
+} MblTransfer;\r
+\r
+/**\r
+ * Describes the state of an endpoint of the UDP controller.\r
+ */\r
+typedef struct {\r
+\r
+ /* CSR */\r
+ //uint32_t CSR;\r
+ /** Current endpoint state. */\r
+ volatile uint8_t state;\r
+ /** Current reception bank (0 or 1). */\r
+ volatile uint8_t bank;\r
+ /** Maximum packet size for the endpoint. */\r
+ volatile uint16_t size;\r
+ /** Describes an ongoing transfer (if current state is either\r
+ * UDP_ENDPOINT_SENDING or UDP_ENDPOINT_RECEIVING) */\r
+ union {\r
+ TransferHeader transHdr;\r
+ Transfer singleTransfer;\r
+ MblTransfer mblTransfer;\r
+ } transfer;\r
+} Endpoint;\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal variables\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Holds the internal state for each endpoint of the UDP. */\r
+static Endpoint endpoints[CHIP_USB_NUMENDPOINTS];\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal Functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Enables the clock of the UDP peripheral.\r
+ * \return 1 if peripheral status changed.\r
+ */\r
+static uint8_t UDP_EnablePeripheralClock(void)\r
+{\r
+ if (!PMC_IsPeriphEnabled(ID_UDP)) {\r
+ PMC_EnablePeripheral(ID_UDP);\r
+ return 1;\r
+ }\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Disables the UDP peripheral clock.\r
+ */\r
+static inline void UDP_DisablePeripheralClock(void)\r
+{\r
+ PMC_DisablePeripheral(ID_UDP);\r
+}\r
+\r
+/**\r
+ * Enables the 48MHz USB clock.\r
+ */\r
+static inline void UDP_EnableUsbClock(void)\r
+{\r
+ REG_PMC_SCER = PMC_SCER_UDP;\r
+}\r
+\r
+/**\r
+ * Disables the 48MHz USB clock.\r
+ */\r
+static inline void UDP_DisableUsbClock(void)\r
+{\r
+ REG_PMC_SCDR = PMC_SCER_UDP;\r
+}\r
+\r
+/**\r
+ * Enables the UDP transceiver.\r
+ */\r
+static inline void UDP_EnableTransceiver(void)\r
+{\r
+ UDP->UDP_TXVC &= ~(uint32_t)UDP_TXVC_TXVDIS;\r
+}\r
+\r
+/**\r
+ * Disables the UDP transceiver.\r
+ */\r
+static inline void UDP_DisableTransceiver(void)\r
+{\r
+ UDP->UDP_TXVC |= UDP_TXVC_TXVDIS;\r
+}\r
+\r
+/**\r
+ * Handles a completed transfer on the given endpoint, invoking the\r
+ * configured callback if any.\r
+ * \param bEndpoint Number of the endpoint for which the transfer has completed.\r
+ * \param bStatus Status code returned by the transfer operation\r
+ */\r
+static void UDP_EndOfTransfer(uint8_t bEndpoint, uint8_t bStatus)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+\r
+ // Check that endpoint was sending or receiving data\r
+ if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)\r
+ || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {\r
+\r
+ Transfer *pTransfer = (Transfer *)&(pEndpoint->transfer);\r
+ uint32_t transferred = pTransfer->transferred;\r
+ uint32_t remaining = pTransfer->remaining + pTransfer->buffered;\r
+\r
+ TRACE_DEBUG_WP("EoT ");\r
+\r
+ /* Endpoint returns in Idle state */\r
+ pEndpoint->state = UDP_ENDPOINT_IDLE;\r
+ /* Reset descriptor values */\r
+ pTransfer->pData = 0;\r
+ pTransfer->transferred = -1;\r
+ pTransfer->buffered = -1;\r
+ pTransfer->remaining = -1;\r
+\r
+ // Invoke callback is present\r
+ if (pTransfer->fCallback != 0) {\r
+\r
+ ((TransferCallback) pTransfer->fCallback)\r
+ (pTransfer->pArgument,\r
+ bStatus,\r
+ transferred,\r
+ remaining);\r
+ }\r
+ else {\r
+ TRACE_DEBUG_WP("NoCB ");\r
+ }\r
+ }\r
+ else if ( (pEndpoint->state == UDP_ENDPOINT_RECEIVINGM)\r
+ || (pEndpoint->state == UDP_ENDPOINT_SENDINGM) ) {\r
+\r
+ MblTransfer *pTransfer = (MblTransfer*)&(pEndpoint->transfer);\r
+\r
+ TRACE_DEBUG_WP("EoMT ");\r
+\r
+ /* Endpoint returns in Idle state */\r
+ pEndpoint->state = UDP_ENDPOINT_IDLE;\r
+ /* Reset transfer descriptor */\r
+ if (pTransfer->transType) {\r
+ MblTransfer *pMblt = (MblTransfer*)&(pEndpoint->transfer);\r
+ pMblt->listState = 0;\r
+ pMblt->outCurr = pMblt->inCurr = pMblt->outLast = 0;\r
+ }\r
+ /* Invoke callback */\r
+ if (pTransfer->fCallback != 0) {\r
+\r
+ ((MblTransferCallback) pTransfer->fCallback)\r
+ (pTransfer->pArgument,\r
+ bStatus);\r
+ }\r
+ else {\r
+ TRACE_DEBUG_WP("NoCB ");\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * Clears the correct reception flag (bank 0 or bank 1) of an endpoint\r
+ * \param bEndpoint Index of endpoint\r
+ */\r
+static void UDP_ClearRxFlag(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+\r
+ // Clear flag and change banks\r
+ if (pEndpoint->bank == 0) {\r
+\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_RX_DATA_BK0);\r
+ // Swap bank if in dual-fifo mode\r
+ if (CHIP_USB_ENDPOINTS_BANKS(bEndpoint) > 1) {\r
+\r
+ pEndpoint->bank = 1;\r
+ }\r
+ }\r
+ else {\r
+\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_RX_DATA_BK1);\r
+ pEndpoint->bank = 0;\r
+ }\r
+}\r
+\r
+/**\r
+ * Update multi-buffer-transfer descriptors.\r
+ * \param pTransfer Pointer to instance MblTransfer.\r
+ * \param size Size of bytes that processed.\r
+ * \param forceEnd Force the buffer END.\r
+ * \return 1 if current buffer ended.\r
+ */\r
+static uint8_t UDP_MblUpdate(MblTransfer *pTransfer,\r
+ USBDTransferBuffer * pBi,\r
+ uint16_t size,\r
+ uint8_t forceEnd)\r
+{\r
+ /* Update transfer descriptor */\r
+ pBi->remaining -= size;\r
+ /* Check if list NULL */\r
+ if (pTransfer->listState == MBL_NULL) {\r
+ return 1;\r
+ }\r
+ /* Check if current buffer ended */\r
+ if (pBi->remaining == 0 || forceEnd || size == 0) {\r
+\r
+ /* Process to next buffer */\r
+ if ((++ pTransfer->outCurr) == pTransfer->listSize)\r
+ pTransfer->outCurr = 0;\r
+ /* Check buffer NULL case */\r
+ if (pTransfer->outCurr == pTransfer->inCurr)\r
+ pTransfer->listState = MBL_NULL;\r
+ else {\r
+ pTransfer->listState = 0;\r
+ /* Continue transfer, prepare for next operation */\r
+ pBi = &pTransfer->pMbl[pTransfer->outCurr];\r
+ pBi->buffered = 0;\r
+ pBi->transferred = 0;\r
+ pBi->remaining = pBi->size;\r
+ }\r
+ return 1;\r
+ }\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Transfers a data payload from the current tranfer buffer to the endpoint\r
+ * FIFO\r
+ * \param bEndpoint Number of the endpoint which is sending data.\r
+ */\r
+static uint8_t UDP_MblWriteFifo(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pTransfer = (MblTransfer*)&(pEndpoint->transfer);\r
+ USBDTransferBuffer *pBi = &(pTransfer->pMbl[pTransfer->outCurr]);\r
+ int32_t size;\r
+\r
+ volatile uint8_t * pBytes;\r
+ volatile uint8_t bufferEnd = 1;\r
+\r
+ /* Get the number of bytes to send */\r
+ size = pEndpoint->size;\r
+ if (size > pBi->remaining) size = pBi->remaining;\r
+\r
+ TRACE_DEBUG_WP("w%d.%d ", pTransfer->outCurr, size);\r
+\r
+ /* Record last accessed buffer */\r
+ pTransfer->outLast = pTransfer->outCurr;\r
+\r
+ pBytes = &(pBi->pBuffer[pBi->transferred + pBi->buffered]);\r
+ pBi->buffered += size;\r
+ bufferEnd = UDP_MblUpdate(pTransfer, pBi, size, 0);\r
+\r
+ /* Write packet in the FIFO buffer */\r
+ if (size) {\r
+ int32_t c8 = size >> 3;\r
+ int32_t c1 = size & 0x7;\r
+ for (; c8; c8 --) {\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ }\r
+ for (; c1; c1 --) {\r
+ UDP->UDP_FDR[bEndpoint] = *(pBytes ++);\r
+ }\r
+ }\r
+ return bufferEnd;\r
+}\r
+\r
+/**\r
+ * Transfers a data payload from the current tranfer buffer to the endpoint\r
+ * FIFO\r
+ * \param bEndpoint Number of the endpoint which is sending data.\r
+ */\r
+static void UDP_WritePayload(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+ int32_t size;\r
+\r
+ // Get the number of bytes to send\r
+ size = pEndpoint->size;\r
+ if (size > pTransfer->remaining) {\r
+\r
+ size = pTransfer->remaining;\r
+ }\r
+\r
+ // Update transfer descriptor information\r
+ pTransfer->buffered += size;\r
+ pTransfer->remaining -= size;\r
+\r
+ // Write packet in the FIFO buffer\r
+ while (size > 0) {\r
+\r
+ UDP->UDP_FDR[bEndpoint] = *(pTransfer->pData);\r
+ pTransfer->pData++;\r
+ size--;\r
+ }\r
+}\r
+\r
+\r
+/**\r
+ * Transfers a data payload from an endpoint FIFO to the current transfer buffer\r
+ * \param bEndpoint Endpoint number.\r
+ * \param wPacketSize Size of received data packet\r
+ */\r
+static void UDP_ReadPayload(uint8_t bEndpoint, int32_t wPacketSize)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+\r
+ // Check that the requested size is not bigger than the remaining transfer\r
+ if (wPacketSize > pTransfer->remaining) {\r
+\r
+ pTransfer->buffered += wPacketSize - pTransfer->remaining;\r
+ wPacketSize = pTransfer->remaining;\r
+ }\r
+\r
+ // Update transfer descriptor information\r
+ pTransfer->remaining -= wPacketSize;\r
+ pTransfer->transferred += wPacketSize;\r
+\r
+ // Retrieve packet\r
+ while (wPacketSize > 0) {\r
+\r
+ *(pTransfer->pData) = (uint8_t) UDP->UDP_FDR[bEndpoint];\r
+ pTransfer->pData++;\r
+ wPacketSize--;\r
+ }\r
+}\r
+\r
+/**\r
+ * Received SETUP packet from endpoint 0 FIFO\r
+ * \param pRequest Generic USB SETUP request sent over Control endpoints\r
+ */\r
+static void UDP_ReadRequest(USBGenericRequest *pRequest)\r
+{\r
+ uint8_t *pData = (uint8_t *)pRequest;\r
+ uint32_t i;\r
+\r
+ // Copy packet\r
+ for (i = 0; i < 8; i++) {\r
+\r
+ *pData = (uint8_t) UDP->UDP_FDR[0];\r
+ pData++;\r
+ }\r
+}\r
+\r
+/**\r
+ * Checks if an ongoing transfer on an endpoint has been completed.\r
+ * \param bEndpoint Endpoint number.\r
+ * \return 1 if the current transfer on the given endpoint is complete;\r
+ * otherwise 0.\r
+ */\r
+static uint8_t UDP_IsTransferFinished(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+\r
+ // Check if it is a Control endpoint\r
+ // -> Control endpoint must always finish their transfer with a zero-length\r
+ // packet\r
+ if ((UDP->UDP_CSR[bEndpoint] & UDP_CSR_EPTYPE_Msk) == UDP_CSR_EPTYPE_CTRL) {\r
+\r
+ return (pTransfer->buffered < pEndpoint->size);\r
+ }\r
+ // Other endpoints only need to transfer all the data\r
+ else {\r
+\r
+ return (pTransfer->buffered <= pEndpoint->size)\r
+ && (pTransfer->remaining == 0);\r
+ }\r
+}\r
+\r
+/**\r
+ * Endpoint interrupt handler.\r
+ * Handle IN/OUT transfers, received SETUP packets and STALLing\r
+ * \param bEndpoint Index of endpoint\r
+ */\r
+static void UDP_EndpointHandler(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+ MblTransfer *pMblt = (MblTransfer*)&(pEndpoint->transfer);\r
+ uint32_t status = UDP->UDP_CSR[bEndpoint];\r
+ uint16_t wPacketSize;\r
+ USBGenericRequest request;\r
+\r
+ TRACE_DEBUG_WP("E%d ", bEndpoint);\r
+ TRACE_DEBUG_WP("st:0x%X ", status);\r
+\r
+ // Handle interrupts\r
+ // IN packet sent\r
+ if ((status & UDP_CSR_TXCOMP) != 0) {\r
+\r
+ TRACE_DEBUG_WP("Wr ");\r
+\r
+ // Check that endpoint was in MBL Sending state\r
+ if (pEndpoint->state == UDP_ENDPOINT_SENDINGM) {\r
+\r
+ USBDTransferBuffer * pMbli = &(pMblt->pMbl[pMblt->outLast]);\r
+ uint8_t bufferEnd = 0;\r
+\r
+ TRACE_DEBUG_WP("TxM%d.%d ", pMblt->listState, pMbli->buffered);\r
+\r
+ // End of transfer ?\r
+ if (pMblt->listState == MBL_NULL && pMbli->buffered == 0) {\r
+\r
+ pMbli->transferred += pMbli->buffered;\r
+ pMbli->buffered = 0;\r
+\r
+ // Disable interrupt\r
+ UDP->UDP_IDR = 1 << bEndpoint;\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ }\r
+ else {\r
+\r
+ // Transfer remaining data\r
+ TRACE_DEBUG_WP("%d ", pEndpoint->size);\r
+\r
+ if (pMbli->buffered > pEndpoint->size) {\r
+ pMbli->transferred += pEndpoint->size;\r
+ pMbli->buffered -= pEndpoint->size;\r
+ }\r
+ else {\r
+ pMbli->transferred += pMbli->buffered;\r
+ pMbli->buffered = 0;\r
+ }\r
+\r
+ // Send next packet\r
+ if (CHIP_USB_ENDPOINTS_BANKS(bEndpoint) == 1) {\r
+\r
+ // No double buffering\r
+ bufferEnd = UDP_MblWriteFifo(bEndpoint);\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ }\r
+ else {\r
+ // Double buffering\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ bufferEnd = UDP_MblWriteFifo(bEndpoint);\r
+ }\r
+\r
+ if (bufferEnd && pMblt->fCallback) {\r
+ ((MblTransferCallback) pTransfer->fCallback)\r
+ (pTransfer->pArgument,\r
+ USBD_STATUS_PARTIAL_DONE);\r
+ }\r
+ }\r
+ }\r
+ // Check that endpoint was in Sending state\r
+ else if (pEndpoint->state == UDP_ENDPOINT_SENDING) {\r
+\r
+ // End of transfer ?\r
+ if (UDP_IsTransferFinished(bEndpoint)) {\r
+\r
+ pTransfer->transferred += pTransfer->buffered;\r
+ pTransfer->buffered = 0;\r
+\r
+ // Disable interrupt if this is not a control endpoint\r
+ if ((status & UDP_CSR_EPTYPE_Msk) != UDP_CSR_EPTYPE_CTRL) {\r
+\r
+ UDP->UDP_IDR = 1 << bEndpoint;\r
+ }\r
+\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ }\r
+ else {\r
+\r
+ // Transfer remaining data\r
+ TRACE_DEBUG_WP(" %d ", pEndpoint->size);\r
+\r
+ pTransfer->transferred += pEndpoint->size;\r
+ pTransfer->buffered -= pEndpoint->size;\r
+\r
+ // Send next packet\r
+ if (CHIP_USB_ENDPOINTS_BANKS(bEndpoint) == 1) {\r
+\r
+ // No double buffering\r
+ UDP_WritePayload(bEndpoint);\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ }\r
+ else {\r
+ // Double buffering\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ UDP_WritePayload(bEndpoint);\r
+ }\r
+ }\r
+ }\r
+ else {\r
+ // Acknowledge interrupt\r
+ TRACE_ERROR("Error Wr%d, %x\n\r", bEndpoint, pEndpoint->state);\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_TXCOMP);\r
+ }\r
+ }\r
+\r
+ // OUT packet received\r
+ if ((status & UDP_CSR_RXDATA_BK) != 0) {\r
+\r
+ TRACE_DEBUG_WP("Rd ");\r
+\r
+ // Check that the endpoint is in Receiving state\r
+ if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) {\r
+\r
+ // Check if an ACK has been received on a Control endpoint\r
+ if (((status & UDP_CSR_EPTYPE_Msk) == UDP_CSR_EPTYPE_CTRL)\r
+ && ((status & UDP_CSR_RXBYTECNT_Msk) == 0)) {\r
+\r
+ // Acknowledge the data and finish the current transfer\r
+ UDP_ClearRxFlag(bEndpoint);\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+ // Check if the data has been STALLed\r
+ else if ((status & UDP_CSR_FORCESTALL) != 0) {\r
+\r
+ // Discard STALLed data\r
+ TRACE_DEBUG_WP("Discard ");\r
+ UDP_ClearRxFlag(bEndpoint);\r
+ }\r
+ // NAK the data\r
+ else {\r
+\r
+ TRACE_DEBUG_WP("Nak ");\r
+ UDP->UDP_IDR = 1 << bEndpoint;\r
+ }\r
+ }\r
+ // Endpoint is in Read state\r
+ else {\r
+\r
+ // Retrieve data and store it into the current transfer buffer\r
+ wPacketSize = (uint16_t) (status >> 16);\r
+ TRACE_DEBUG_WP("%d ", wPacketSize);\r
+ UDP_ReadPayload(bEndpoint, wPacketSize);\r
+ UDP_ClearRxFlag(bEndpoint);\r
+\r
+ // Check if the transfer is finished\r
+ if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) {\r
+\r
+ // Disable interrupt if this is not a control endpoint\r
+ if ((status & UDP_CSR_EPTYPE_Msk) != UDP_CSR_EPTYPE_CTRL) {\r
+\r
+ UDP->UDP_IDR = 1 << bEndpoint;\r
+ }\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+ }\r
+ }\r
+\r
+ // STALL sent\r
+ if ((status & UDP_CSR_STALLSENTISOERROR) != 0) {\r
+\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_STALLSENTISOERROR);\r
+\r
+ if ( (status & UDP_CSR_EPTYPE_Msk) == UDP_CSR_EPTYPE_ISO_IN\r
+ || (status & UDP_CSR_EPTYPE_Msk) == UDP_CSR_EPTYPE_ISO_OUT ) {\r
+\r
+ TRACE_WARNING("Isoe [%d] ", bEndpoint);\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);\r
+ }\r
+ else {\r
+\r
+ TRACE_WARNING("Sta 0x%X [%d] ", (int)status, bEndpoint);\r
+\r
+ if (pEndpoint->state != UDP_ENDPOINT_HALTED) {\r
+\r
+ TRACE_WARNING( "_ " );\r
+ // If the endpoint is not halted, clear the STALL condition\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_FORCESTALL);\r
+ }\r
+ }\r
+ }\r
+\r
+ // SETUP packet received\r
+ if ((status & UDP_CSR_RXSETUP) != 0) {\r
+\r
+ TRACE_DEBUG_WP("Stp ");\r
+\r
+ // If a transfer was pending, complete it\r
+ // Handles the case where during the status phase of a control write\r
+ // transfer, the host receives the device ZLP and ack it, but the ack\r
+ // is not received by the device\r
+ if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)\r
+ || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {\r
+\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+ // Copy the setup packet\r
+ UDP_ReadRequest(&request);\r
+\r
+ // Set the DIR bit before clearing RXSETUP in Control IN sequence\r
+ if (USBGenericRequest_GetDirection(&request) == USBGenericRequest_IN) {\r
+\r
+ SET_CSR(bEndpoint, UDP_CSR_DIR);\r
+ }\r
+ // Acknowledge setup packet\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_RXSETUP);\r
+\r
+ // Forward the request to the upper layer\r
+ USBD_RequestHandler(0, &request);\r
+ }\r
+\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param pEndpoint Pointer to Endpoint struct.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+static inline uint8_t UDP_Write(uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+\r
+ /* Check that the endpoint is in Idle state */\r
+ if (pEndpoint->state != UDP_ENDPOINT_IDLE) {\r
+\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength);\r
+\r
+ /* Setup the transfer descriptor */\r
+ pTransfer->pData = (void *) pData;\r
+ pTransfer->remaining = dLength;\r
+ pTransfer->buffered = 0;\r
+ pTransfer->transferred = 0;\r
+\r
+ /* Send the first packet */\r
+ pEndpoint->state = UDP_ENDPOINT_SENDING;\r
+ while((UDP->UDP_CSR[bEndpoint]&UDP_CSR_TXPKTRDY)==UDP_CSR_TXPKTRDY);\r
+ UDP_WritePayload(bEndpoint);\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+\r
+ /* If double buffering is enabled and there is data remaining,\r
+ prepare another packet */\r
+ if ((CHIP_USB_ENDPOINTS_BANKS(bEndpoint) > 1) && (pTransfer->remaining > 0)) {\r
+\r
+ UDP_WritePayload(bEndpoint);\r
+ }\r
+\r
+ /* Enable interrupt on endpoint */\r
+ UDP->UDP_IER = 1 << bEndpoint;\r
+\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor list,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the transfer buffer in the list has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param pEndpoint Pointer to Endpoint struct.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+static inline uint8_t UDP_AddWr(uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pMbl = (MblTransfer*)&(pEndpoint->transfer);\r
+ USBDTransferBuffer *pTx;\r
+\r
+ /* Check parameter */\r
+ if (dLength >= 0x10000)\r
+ return USBD_STATUS_INVALID_PARAMETER;\r
+\r
+ /* Data in progressing */\r
+ if (pEndpoint->state > UDP_ENDPOINT_IDLE) {\r
+ /* If list full */\r
+ if (pMbl->listState == MBL_FULL) {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ }\r
+\r
+ TRACE_DEBUG_WP("AddW%d(%d) ", bEndpoint, dLength);\r
+\r
+ /* Add buffer to buffer list and update index */\r
+ pTx = &(pMbl->pMbl[pMbl->inCurr]);\r
+ pTx->pBuffer = (uint8_t*)pData;\r
+ pTx->size = pTx->remaining = dLength;\r
+ pTx->transferred = pTx->buffered = 0;\r
+ /* Update input index */\r
+ if (pMbl->inCurr >= (pMbl->listSize-1)) pMbl->inCurr = 0;\r
+ else pMbl->inCurr ++;\r
+ if (pMbl->inCurr == pMbl->outCurr) pMbl->listState = MBL_FULL;\r
+ else pMbl->listState = 0;\r
+ /* Start sending when offset achieved */\r
+ if (MBL_NbBuffer(pMbl->inCurr, pMbl->outCurr, pMbl->listSize)\r
+ >= pMbl->offsetSize\r
+ && pEndpoint->state == UDP_ENDPOINT_IDLE) {\r
+ TRACE_DEBUG_WP("StartT ");\r
+ /* Change state */\r
+ pEndpoint->state = UDP_ENDPOINT_SENDINGM;\r
+ while((UDP->UDP_CSR[bEndpoint]&UDP_CSR_TXPKTRDY)==UDP_CSR_TXPKTRDY);\r
+ /* Send first packet */\r
+ UDP_MblWriteFifo(bEndpoint);\r
+ SET_CSR(bEndpoint, UDP_CSR_TXPKTRDY);\r
+ /* If double buffering is enabled and there is remaining, continue */\r
+ if ((CHIP_USB_ENDPOINTS_BANKS(bEndpoint) > 1)\r
+ && pMbl->pMbl[pMbl->outCurr].remaining) {\r
+ UDP_MblWriteFifo(bEndpoint);\r
+ }\r
+ /* Enable interrupt on endpoint */\r
+ UDP->UDP_IER = 1 << bEndpoint;\r
+ }\r
+\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+static inline uint8_t UDP_Read(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+\r
+ /* Return if the endpoint is not in IDLE state */\r
+ if (pEndpoint->state != UDP_ENDPOINT_IDLE) {\r
+\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+\r
+ /* Endpoint enters Receiving state */\r
+ pEndpoint->state = UDP_ENDPOINT_RECEIVING;\r
+ TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);\r
+\r
+ /* Set the transfer descriptor */\r
+ pTransfer->pData = pData;\r
+ pTransfer->remaining = dLength;\r
+ pTransfer->buffered = 0;\r
+ pTransfer->transferred = 0;\r
+\r
+ /* Enable interrupt on endpoint */\r
+ UDP->UDP_IER = 1 << bEndpoint;\r
+\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * USBD (UDP) interrupt handler\r
+ * Manages device resume, suspend, end of bus reset.\r
+ * Forwards endpoint events to the appropriate handler.\r
+ */\r
+void USBD_IrqHandler(void)\r
+{\r
+ uint32_t status;\r
+ int32_t eptnum = 0;\r
+\r
+ /* Enable peripheral ? */\r
+ //UDP_EnablePeripheralClock();\r
+\r
+ /* Get interrupt status\r
+ Some interrupts may get masked depending on the device state */\r
+ status = UDP->UDP_ISR;\r
+ status &= UDP->UDP_IMR;\r
+\r
+ if (USBD_GetState() < USBD_STATE_POWERED) {\r
+\r
+ status &= UDP_ICR_WAKEUP | UDP_ICR_RXRSM;\r
+ UDP->UDP_ICR = ~status;\r
+ }\r
+\r
+ /* Return immediately if there is no interrupt to service */\r
+ if (status == 0) {\r
+\r
+ TRACE_DEBUG_WP(".\n\r");\r
+ return;\r
+ }\r
+\r
+ /* Toggle USB LED if the device is active */\r
+ if (USBD_GetState() >= USBD_STATE_POWERED) {\r
+\r
+ //LED_Set(USBD_LEDUSB);\r
+ }\r
+\r
+ /* Service interrupts */\r
+\r
+ /** / Start Of Frame (SOF) */\r
+ //if (ISSET(dStatus, UDP_ISR_SOFINT)) {\r
+ //\r
+ // TRACE_DEBUG("SOF");\r
+ //\r
+ // // Invoke the SOF callback\r
+ // USB_StartOfFrameCallback(pUsb);\r
+ //\r
+ // // Acknowledge interrupt\r
+ // UDP->UDP_ICR = UDP_ICR_SOFINT;\r
+ // dStatus &= ~UDP_ISR_SOFINT;\r
+ //}\r
+ /* Resume (Wakeup) */\r
+ if ((status & (UDP_ISR_WAKEUP | UDP_ISR_RXRSM)) != 0) {\r
+\r
+ TRACE_INFO_WP("Res ");\r
+ /* Clear and disable resume interrupts */\r
+ UDP->UDP_ICR = UDP_ICR_WAKEUP | UDP_ICR_RXRSM | UDP_ICR_RXSUSP;\r
+ UDP->UDP_IDR = UDP_IDR_WAKEUP | UDP_IDR_RXRSM;\r
+ /* Do resome operations */\r
+ USBD_ResumeHandler();\r
+ }\r
+\r
+ /* Suspend\r
+ This interrupt is always treated last (hence the '==') */\r
+ if (status == UDP_ISR_RXSUSP) {\r
+\r
+ TRACE_INFO_WP("Susp ");\r
+ /* Enable wakeup */\r
+ UDP->UDP_IER = UDP_IER_WAKEUP | UDP_IER_RXRSM;\r
+ /* Acknowledge interrupt */\r
+ UDP->UDP_ICR = UDP_ICR_RXSUSP;\r
+ /* Do suspend operations */\r
+ USBD_SuspendHandler();\r
+ }\r
+ /* End of bus reset */\r
+ else if ((status & UDP_ISR_ENDBUSRES) != 0) {\r
+\r
+ TRACE_INFO_WP("EoBRes ");\r
+ /* Flush and enable the Suspend interrupt */\r
+ UDP->UDP_ICR = UDP_ICR_WAKEUP | UDP_ICR_RXRSM | UDP_ICR_RXSUSP;\r
+ UDP->UDP_IER = UDP_IER_RXSUSP;\r
+\r
+ /* Do RESET operations */\r
+ USBD_ResetHandler();\r
+\r
+ /* Acknowledge end of bus reset interrupt */\r
+ UDP->UDP_ICR = UDP_ICR_ENDBUSRES;\r
+ }\r
+ /* Endpoint interrupts */\r
+ else {\r
+\r
+ status &= ((1 << CHIP_USB_NUMENDPOINTS) - 1);\r
+ while (status != 0) {\r
+\r
+ /* Check if endpoint has a pending interrupt */\r
+ if ((status & (1 << eptnum)) != 0) {\r
+\r
+ UDP_EndpointHandler(eptnum);\r
+ status &= ~(1 << eptnum);\r
+\r
+ if (status != 0) {\r
+\r
+ TRACE_INFO_WP("\n\r - ");\r
+ }\r
+ }\r
+ eptnum++;\r
+ }\r
+ }\r
+\r
+ /* Toggle LED back to its previous state */\r
+ TRACE_DEBUG_WP("!");\r
+ TRACE_INFO_WP("\n\r");\r
+ if (USBD_GetState() >= USBD_STATE_POWERED) {\r
+\r
+ //LED_Clear(USBD_LEDUSB);\r
+ }\r
+}\r
+\r
+/**\r
+ * \brief Reset endpoints and disable them.\r
+ * -# Terminate transfer if there is any, with given status;\r
+ * -# Reset the endpoint & disable it.\r
+ * \param bmEPs Bitmap for endpoints to reset.\r
+ * \param bStatus Status passed to terminate transfer on endpoint.\r
+ * \param bKeepCfg 1 to keep old endpoint configuration.\r
+ * \note Use USBD_HAL_ConfigureEP() to configure and enable endpoint\r
+ if not keeping old configuration.\r
+ * \sa USBD_HAL_ConfigureEP().\r
+ */\r
+void USBD_HAL_ResetEPs(uint32_t bmEPs, uint8_t bStatus, uint8_t bKeepCfg)\r
+{\r
+ Endpoint *pEndpoint;\r
+ uint32_t tmp = bmEPs & ((1<<CHIP_USB_NUMENDPOINTS)-1);\r
+ uint8_t ep;\r
+ uint32_t epBit, epCfg;\r
+ for (ep = 0, epBit = 1; ep < CHIP_USB_NUMENDPOINTS; ep ++) {\r
+ if (tmp & epBit) {\r
+\r
+ /* Disable ISR */\r
+ UDP->UDP_IDR = epBit;\r
+ /* Kill pending TXPKTREADY */\r
+ CLEAR_CSR(ep, UDP_CSR_TXPKTRDY);\r
+\r
+ /* Reset transfer information */\r
+ pEndpoint = &(endpoints[ep]);\r
+ /* Reset endpoint state */\r
+ pEndpoint->bank = 0;\r
+ /* Endpoint configure */\r
+ epCfg = UDP->UDP_CSR[ep];\r
+ /* Reset endpoint */\r
+ UDP->UDP_RST_EP |= epBit;\r
+ UDP->UDP_RST_EP &= ~epBit;\r
+ /* Restore configure */\r
+ if (bKeepCfg) {\r
+ //SET_CSR(ep, pEndpoint->CSR);\r
+ SET_CSR(ep, epCfg);\r
+ }\r
+ else {\r
+ //pEndpoint->CSR = 0;\r
+ pEndpoint->state = UDP_ENDPOINT_DISABLED;\r
+ }\r
+\r
+ /* Terminate transfer on this EP */\r
+ UDP_EndOfTransfer(ep, bStatus);\r
+ }\r
+ epBit <<= 1;\r
+ }\r
+ /* Reset EPs */\r
+ // UDP->UDP_RST_EP |= bmEPs;\r
+ // UDP->UDP_RST_EP &= ~bmEPs;\r
+}\r
+\r
+/**\r
+ * Cancel pending READ/WRITE\r
+ * \param bmEPs Bitmap for endpoints to reset.\r
+ * \note EP callback is invoked with USBD_STATUS_CANCELED.\r
+ */\r
+void USBD_HAL_CancelIo(uint32_t bmEPs)\r
+{\r
+ uint32_t tmp = bmEPs & ((1<<CHIP_USB_NUMENDPOINTS)-1);\r
+ uint8_t ep;\r
+ uint32_t epBit;\r
+ for (ep = 0, epBit = 1; ep < CHIP_USB_NUMENDPOINTS; ep ++) {\r
+ if (tmp & epBit) {\r
+\r
+ /* Disable ISR */\r
+ UDP->UDP_IDR = epBit;\r
+ /* Kill pending TXPKTREADY */\r
+ CLEAR_CSR(ep, UDP_CSR_TXPKTRDY);\r
+\r
+ /* Terminate transfer on this EP */\r
+ UDP_EndOfTransfer(ep, USBD_STATUS_CANCELED);\r
+ }\r
+ epBit <<= 1;\r
+ }\r
+}\r
+\r
+/**\r
+ * Configures an endpoint according to its endpoint Descriptor.\r
+ * \param pDescriptor Pointer to an endpoint descriptor.\r
+ */\r
+uint8_t USBD_HAL_ConfigureEP(const USBEndpointDescriptor *pDescriptor)\r
+{\r
+ Endpoint *pEndpoint;\r
+ uint8_t bEndpoint;\r
+ uint8_t bType;\r
+ uint8_t bEndpointDir;\r
+\r
+ /* NULL descriptor -> Control endpoint 0 in default */\r
+ if (pDescriptor == 0) {\r
+ bEndpoint = 0;\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ bType= USBEndpointDescriptor_CONTROL;\r
+ bEndpointDir = 0;\r
+ pEndpoint->size = CHIP_USB_ENDPOINTS_MAXPACKETSIZE(0);\r
+ }\r
+ /* Device descriptor -> Specific Control EP */\r
+ else if (pDescriptor->bDescriptorType == USBGenericDescriptor_DEVICE) {\r
+ bEndpoint = 0;\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ bType = USBEndpointDescriptor_CONTROL;\r
+ bEndpointDir = 0;\r
+ pEndpoint->size = ((USBDeviceDescriptor *)pDescriptor)->bMaxPacketSize0;\r
+ }\r
+ /* Not endpoint descriptor, ERROR! */\r
+ else if (pDescriptor->bDescriptorType != USBGenericDescriptor_ENDPOINT) {\r
+ return 0xFF;\r
+ }\r
+ else {\r
+ bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor);\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ bType = USBEndpointDescriptor_GetType(pDescriptor);\r
+ bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor);\r
+ pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor);\r
+ }\r
+\r
+ /* Abort the current transfer is the endpoint was configured and in\r
+ Write or Read state */\r
+ if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)\r
+ || (pEndpoint->state == UDP_ENDPOINT_SENDING)\r
+ || (pEndpoint->state == UDP_ENDPOINT_RECEIVINGM)\r
+ || (pEndpoint->state == UDP_ENDPOINT_SENDINGM)) {\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_RESET);\r
+ }\r
+ pEndpoint->state = UDP_ENDPOINT_IDLE;\r
+\r
+ /* Reset Endpoint Fifos */\r
+ UDP->UDP_RST_EP |= (1 << bEndpoint);\r
+ UDP->UDP_RST_EP &= ~(1 << bEndpoint);\r
+\r
+ /* Configure endpoint */\r
+ SET_CSR(bEndpoint, (uint32_t)UDP_CSR_EPEDS\r
+ | (bType << 8) | (bEndpointDir << 10));\r
+ if (bType != USBEndpointDescriptor_CONTROL) {\r
+\r
+ }\r
+ else {\r
+\r
+ UDP->UDP_IER = (1 << bEndpoint);\r
+ }\r
+\r
+ TRACE_INFO_WP("CfgEp%d ", bEndpoint);\r
+ return bEndpoint;\r
+}\r
+\r
+/**\r
+ * Set callback for a USB endpoint for transfer (read/write).\r
+ *\r
+ * \param bEP Endpoint number.\r
+ * \param fCallback Optional callback function to invoke when the transfer is\r
+ * complete.\r
+ * \param pCbData Optional pointer to data to the callback function.\r
+ * \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED if endpoint is busy.\r
+ */\r
+uint8_t USBD_HAL_SetTransferCallback(uint8_t bEP,\r
+ TransferCallback fCallback,\r
+ void *pCbData)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEP]);\r
+ TransferHeader *pTransfer = (TransferHeader*)&(pEndpoint->transfer);\r
+ /* Check that the endpoint is not transferring */\r
+ if (pEndpoint->state > UDP_ENDPOINT_IDLE) {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ TRACE_DEBUG_WP("sXfrCb ");\r
+ /* Setup the transfer callback and extension data */\r
+ pTransfer->fCallback = (void*)fCallback;\r
+ pTransfer->pArgument = pCbData;\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Configure an endpoint to use multi-buffer-list transfer mode.\r
+ * The buffers can be added by _Read/_Write function.\r
+ * \param pMbList Pointer to a multi-buffer list used, NULL to disable MBL.\r
+ * \param mblSize Multi-buffer list size (number of buffers can be queued)\r
+ * \param startOffset When number of buffer achieve this offset transfer start\r
+ */\r
+uint8_t USBD_HAL_SetupMblTransfer( uint8_t bEndpoint,\r
+ USBDTransferBuffer* pMbList,\r
+ uint16_t mblSize,\r
+ uint16_t startOffset)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pXfr = (MblTransfer*)&(pEndpoint->transfer);\r
+ uint16_t i;\r
+ /* Check that the endpoint is not transferring */\r
+ if (pEndpoint->state > UDP_ENDPOINT_IDLE) {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ TRACE_DEBUG_WP("sMblXfr ");\r
+ /* Enable Multi-Buffer Transfer List */\r
+ if (pMbList) {\r
+ /* Reset list items */\r
+ for (i = 0; i < mblSize; i --) {\r
+ pMbList[i].pBuffer = NULL;\r
+ pMbList[i].size = 0;\r
+ pMbList[i].transferred = 0;\r
+ pMbList[i].buffered = 0;\r
+ pMbList[i].remaining = 0;\r
+ }\r
+ /* Setup transfer */\r
+ pXfr->transType = 1;\r
+ pXfr->listState = 0; /* OK */\r
+ pXfr->listSize = mblSize;\r
+ pXfr->pMbl = pMbList;\r
+ pXfr->outCurr = pXfr->outLast = 0;\r
+ pXfr->inCurr = 0;\r
+ pXfr->offsetSize = startOffset;\r
+ }\r
+ /* Disable Multi-Buffer Transfer */\r
+ else {\r
+ pXfr->transType = 0;\r
+ pXfr->pMbl = NULL;\r
+ pXfr->listSize = 0;\r
+ pXfr->offsetSize = 1;\r
+ }\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+uint8_t USBD_HAL_Write( uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ if (endpoints[bEndpoint].transfer.transHdr.transType)\r
+ return UDP_AddWr(bEndpoint, pData, dLength);\r
+ else\r
+ return UDP_Write(bEndpoint, pData, dLength);\r
+}\r
+\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint8_t USBD_HAL_Read(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength)\r
+{\r
+ if (endpoints[bEndpoint].transfer.transHdr.transType)\r
+ return USBD_STATUS_SW_NOT_SUPPORTED;\r
+ else\r
+ return UDP_Read(bEndpoint, pData, dLength);\r
+}\r
+\r
+/**\r
+ * \brief Enable Pull-up, connect.\r
+ *\r
+ * -# Enable HW access if needed\r
+ * -# Enable Pull-Up\r
+ * -# Disable HW access if needed\r
+ */\r
+void USBD_HAL_Connect(void)\r
+{\r
+ uint8_t dis = UDP_EnablePeripheralClock();\r
+ UDP->UDP_TXVC |= UDP_TXVC_PUON;\r
+ if (dis) UDP_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * \brief Disable Pull-up, disconnect.\r
+ *\r
+ * -# Enable HW access if needed\r
+ * -# Disable PULL-Up\r
+ * -# Disable HW access if needed\r
+ */\r
+void USBD_HAL_Disconnect(void)\r
+{\r
+ uint8_t dis = UDP_EnablePeripheralClock();\r
+ UDP->UDP_TXVC &= ~(uint32_t)UDP_TXVC_PUON;\r
+ if (dis) UDP_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * Starts a remote wake-up procedure.\r
+ */\r
+void USBD_HAL_RemoteWakeUp(void)\r
+{\r
+ UDP_EnablePeripheralClock();\r
+ UDP_EnableUsbClock();\r
+ UDP_EnableTransceiver();\r
+\r
+ TRACE_INFO_WP("RWUp ");\r
+\r
+ // Activates a remote wakeup (edge on ESR), then clear ESR\r
+ UDP->UDP_GLB_STAT |= UDP_GLB_STAT_ESR;\r
+ UDP->UDP_GLB_STAT &= ~(uint32_t)UDP_GLB_STAT_ESR;\r
+}\r
+\r
+/**\r
+ * Sets the device address to the given value.\r
+ * \param address New device address.\r
+ */\r
+void USBD_HAL_SetAddress(uint8_t address)\r
+{\r
+ /* Set address */\r
+ UDP->UDP_FADDR = UDP_FADDR_FEN | (address & UDP_FADDR_FADD_Msk);\r
+ /* If the address is 0, the device returns to the Default state */\r
+ if (address == 0) UDP->UDP_GLB_STAT = 0;\r
+ /* If the address is non-zero, the device enters the Address state */\r
+ else UDP->UDP_GLB_STAT = UDP_GLB_STAT_FADDEN;\r
+}\r
+\r
+/**\r
+ * Sets the current device configuration.\r
+ * \param cfgnum - Configuration number to set.\r
+ */\r
+void USBD_HAL_SetConfiguration(uint8_t cfgnum)\r
+{\r
+ /* If the configuration number if non-zero, the device enters the\r
+ Configured state */\r
+ if (cfgnum != 0) UDP->UDP_GLB_STAT |= UDP_GLB_STAT_CONFG;\r
+ /* If the configuration number is zero, the device goes back to the Address\r
+ state */\r
+ else {\r
+ UDP->UDP_GLB_STAT = UDP_FADDR_FEN;\r
+ }\r
+}\r
+\r
+/**\r
+ * Initializes the USB HW Access driver.\r
+ */\r
+void USBD_HAL_Init(void)\r
+{\r
+ /* Must before USB & TXVC access! */\r
+ UDP_EnablePeripheralClock();\r
+\r
+ /* Reset & disable endpoints */\r
+ USBD_HAL_ResetEPs(0xFFFFFFFF, USBD_STATUS_RESET, 0);\r
+\r
+ /* Configure the pull-up on D+ and disconnect it */\r
+ UDP->UDP_TXVC &= ~(uint32_t)UDP_TXVC_PUON;\r
+\r
+ UDP_EnableUsbClock();\r
+\r
+ UDP->UDP_IDR = 0xFE;\r
+ UDP->UDP_IER = UDP_IER_WAKEUP;\r
+}\r
+\r
+/**\r
+ * Causes the given endpoint to acknowledge the next packet it receives\r
+ * with a STALL handshake except setup request.\r
+ * \param bEP Endpoint number.\r
+ * \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED.\r
+ */\r
+uint8_t USBD_HAL_Stall(uint8_t bEP)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEP]);\r
+\r
+ /* Check that endpoint is in Idle state */\r
+ if (pEndpoint->state != UDP_ENDPOINT_IDLE) {\r
+ TRACE_WARNING("UDP_Stall: EP%d locked\n\r", bEP);\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ /* STALL endpoint */\r
+ SET_CSR(bEP, UDP_CSR_FORCESTALL);\r
+ TRACE_DEBUG_WP("Stall%d ", bEP);\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sets/Clear/Get the HALT state on the endpoint.\r
+ * In HALT state, the endpoint should keep stalling any packet.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param ctl Control code CLR/HALT/READ.\r
+ * 0: Clear HALT state;\r
+ * 1: Set HALT state;\r
+ * .: Return HALT status.\r
+ * \return USBD_STATUS_INVALID_PARAMETER if endpoint not exist,\r
+ * otherwise endpoint halt status.\r
+ */\r
+uint8_t USBD_HAL_Halt(uint8_t bEndpoint, uint8_t ctl)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ uint8_t status = 0;\r
+\r
+ /* SET Halt */\r
+ if (ctl == 1) {\r
+ /* Check that endpoint is enabled and not already in Halt state */\r
+ if ((pEndpoint->state != UDP_ENDPOINT_DISABLED)\r
+ && (pEndpoint->state != UDP_ENDPOINT_HALTED)) {\r
+\r
+ TRACE_DEBUG_WP("Halt%d ", bEndpoint);\r
+\r
+ /* Abort the current transfer if necessary */\r
+ UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);\r
+\r
+ /* Put endpoint into Halt state */\r
+ SET_CSR(bEndpoint, UDP_CSR_FORCESTALL);\r
+ pEndpoint->state = UDP_ENDPOINT_HALTED;\r
+\r
+ /* Enable the endpoint interrupt */\r
+ UDP->UDP_IER = 1 << bEndpoint;\r
+ }\r
+ }\r
+ /* CLEAR Halt */\r
+ else if (ctl == 0) {\r
+ /* Check if the endpoint is halted */\r
+ //if (pEndpoint->state != UDP_ENDPOINT_DISABLED) {\r
+ if (pEndpoint->state == UDP_ENDPOINT_HALTED) {\r
+\r
+ TRACE_DEBUG_WP("Unhalt%d ", bEndpoint);\r
+\r
+ /* Return endpoint to Idle state */\r
+ pEndpoint->state = UDP_ENDPOINT_IDLE;\r
+\r
+ /* Clear FORCESTALL flag */\r
+ CLEAR_CSR(bEndpoint, UDP_CSR_FORCESTALL);\r
+\r
+ /* Reset Endpoint Fifos, beware this is a 2 steps operation */\r
+ UDP->UDP_RST_EP |= 1 << bEndpoint;\r
+ UDP->UDP_RST_EP &= ~(1 << bEndpoint);\r
+ }\r
+ }\r
+\r
+ /* Return Halt status */\r
+ if (pEndpoint->state == UDP_ENDPOINT_HALTED) {\r
+ status = 1;\r
+ }\r
+ return( status );\r
+}\r
+\r
+/**\r
+ * Indicates if the device is running in high or full-speed. Always returns 0\r
+ * since UDP does not support high-speed mode.\r
+ */\r
+uint8_t USBD_HAL_IsHighSpeed(void)\r
+{\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Suspend USB Device HW Interface\r
+ *\r
+ * -# Disable transceiver\r
+ * -# Disable USB Clock\r
+ * -# Disable USB Peripheral\r
+ */\r
+void USBD_HAL_Suspend(void)\r
+{\r
+ /* The device enters the Suspended state */\r
+ UDP_DisableTransceiver();\r
+ UDP_DisableUsbClock();\r
+ UDP_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * Activate USB Device HW Interface\r
+ * -# Enable USB Peripheral\r
+ * -# Enable USB Clock\r
+ * -# Enable transceiver\r
+ */\r
+void USBD_HAL_Activate(void)\r
+{\r
+ UDP_EnablePeripheralClock();\r
+ UDP_EnableUsbClock();\r
+ UDP_EnableTransceiver();\r
+}\r
+\r
+/**\r
+ * Certification test for High Speed device.\r
+ * \param bIndex Test to be done\r
+ */\r
+void USBD_HAL_Test( uint8_t bIndex )\r
+{\r
+ bIndex = bIndex;\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+\r
+ \file\r
+\r
+ \section Purpose\r
+\r
+ Implementation of USB device functions on a UDP controller.\r
+\r
+ See \ref usbd_api_method USBD API Methods.\r
+*/\r
+\r
+/** \addtogroup usbd_hal\r
+ *@{*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include "chip.h"\r
+#include "USBD_HAL.h"\r
+\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#define DMA\r
+\r
+/** Maximum number of endpoints interrupts. */\r
+#define NUM_IT_MAX \\r
+ (UDPHS->UDPHS_IPFEATURES & UDPHS_IPFEATURES_EPT_NBR_MAX_Msk)\r
+/** Maximum number of endpoint DMA interrupts */\r
+#define NUM_IT_MAX_DMA \\r
+ ((UDPHS->UDPHS_IPFEATURES \\r
+ & UDPHS_IPFEATURES_DMA_CHANNEL_NBR_Msk) \\r
+ >>UDPHS_IPFEATURES_DMA_CHANNEL_NBR_Pos)\r
+/** Bits that should be shifted to access DMA control bits. */\r
+#define SHIFT_DMA 24\r
+/** Bits that should be shifted to access interrupt bits. */\r
+#define SHIFT_INTERUPT 8\r
+\r
+/** Max size of the FMA FIFO */\r
+#define DMA_MAX_FIFO_SIZE (65536/1)\r
+/** fifo space size in DW */\r
+#define EPT_VIRTUAL_SIZE 16384\r
+\r
+/**\r
+ * \section endpoint_states_sec "UDP Endpoint states"\r
+ *\r
+ * This page lists the endpoint states.\r
+ *\r
+ * \subsection States\r
+ * - UDPHS_ENDPOINT_DISABLED\r
+ * - UDPHS_ENDPOINT_HALTED\r
+ * - UDPHS_ENDPOINT_IDLE\r
+ * - UDPHS_ENDPOINT_SENDING\r
+ * - UDPHS_ENDPOINT_RECEIVING\r
+ * - UDPHS_ENDPOINT_SENDINGM\r
+ * - UDPHS_ENDPOINT_RECEIVINGM\r
+ */\r
+\r
+/** Endpoint states: Endpoint is disabled */\r
+#define UDPHS_ENDPOINT_DISABLED 0\r
+/** Endpoint states: Endpoint is halted (i.e. STALLs every request) */\r
+#define UDPHS_ENDPOINT_HALTED 1\r
+/** Endpoint states: Endpoint is idle (i.e. ready for transmission) */\r
+#define UDPHS_ENDPOINT_IDLE 2\r
+/** Endpoint states: Endpoint is sending data */\r
+#define UDPHS_ENDPOINT_SENDING 3\r
+/** Endpoint states: Endpoint is receiving data */\r
+#define UDPHS_ENDPOINT_RECEIVING 4\r
+/** Endpoint states: Endpoint is sending MBL */\r
+#define UDPHS_ENDPOINT_SENDINGM 5\r
+/** Endpoint states: Endpoint is receiving MBL */\r
+#define UDPHS_ENDPOINT_RECEIVINGM 6\r
+\r
+/** Get Number of buffer in Multi-Buffer-List\r
+ * \param i input index\r
+ * \param o output index\r
+ * \param size list size\r
+ */\r
+#define MBL_NbBuffer(i, o, size) (((i)>(o))?((i)-(o)):((i)+(size)-(o)))\r
+\r
+/** Buffer list is full */\r
+#define MBL_FULL 1\r
+/** Buffer list is null */\r
+#define MBL_NULL 2\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Describes header for UDP endpoint transfer. */\r
+typedef struct {\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ void* fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void* pArgument;\r
+ /** Transfer type */\r
+ uint8_t transType;\r
+ /* Reserved to 32-b aligned */\r
+ uint8_t reserved[3];\r
+} TransferHeader;\r
+\r
+/** Describes a transfer on a UDP endpoint. */\r
+typedef struct {\r
+\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ TransferCallback fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void *pArgument;\r
+ /** Transfer type */\r
+ uint8_t transType;\r
+ uint8_t reserved[3];\r
+ /** Number of bytes which have been written into the UDP internal FIFO\r
+ * buffers. */\r
+ int32_t buffered;\r
+ /** Pointer to a data buffer used for emission/reception. */\r
+ uint8_t *pData;\r
+ /** Number of bytes which have been sent/received. */\r
+ int32_t transferred;\r
+ /** Number of bytes which have not been buffered/transferred yet. */\r
+ int32_t remaining;\r
+} Transfer;\r
+\r
+/** Describes Multi Buffer List transfer on a UDP endpoint. */\r
+typedef struct {\r
+ /** Optional callback to invoke when the transfer completes. */\r
+ MblTransferCallback fCallback;\r
+ /** Optional argument to the callback function. */\r
+ void *pArgument;\r
+ /** Transfer type */\r
+ uint8_t transType;\r
+ /** List state (OK, FULL, NULL) (run time) */\r
+ uint8_t listState;\r
+ /** Multi-Buffer List size */\r
+ uint16_t listSize;\r
+ /** Pointer to multi-buffer list */\r
+ USBDTransferBuffer *pMbl;\r
+ /** Offset number of buffers to start transfer */\r
+ uint16_t offsetSize;\r
+ /** Current processing buffer index (run time) */\r
+ uint16_t outCurr;\r
+ /** Loast loaded buffer index (run time) */\r
+ uint16_t outLast;\r
+ /** Current buffer for input (run time) */\r
+ uint16_t inCurr;\r
+} MblTransfer;\r
+\r
+/**\r
+ * Describes the state of an endpoint of the UDP controller.\r
+ */\r
+typedef struct {\r
+\r
+ /* CSR */\r
+ /** Current endpoint state. */\r
+ volatile uint8_t state;\r
+ /** Current reception bank (0 or 1). */\r
+ volatile uint8_t bank;\r
+ /** Maximum packet size for the endpoint. */\r
+ volatile uint16_t size;\r
+ /** Describes an ongoing transfer (if current state is either\r
+ * UDPHS_ENDPOINT_SENDING or UDPHS_ENDPOINT_RECEIVING) */\r
+ union {\r
+ TransferHeader transHdr;\r
+ Transfer singleTransfer;\r
+ MblTransfer mblTransfer;\r
+ } transfer;\r
+ /** Special case for send a ZLP */\r
+ uint32_t sendZLP;\r
+} Endpoint;\r
+\r
+/**\r
+ * DMA Descriptor.\r
+ */\r
+typedef struct {\r
+ void *pNxtDesc;\r
+ void *pAddr;\r
+ uint32_t dwCtrl;\r
+ uint32_t dw;\r
+} UdphsDmaDescriptor;\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal variables\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** Holds the internal state for each endpoint of the UDP. */\r
+static Endpoint endpoints[CHIP_USB_NUMENDPOINTS];\r
+\r
+/** 7.1.20 Test Mode Support\r
+ * Test codes for the USB HS test mode. */\r
+static const char test_packet_buffer[] = {\r
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // JKJKJKJK * 9\r
+ 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, // JJKKJJKK * 8\r
+ 0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE, // JJJJKKKK * 8\r
+ 0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, // JJJJJJJKKKKKKK * 8\r
+ 0x7F,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD, // JJJJJJJK * 8\r
+ 0xFC,0x7E,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,0x7E // {JKKKKKKK * 10}, JK\r
+};\r
+\r
+/** Force FS mode */\r
+static const uint8_t forceUsbFS = 0;\r
+\r
+/** DMA link list */\r
+static UdphsDmaDescriptor dmaLL[5];\r
+static UdphsDmaDescriptor *pDmaLL;\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Internal Functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * Enables the clock of the UDP peripheral.\r
+ * \return 1 if peripheral status changed.\r
+ */\r
+static uint8_t UDPHS_EnablePeripheralClock(void)\r
+{\r
+ if (!PMC_IsPeriphEnabled(ID_UDPHS)) {\r
+ PMC_EnablePeripheral(ID_UDPHS);\r
+ return 1;\r
+ }\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Disables the UDP peripheral clock.\r
+ */\r
+static inline void UDPHS_DisablePeripheralClock(void)\r
+{\r
+ PMC_DisablePeripheral(ID_UDPHS);\r
+}\r
+\r
+/**\r
+ * Enables the 480MHz USB clock.\r
+ */\r
+static inline void UDPHS_EnableUsbClock(void)\r
+{\r
+ Pmc *pPmc = PMC;\r
+ /* Enable 480Mhz UPLL */\r
+ pPmc->CKGR_UCKR |= CKGR_UCKR_UPLLEN\r
+ | CKGR_UCKR_UPLLCOUNT(0x3)\r
+ | CKGR_UCKR_BIASCOUNT(0x1);\r
+ /* Wait until UPLL is locked */\r
+ while((pPmc->PMC_SR & PMC_SR_LOCKU) == 0);\r
+}\r
+\r
+/**\r
+ * Disables the 480MHz USB clock.\r
+ */\r
+static inline void UDPHS_DisableUsbClock(void)\r
+{\r
+ Pmc *pPmc = PMC;\r
+ pPmc->CKGR_UCKR &= ~(uint32_t)CKGR_UCKR_UPLLEN;\r
+}\r
+\r
+/**\r
+ * Enables the BIAS.\r
+ */\r
+static inline void UDPHS_EnableBIAS(void)\r
+{\r
+ Pmc *pPmc = PMC;\r
+ pPmc->CKGR_UCKR |= CKGR_UCKR_BIASEN;\r
+}\r
+\r
+/**\r
+ * Disables the BIAS.\r
+ */\r
+static inline void UDPHS_DisableBIAS(void)\r
+{\r
+ Pmc *pPmc = PMC;\r
+ pPmc->CKGR_UCKR &= ~(uint32_t)CKGR_UCKR_BIASEN;\r
+}\r
+\r
+/**\r
+ * Handles a completed transfer on the given endpoint, invoking the\r
+ * configured callback if any.\r
+ * \param bEndpoint Number of the endpoint for which the transfer has completed.\r
+ * \param bStatus Status code returned by the transfer operation\r
+ */\r
+static void UDPHS_EndOfTransfer(uint8_t bEndpoint, uint8_t bStatus)\r
+{\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+\r
+ /* Check that endpoint was sending or receiving data */\r
+ if ( (pEp->state == UDPHS_ENDPOINT_RECEIVING)\r
+ || (pEp->state == UDPHS_ENDPOINT_SENDING) )\r
+ {\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+ uint32_t transferred = pXfr->transferred;\r
+ uint32_t remaining = pXfr->remaining + pXfr->buffered;\r
+\r
+ TRACE_DEBUG_WP("EoT ");\r
+\r
+ if (pEp->state == UDPHS_ENDPOINT_SENDING)\r
+ pEp->sendZLP = 0;\r
+ pEp->state = UDPHS_ENDPOINT_IDLE;\r
+\r
+ pXfr->pData = 0;\r
+ pXfr->transferred = -1;\r
+ pXfr->buffered = -1;\r
+ pXfr->remaining = -1;\r
+\r
+ /* Invoke callback */\r
+ if (pXfr->fCallback)\r
+ {\r
+ pXfr->fCallback(pXfr->pArgument, bStatus, transferred, remaining);\r
+ }\r
+ else\r
+ {\r
+ TRACE_DEBUG_WP("NoCB ");\r
+ }\r
+ }\r
+ else if ( (pEp->state == UDPHS_ENDPOINT_RECEIVINGM)\r
+ || (pEp->state == UDPHS_ENDPOINT_SENDINGM) )\r
+ {\r
+ MblTransfer *pXfr = (MblTransfer*)&(pEp->transfer);\r
+\r
+ TRACE_DEBUG_WP("EoMT ");\r
+\r
+ pEp->state = UDPHS_ENDPOINT_IDLE;\r
+ pXfr->listState = 0;\r
+ pXfr->outCurr = pXfr->inCurr = pXfr->outLast = 0;\r
+ /* Invoke callback */\r
+ if (pXfr->fCallback)\r
+ {\r
+ pXfr->fCallback(pXfr->pArgument, bStatus);\r
+ }\r
+ else\r
+ {\r
+ TRACE_DEBUG_WP("NoCB ");\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * Update multi-buffer-transfer descriptors.\r
+ * \param pTransfer Pointer to instance MblTransfer.\r
+ * \param size Size of bytes that processed.\r
+ * \param forceEnd Force the buffer END.\r
+ * \return 1 if current buffer ended.\r
+ */\r
+static uint8_t UDPHS_MblUpdate(MblTransfer *pTransfer,\r
+ USBDTransferBuffer * pBi,\r
+ uint16_t size,\r
+ uint8_t forceEnd)\r
+{\r
+ /* Update transfer descriptor */\r
+ pBi->remaining -= size;\r
+ /* Check if list NULL */\r
+ if (pTransfer->listState == MBL_NULL) {\r
+ return 1;\r
+ }\r
+ /* Check if current buffer ended */\r
+ if (pBi->remaining == 0 || forceEnd || size == 0) {\r
+\r
+ /* Process to next buffer */\r
+ if ((++ pTransfer->outCurr) == pTransfer->listSize)\r
+ pTransfer->outCurr = 0;\r
+ /* Check buffer NULL case */\r
+ if (pTransfer->outCurr == pTransfer->inCurr)\r
+ pTransfer->listState = MBL_NULL;\r
+ else {\r
+ pTransfer->listState = 0;\r
+ /* Continue transfer, prepare for next operation */\r
+ pBi = &pTransfer->pMbl[pTransfer->outCurr];\r
+ pBi->buffered = 0;\r
+ pBi->transferred = 0;\r
+ pBi->remaining = pBi->size;\r
+ }\r
+ return 1;\r
+ }\r
+ return 0;\r
+}\r
+\r
+/**\r
+ * Transfers a data payload from the current tranfer buffer to the endpoint\r
+ * FIFO\r
+ * \param bEndpoint Number of the endpoint which is sending data.\r
+ */\r
+static uint8_t UDPHS_MblWriteFifo(uint8_t bEndpoint)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pTransfer = (MblTransfer*)&(pEndpoint->transfer);\r
+ USBDTransferBuffer *pBi = &(pTransfer->pMbl[pTransfer->outCurr]);\r
+ uint8_t *pFifo;\r
+ int32_t size;\r
+\r
+ volatile uint8_t * pBytes;\r
+ volatile uint8_t bufferEnd = 1;\r
+\r
+ /* Get the number of bytes to send */\r
+ size = pEndpoint->size;\r
+ if (size > pBi->remaining) size = pBi->remaining;\r
+\r
+ TRACE_DEBUG_WP("w%d.%d ", pTransfer->outCurr, size);\r
+\r
+ /* Record last accessed buffer */\r
+ pTransfer->outLast = pTransfer->outCurr;\r
+\r
+ pBytes = &(pBi->pBuffer[pBi->transferred + pBi->buffered]);\r
+ pBi->buffered += size;\r
+ bufferEnd = UDPHS_MblUpdate(pTransfer, pBi, size, 0);\r
+\r
+ /* Write packet in the FIFO buffer */\r
+ pFifo = (uint8_t*)((uint32_t*)UDPHS_RAM_ADDR\r
+ + (EPT_VIRTUAL_SIZE * bEndpoint));\r
+ if (size) {\r
+ int32_t c8 = size >> 3;\r
+ int32_t c1 = size & 0x7;\r
+ for (; c8; c8 --) {\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+ *(pFifo++) = *(pBytes ++);\r
+ }\r
+ for (; c1; c1 --) {\r
+ *(pFifo++) = *(pBytes ++);\r
+ }\r
+ }\r
+ return bufferEnd;\r
+}\r
+\r
+#if 0\r
+/**\r
+ * Transfers a data payload from an endpoint FIFO to the current transfer\r
+ * buffer, if NULL packet received, the current buffer is ENDed.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param wPacketSize Size of received data packet */\r
+ * \return 1 if the buffer ENDed. */\r
+ */\r
+static uint8_t UDPHS_MblReadFifo(uint8_t bEndpoint, uint16_t wPacketSize)\r
+{\r
+ \r
+ return 0;\r
+}\r
+*/\r
+#endif\r
+/**\r
+ * Transfers a data payload from the current tranfer buffer to the endpoint\r
+ * FIFO\r
+ * \param bEndpoint Number of the endpoint which is sending data.\r
+ */\r
+static void UDPHS_WritePayload(uint8_t bEndpoint, int32_t size)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+ uint8_t *pFifo;\r
+\r
+ /* Get the number of bytes to send */\r
+ if (size > pTransfer->remaining)\r
+ {\r
+ size = pTransfer->remaining;\r
+ }\r
+\r
+ /* Update transfer descriptor information */\r
+ pTransfer->buffered += size;\r
+ pTransfer->remaining -= size;\r
+\r
+ /* Write packet in the FIFO buffer */\r
+ pFifo = (uint8_t*)((uint32_t*)UDPHS_RAM_ADDR\r
+ + (EPT_VIRTUAL_SIZE * bEndpoint));\r
+ for (; size; size --)\r
+ {\r
+ *(pFifo ++) = *(pTransfer->pData ++);\r
+ }\r
+}\r
+\r
+/**\r
+ * Transfers a data payload from an endpoint FIFO to the current transfer buffer\r
+ * \param bEndpoint Endpoint number.\r
+ * \param wPacketSize Size of received data packet\r
+ */\r
+static void UDPHS_ReadPayload(uint8_t bEndpoint, int32_t wPacketSize)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ Transfer *pTransfer = (Transfer*)&(pEndpoint->transfer);\r
+ uint8_t *pFifo;\r
+\r
+ /* Check that the requested size is not bigger than the remaining transfer */\r
+ if (wPacketSize > pTransfer->remaining) {\r
+\r
+ pTransfer->buffered += wPacketSize - pTransfer->remaining;\r
+ wPacketSize = pTransfer->remaining;\r
+ }\r
+\r
+ /* Update transfer descriptor information */\r
+ pTransfer->remaining -= wPacketSize;\r
+ pTransfer->transferred += wPacketSize;\r
+\r
+ /* Retrieve packet */\r
+ pFifo = (uint8_t*)((uint32_t*)UDPHS_RAM_ADDR\r
+ + (EPT_VIRTUAL_SIZE * bEndpoint));\r
+ while (wPacketSize > 0)\r
+ {\r
+ *(pTransfer->pData ++) = *(pFifo ++);\r
+ wPacketSize--;\r
+ }\r
+}\r
+\r
+/**\r
+ * Received SETUP packet from endpoint 0 FIFO\r
+ * \param pRequest Generic USB SETUP request sent over Control endpoints\r
+ */\r
+static void UDPHS_ReadRequest(USBGenericRequest *pRequest)\r
+{\r
+ uint32_t *pData = (uint32_t *)pRequest;\r
+ volatile uint32_t *pFifo;\r
+ pFifo = (volatile uint32_t*)UDPHS_RAM_ADDR;\r
+ *pData ++ = *pFifo;\r
+ pFifo = (volatile uint32_t*)UDPHS_RAM_ADDR;\r
+ *pData = *pFifo;\r
+ //printf("REQ: %08x %08x\n\r", pData[0], pData[1]);\r
+}\r
+\r
+/**\r
+ * Endpoint interrupt handler.\r
+ * Handle IN/OUT transfers, received SETUP packets and STALLing\r
+ * \param bEndpoint Index of endpoint\r
+ */\r
+static void UDPHS_EndpointHandler(uint8_t bEndpoint)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pEpt = &pUdp->UDPHS_EPT[bEndpoint];\r
+ //UdphsDma *pDma = &pUdp->UDPHS_DMA[bEndpoint];\r
+\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+ //MblTransfer *pMblt = (MblTransfer*)&(pEp->transfer);\r
+ uint32_t status = pEpt->UDPHS_EPTSTA;\r
+ uint32_t type = pEpt->UDPHS_EPTCFG & UDPHS_EPTCFG_EPT_TYPE_Msk;\r
+ uint32_t reqBuf[2];\r
+ USBGenericRequest *pReq = (USBGenericRequest *)reqBuf;\r
+ uint16_t wPktSize;\r
+\r
+ TRACE_DEBUG_WP("Ep%d ", bEndpoint);\r
+ //TRACE_DEBUG_WP("St:%x ", status);\r
+\r
+ /* IN packet sent */\r
+ if ( (pEpt->UDPHS_EPTCTL & UDPHS_EPTCTL_TX_PK_RDY)\r
+ && (0 == (status & UDPHS_EPTSTA_TX_PK_RDY)) )\r
+ {\r
+ TRACE_DEBUG_WP("Wr ");\r
+\r
+ /* Multi-buffer-list transfer state */\r
+ if ( pEp->state == UDPHS_ENDPOINT_SENDINGM )\r
+ {\r
+ }\r
+ /* Sending state */\r
+ else if ( pEp->state == UDPHS_ENDPOINT_SENDING )\r
+ {\r
+ if (pXfr->buffered)\r
+ {\r
+ pXfr->transferred += pXfr->buffered;\r
+ pXfr->buffered = 0;\r
+ }\r
+ if ( pXfr->buffered == 0\r
+ && pXfr->transferred == 0\r
+ && pXfr->remaining == 0\r
+ && pEp->sendZLP == 0 )\r
+ {\r
+ pEp->sendZLP = 1;\r
+ }\r
+\r
+ /* End of Xfr ? */\r
+ if ( pXfr->remaining\r
+ || pEp->sendZLP == 1)\r
+ {\r
+ pEp->sendZLP = 2;\r
+\r
+ /* Transfer remaining */\r
+ TRACE_DEBUG_WP("%d ", pEp->size);\r
+ /* Send next packet */\r
+ UDPHS_WritePayload(bEndpoint, pEp->size);\r
+ pEpt->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_TX_PK_RDY;\r
+ }\r
+ else\r
+ {\r
+ TRACE_DEBUG_WP("l%d ", pXfr->transferred);\r
+ /* Disable interrupt on none-control EP */\r
+ if (type != UDPHS_EPTCFG_EPT_TYPE_CTRL8)\r
+ {\r
+ pUdp->UDPHS_IEN &= ~(UDPHS_IEN_EPT_0 << bEndpoint);\r
+ }\r
+ pEpt->UDPHS_EPTCTLDIS = UDPHS_EPTCTLDIS_TX_PK_RDY;\r
+\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ pEp->sendZLP = 0;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ TRACE_DEBUG("Err Wr %d\n\r", pEp->sendZLP);\r
+ }\r
+ }\r
+ /* OUT packet received */\r
+ if ( UDPHS_EPTSTA_RX_BK_RDY & status )\r
+ {\r
+ TRACE_DEBUG_WP("Rd ");\r
+\r
+ /* NOT in receiving state */\r
+ if (pEp->state != UDPHS_ENDPOINT_RECEIVING)\r
+ {\r
+ /* Check if ACK received on a Control EP */\r
+ if ( (UDPHS_EPTCFG_EPT_TYPE_CTRL8 == type)\r
+ && (0 == (status & UDPHS_EPTSTA_BYTE_COUNT_Msk)) )\r
+ {\r
+ TRACE_DEBUG_WP("Ack ");\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_RX_BK_RDY;\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+ /* data has been STALLed */\r
+ else if (UDPHS_EPTSTA_FRCESTALL & status)\r
+ {\r
+ TRACE_DEBUG_WP("Discard ");\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_RX_BK_RDY;\r
+ }\r
+ /* NAK the data */\r
+ else\r
+ {\r
+ TRACE_DEBUG_WP("Nak ");\r
+ pUdp->UDPHS_IEN &= ~(UDPHS_IEN_EPT_0 << bEndpoint);\r
+ }\r
+ }\r
+ /* In read state */\r
+ else\r
+ {\r
+ wPktSize = (uint16_t)((status & UDPHS_EPTSTA_BYTE_COUNT_Msk) >> UDPHS_EPTSTA_BYTE_COUNT_Pos);\r
+\r
+ TRACE_DEBUG_WP("%d ", wPktSize);\r
+ UDPHS_ReadPayload(bEndpoint, wPktSize);\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_RX_BK_RDY;\r
+ /* Check if transfer is finished */\r
+ if (pXfr->remaining == 0 || wPktSize < pEp->size)\r
+ {\r
+ pEpt->UDPHS_EPTCTLDIS = UDPHS_EPTCTLDIS_RX_BK_RDY;\r
+\r
+ /* Disable interrupt if not control EP */\r
+ if (UDPHS_EPTCFG_EPT_TYPE_CTRL8 != type)\r
+ {\r
+ pUdp->UDPHS_IEN &= ~(UDPHS_IEN_EPT_0 << bEndpoint);\r
+ }\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+ }\r
+ }\r
+ /* STALL sent */\r
+ if ( UDPHS_EPTSTA_STALL_SNT & status )\r
+ {\r
+ /* Acknowledge */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_STALL_SNT;\r
+\r
+ /* ISO error */\r
+ if (type == UDPHS_EPTCFG_EPT_TYPE_ISO)\r
+ {\r
+ TRACE_WARNING("IsoE[%d]\n\r", bEndpoint);\r
+\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);\r
+ }\r
+ /* If EP is not halted, clear STALL */\r
+ else\r
+ {\r
+ TRACE_WARNING("Stall[%d]\n\r", bEndpoint);\r
+\r
+ if (pEp->state != UDPHS_ENDPOINT_HALTED)\r
+ {\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_FRCESTALL;\r
+ }\r
+ }\r
+ }\r
+ /* SETUP packet received */\r
+ if ( UDPHS_EPTSTA_RX_SETUP & status )\r
+ {\r
+ /* If a transfer was pending, complete it\r
+ Handles the case where during the status phase of a control write\r
+ transfer, the host receives the device ZLP and ack it, but the ack\r
+ is not received by the device */\r
+ if (pEp->state == UDPHS_ENDPOINT_RECEIVING\r
+ || pEp->state == UDPHS_ENDPOINT_RECEIVINGM\r
+ || pEp->state == UDPHS_ENDPOINT_SENDING\r
+ || pEp->state == UDPHS_ENDPOINT_SENDINGM)\r
+ {\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);\r
+ }\r
+\r
+ /* ISO Err Flow */\r
+ if (type == UDPHS_EPTCFG_EPT_TYPE_ISO)\r
+ {\r
+ TRACE_WARNING("IsoFE[%d]\n\r", bEndpoint);\r
+ /* Acknowledge setup packet */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_RX_SETUP;\r
+ }\r
+ else\r
+ {\r
+ TRACE_DEBUG_WP("Stup ");\r
+ \r
+ /* Copy setup */\r
+ UDPHS_ReadRequest(pReq);\r
+ /* Acknowledge setup packet */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_RX_SETUP;\r
+ /* Handler */\r
+ USBD_RequestHandler(bEndpoint, pReq);\r
+ }\r
+ }\r
+}\r
+#ifdef DMA\r
+/**\r
+ * DMA Single transfer\r
+ * \param bEndpoint EP number.\r
+ * \pXfr Pointer to transfer instance.\r
+ * \dwCfg DMA Control configuration (excluding length).\r
+ */\r
+static inline void UDPHS_DmaSingle(uint8_t bEndpoint, Transfer *pXfr, uint32_t dwCfg)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ /* Single transfer */\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS =\r
+ (uint32_t)&pXfr->pData[pXfr->transferred];\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;\r
+ /* Interrupt enable */\r
+ pUdp->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint);\r
+ \r
+ TRACE_DEBUG_WP("Dma[B%d:T%d] ", pXfr->buffered, pXfr->transferred);\r
+ /* DMA Configure */\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0;\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(pXfr->buffered)\r
+ | dwCfg;\r
+}\r
+/**\r
+ * Endpoint DMA interrupt handler.\r
+ * This function handles DMA interrupts.\r
+ * \param bEndpoint Index of endpoint\r
+ */\r
+static void UDPHS_DmaHandler(uint8_t bEndpoint)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ //UdphsEpt *pHwEp = &pUdp->UDPHS_EPT[bEndpoint];\r
+\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+\r
+ uint32_t dwDmaSr;\r
+ int32_t iRemain, iXfred;\r
+ uint8_t bRc = USBD_STATUS_SUCCESS;\r
+\r
+ dwDmaSr = pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;\r
+ TRACE_DEBUG_WP("iDma%d,%x ", bEndpoint, dwDmaSr);\r
+ /* Mbl transfer */\r
+ if (pEp->state == UDPHS_ENDPOINT_SENDINGM)\r
+ {\r
+ /* Not implemented */\r
+ return;\r
+ }\r
+ else if (pEp->state == UDPHS_ENDPOINT_RECEIVINGM)\r
+ {\r
+ /* Not implemented */\r
+ return;\r
+ }\r
+\r
+ /* Disable DMA interrupt to avoid receiving 2 (B_EN and TR_EN) */\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL &= ~(UDPHS_DMACONTROL_END_TR_EN\r
+ |UDPHS_DMACONTROL_END_B_EN);\r
+ if (UDPHS_DMASTATUS_END_BF_ST & dwDmaSr)\r
+ {\r
+ TRACE_DEBUG_WP("EoDmaB ");\r
+ /* BUFF_COUNT holds the number of untransmitted bytes.\r
+ BUFF_COUNT is equal to zero in case of good transfer */\r
+ iRemain = (dwDmaSr & UDPHS_DMASTATUS_BUFF_COUNT_Msk)\r
+ >> UDPHS_DMASTATUS_BUFF_COUNT_Pos;\r
+\r
+ TRACE_DEBUG_WP("C%d ", iRemain);\r
+ iXfred = pXfr->buffered - iRemain;\r
+\r
+ pXfr->transferred += iXfred;\r
+ pXfr->buffered = iRemain;\r
+ pXfr->remaining -= iXfred;\r
+\r
+ TRACE_DEBUG_WP("[B%d:T%d:R%d] ",\r
+ pXfr->buffered, pXfr->transferred, pXfr->remaining);\r
+\r
+ /* There is still data */\r
+ if (pXfr->remaining + pXfr->buffered > 0)\r
+ {\r
+ if (pXfr->remaining > DMA_MAX_FIFO_SIZE)\r
+ {\r
+ pXfr->buffered = DMA_MAX_FIFO_SIZE;\r
+ }\r
+ else\r
+ {\r
+ pXfr->buffered = pXfr->remaining;\r
+ }\r
+ /* Single transfer again */\r
+ UDPHS_DmaSingle(bEndpoint, pXfr, UDPHS_DMACONTROL_END_TR_EN\r
+ | UDPHS_DMACONTROL_END_TR_IT\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT\r
+ | UDPHS_DMACONTROL_CHANN_ENB);\r
+ }\r
+ }\r
+ else if (UDPHS_DMASTATUS_END_TR_ST & dwDmaSr)\r
+ {\r
+ TRACE_DEBUG_WP("EoDmaT ");\r
+ pXfr->transferred = pXfr->buffered -\r
+ ((dwDmaSr & UDPHS_DMASTATUS_BUFF_COUNT_Msk)\r
+ >> UDPHS_DMASTATUS_BUFF_COUNT_Pos);\r
+ pXfr->remaining = 0;\r
+\r
+ TRACE_DEBUG_WP("[B%d:T%d] ", pXfr->buffered, pXfr->transferred);\r
+ }\r
+ else\r
+ {\r
+ TRACE_ERROR("UDPHS_DmaHandler: ST 0x%X\n\r", dwDmaSr);\r
+ bRc = USBD_STATUS_ABORTED;\r
+ }\r
+ /* Callback */\r
+ if (pXfr->remaining == 0)\r
+ {\r
+ UDPHS_EndOfTransfer(bEndpoint, bRc);\r
+ }\r
+ \r
+}\r
+#endif\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param pEndpoint Pointer to Endpoint struct.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+static inline uint8_t UDPHS_Write(uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pHwEp = &pUdp->UDPHS_EPT[bEndpoint];\r
+\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+ /* Return if busy */\r
+ if (pEp->state != UDPHS_ENDPOINT_IDLE)\r
+ {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ /* Sending state */\r
+ pEp->state = UDPHS_ENDPOINT_SENDING;\r
+\r
+ TRACE_DEBUG_WP("Wr%d(%d) ", bEndpoint, dLength);\r
+ pEp->sendZLP = 0;\r
+ /* Setup transfer descriptor */\r
+ pXfr->pData = (void*) pData;\r
+ pXfr->remaining = dLength;\r
+ pXfr->buffered = 0;\r
+ pXfr->transferred = 0;\r
+\r
+ #ifdef DMA\r
+ /* 1. DMA supported, 2. Not ZLP */\r
+ if (CHIP_USB_ENDPOINTS_DMA(bEndpoint)\r
+ && pXfr->remaining > 0)\r
+ {\r
+ if (pXfr->remaining > DMA_MAX_FIFO_SIZE)\r
+ {\r
+ /* Transfer the max */\r
+ pXfr->buffered = DMA_MAX_FIFO_SIZE;\r
+ }\r
+ else\r
+ {\r
+ /* Good size */\r
+ pXfr->buffered = pXfr->remaining;\r
+ }\r
+ /* Single transfer */\r
+ UDPHS_DmaSingle(bEndpoint, pXfr, UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT\r
+ | UDPHS_DMACONTROL_CHANN_ENB);\r
+ return USBD_STATUS_SUCCESS;\r
+ }\r
+ #endif\r
+\r
+ /* Enable IT */\r
+ pUdp->UDPHS_IEN |= ( UDPHS_IEN_EPT_0 << bEndpoint );\r
+ pHwEp->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_TX_PK_RDY;\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor list,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the transfer buffer in the list has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param pEndpoint Pointer to Endpoint struct.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+static inline uint8_t UDPHS_AddWr(uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pHwEp = &pUdp->UDPHS_EPT[bEndpoint];\r
+\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ MblTransfer *pMbl = (MblTransfer*)&(pEp->transfer);\r
+ USBDTransferBuffer *pTx;\r
+\r
+ /* Check parameter */\r
+ if (dLength >= 0x10000)\r
+ {\r
+ return USBD_STATUS_INVALID_PARAMETER;\r
+ }\r
+ /* Data in process */\r
+ if (pEp->state > UDPHS_ENDPOINT_IDLE)\r
+ { /* MBL transfer */\r
+ if (pMbl->transType)\r
+ {\r
+ if (pMbl->listState == MBL_FULL)\r
+ {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ }\r
+\r
+ TRACE_DEBUG_WP("AddW%d(%d) ", bEndpoint, dLength);\r
+ /* Add buffer to buffer list and update index */\r
+ pTx = &(pMbl->pMbl[pMbl->inCurr]);\r
+ pTx->pBuffer = (uint8_t*)pData;\r
+ pTx->size = pTx->remaining = dLength;\r
+ pTx->transferred = pTx->buffered = 0;\r
+ /* Update input index */\r
+ if (pMbl->inCurr >= (pMbl->listSize-1)) pMbl->inCurr = 0;\r
+ else pMbl->inCurr ++;\r
+ if (pMbl->inCurr == pMbl->outCurr) pMbl->listState = MBL_FULL;\r
+ else pMbl->listState = 0;\r
+ /* Start sending when offset achieved */\r
+ if (MBL_NbBuffer(pMbl->inCurr, pMbl->outCurr, pMbl->listSize)\r
+ >= pMbl->offsetSize\r
+ && pEp->state == UDPHS_ENDPOINT_IDLE)\r
+ {\r
+ uint8_t nbBanks = CHIP_USB_ENDPOINTS_BANKS(bEndpoint);\r
+\r
+ /* Change state */\r
+ pEp->state = UDPHS_ENDPOINT_SENDINGM;\r
+\r
+ TRACE_DEBUG_WP("StartM ");\r
+\r
+ /* Fill data into FIFO */\r
+ for (;\r
+ nbBanks && pMbl->pMbl[pMbl->inCurr].remaining;\r
+ nbBanks --)\r
+ {\r
+ UDPHS_MblWriteFifo(bEndpoint);\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_TX_PK_RDY;\r
+ }\r
+\r
+ /* Enable interrupt */\r
+ pUdp->UDPHS_IEN |= (UDPHS_IEN_EPT_0 << bEndpoint);\r
+ pHwEp->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_TX_PK_RDY;\r
+\r
+ }\r
+\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+static inline uint8_t UDPHS_Read(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pHwEp = &pUdp->UDPHS_EPT[bEndpoint];\r
+\r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+ /* Return if busy */\r
+ if (pEp->state != UDPHS_ENDPOINT_IDLE)\r
+ {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ /* Receiving state */\r
+ pEp->state = UDPHS_ENDPOINT_RECEIVING;\r
+\r
+ TRACE_DEBUG_WP("Rd%d(%d) ", bEndpoint, dLength);\r
+ /* Setup transfer descriptor */\r
+ pXfr->pData = (void*) pData;\r
+ pXfr->remaining = dLength;\r
+ pXfr->buffered = 0;\r
+ pXfr->transferred = 0;\r
+\r
+ #ifdef DMA\r
+ /* If: 1. DMA supported, 2. Has data */\r
+ if (CHIP_USB_ENDPOINTS_DMA(bEndpoint)\r
+ && pXfr->remaining > 0)\r
+ {\r
+ /* DMA XFR size adjust */\r
+ if (pXfr->remaining > DMA_MAX_FIFO_SIZE)\r
+ pXfr->buffered = DMA_MAX_FIFO_SIZE;\r
+ else\r
+ pXfr->buffered = pXfr->remaining;\r
+ /* Single transfer */\r
+ UDPHS_DmaSingle(bEndpoint, pXfr, UDPHS_DMACONTROL_END_TR_EN\r
+ | UDPHS_DMACONTROL_END_TR_IT\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT\r
+ | UDPHS_DMACONTROL_CHANN_ENB);\r
+ return USBD_STATUS_SUCCESS;\r
+ }\r
+ #endif\r
+\r
+ /* Enable IT */\r
+ pUdp->UDPHS_IEN |= ( UDPHS_IEN_EPT_0 << bEndpoint );\r
+ pHwEp->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_RX_BK_RDY;\r
+ \r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+#if 0\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+static inline uint8_t UDPHS_AddRd(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength)\r
+{\r
+ return USBD_STATUS_SW_NOT_SUPPORTED;\r
+}\r
+#endif\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+extern void USBD_IrqHandler(void);\r
+/**\r
+ * USBD (UDP) interrupt handler\r
+ * Manages device resume, suspend, end of bus reset.\r
+ * Forwards endpoint events to the appropriate handler.\r
+ */\r
+void USBD_IrqHandler(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ uint32_t status;\r
+ uint8_t numIt;\r
+\r
+ status = pUdp->UDPHS_INTSTA;\r
+ status &= pUdp->UDPHS_IEN;\r
+\r
+ /* Handle all UDPHS interrupts */\r
+ TRACE_DEBUG_WP("\n\r%c ", USBD_HAL_IsHighSpeed() ? 'H' : 'F');\r
+ while( status )\r
+ {\r
+ /* SOF */\r
+ if (status & UDPHS_INTSTA_INT_SOF)\r
+ {\r
+ TRACE_DEBUG_WP("SOF ");\r
+ /* SOF handler */\r
+ //USBD_SofHandler();\r
+\r
+ /* Acknowledge interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_INT_SOF;\r
+ status &= ~(uint32_t)UDPHS_INTSTA_INT_SOF;\r
+ }\r
+ /* Suspend, treated last */\r
+ else if (status == UDPHS_INTSTA_DET_SUSPD)\r
+ {\r
+ TRACE_WARNING_WP("Susp ");\r
+\r
+ /* Enable wakeup */\r
+ pUdp->UDPHS_IEN |= (UDPHS_IEN_WAKE_UP | UDPHS_IEN_ENDOFRSM);\r
+ pUdp->UDPHS_IEN &= ~(uint32_t)UDPHS_IEN_DET_SUSPD;\r
+\r
+ /* Acknowledge interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_DET_SUSPD | UDPHS_CLRINT_WAKE_UP;\r
+\r
+ USBD_SuspendHandler();\r
+ }\r
+ /* Resume */\r
+ else if ( (status & UDPHS_INTSTA_WAKE_UP)\r
+ || (status & UDPHS_INTSTA_ENDOFRSM) )\r
+ {\r
+ USBD_ResumeHandler();\r
+\r
+ TRACE_INFO_WP("Rsm ");\r
+\r
+ /* Acknowledge interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_WAKE_UP\r
+ | UDPHS_CLRINT_ENDOFRSM\r
+ | UDPHS_CLRINT_DET_SUSPD;\r
+\r
+ pUdp->UDPHS_IEN |= UDPHS_IEN_ENDOFRSM | UDPHS_IEN_DET_SUSPD;\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_WAKE_UP | UDPHS_CLRINT_ENDOFRSM;\r
+ pUdp->UDPHS_IEN &= ~(uint32_t)UDPHS_IEN_WAKE_UP;\r
+ }\r
+ /* Bus reset */\r
+ else if (status & UDPHS_INTSTA_ENDRESET)\r
+ {\r
+ TRACE_DEBUG_WP("EoB ");\r
+\r
+ /* Flush and enable the suspend interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_WAKE_UP | UDPHS_CLRINT_DET_SUSPD;\r
+ pUdp->UDPHS_IEN |= UDPHS_IEN_DET_SUSPD;\r
+\r
+ /* Reset handler */\r
+ USBD_ResetHandler();\r
+\r
+ /* Acknowledge interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_ENDRESET;\r
+ }\r
+ /* Upstream resume */\r
+ else if (status & UDPHS_INTSTA_UPSTR_RES)\r
+ {\r
+ TRACE_DEBUG_WP("ExtRes ");\r
+ \r
+ /* Acknowledge interrupt */\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_UPSTR_RES;\r
+ }\r
+ /* Endpoints */\r
+ else\r
+ {\r
+ #ifdef DMA\r
+ for (numIt = 0; numIt < NUM_IT_MAX; numIt ++)\r
+ {\r
+ if (status & (1 << SHIFT_DMA << numIt))\r
+ {\r
+ UDPHS_DmaHandler(numIt);\r
+ }\r
+ else if (status & (UDPHS_INTSTA_EPT_0 << numIt))\r
+ {\r
+ UDPHS_EndpointHandler(numIt);\r
+ }\r
+ }\r
+ #else\r
+ for (numIt = 0; numIt < NUM_IT_MAX; numIt ++)\r
+ {\r
+ if (status & (UDPHS_INTSTA_EPT_0 << numIt))\r
+ {\r
+ UDPHS_EndpointHandler(numIt);\r
+ }\r
+ }\r
+ #endif\r
+ }\r
+\r
+ /* Update interrupt status */\r
+ status = pUdp->UDPHS_INTSTA;\r
+ status &= pUdp->UDPHS_IEN;\r
+\r
+ TRACE_DEBUG_WP("\n\r");\r
+ if (status)\r
+ {\r
+ TRACE_DEBUG_WP(" - ");\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * \brief Reset endpoints and disable them.\r
+ * -# Terminate transfer if there is any, with given status;\r
+ * -# Reset the endpoint & disable it.\r
+ * \param bmEPs Bitmap for endpoints to reset.\r
+ * \param bStatus Status passed to terminate transfer on endpoint.\r
+ * \param bKeepCfg 1 to keep old endpoint configuration.\r
+ * \note Use USBD_HAL_ConfigureEP() to configure and enable endpoint\r
+ if not keeping old configuration.\r
+ * \sa USBD_HAL_ConfigureEP().\r
+ */\r
+void USBD_HAL_ResetEPs(uint32_t bmEPs, uint8_t bStatus, uint8_t bKeepCfg)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pHwEp;\r
+\r
+ Endpoint *pEndpoint;\r
+ uint32_t tmp = bmEPs & ((1<<CHIP_USB_NUMENDPOINTS)-1);\r
+ uint8_t ep;\r
+ uint32_t epBit, epCfg;\r
+\r
+ for (ep = 0, epBit = 1; ep < CHIP_USB_NUMENDPOINTS; ep ++)\r
+ {\r
+ if (tmp & epBit)\r
+ {\r
+ pHwEp = &pUdp->UDPHS_EPT[ep];\r
+\r
+ /* Disable ISR */\r
+ pUdp->UDPHS_IEN &= ~(epBit << SHIFT_INTERUPT);\r
+ /* Kill pending Banks ?? */\r
+ #if 0\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ #endif\r
+ \r
+ /* Reset transfer information */\r
+ pEndpoint = &(endpoints[ep]);\r
+ /* Reset endpoint state */\r
+ pEndpoint->bank = 0;\r
+ /* Endpoint configure */\r
+ epCfg = pHwEp->UDPHS_EPTCFG;\r
+ /* Reset endpoint */\r
+ pUdp->UDPHS_EPTRST = epBit;\r
+ /* Restore configure */\r
+ if (bKeepCfg)\r
+ {\r
+ pHwEp->UDPHS_EPTCFG = epCfg;\r
+ }\r
+ else\r
+ {\r
+ pEndpoint->state = UDPHS_ENDPOINT_DISABLED;\r
+ }\r
+\r
+ /* Terminate transfer on this EP */\r
+ UDPHS_EndOfTransfer(ep, bStatus);\r
+ }\r
+ epBit <<= 1;\r
+ }\r
+}\r
+\r
+/**\r
+ * Cancel pending READ/WRITE\r
+ * \param bmEPs Bitmap for endpoints to reset.\r
+ * \note EP callback is invoked with USBD_STATUS_CANCELED.\r
+ */\r
+void USBD_HAL_CancelIo(uint32_t bmEPs)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ //UdphsEpt *pHwEp = NULL;\r
+\r
+ uint32_t tmp = bmEPs & ((1<<CHIP_USB_NUMENDPOINTS)-1);\r
+ uint8_t ep;\r
+ uint32_t epBit;\r
+ for (ep = 0, epBit = 1; ep < CHIP_USB_NUMENDPOINTS; ep ++)\r
+ {\r
+ if (tmp & epBit)\r
+ {\r
+ //pHwEp = &pUdp->UDPHS_EPT[ep];\r
+\r
+ /* Disable ISR */\r
+ pUdp->UDPHS_IEN &= ~(epBit << SHIFT_INTERUPT);\r
+ /* Kill pending Banks ?? */\r
+ #if 0\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ pHwEp->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_KILL_BANK;\r
+ #endif\r
+\r
+ /* Terminate transfer on this EP */\r
+ UDPHS_EndOfTransfer(ep, USBD_STATUS_CANCELED);\r
+ }\r
+ epBit <<= 1;\r
+ }\r
+}\r
+\r
+/**\r
+ * Configures an endpoint according to its endpoint Descriptor.\r
+ * \param pDescriptor Pointer to an endpoint descriptor.\r
+ * \return The endpoint address.\r
+ */\r
+uint8_t USBD_HAL_ConfigureEP(const USBEndpointDescriptor *pDescriptor)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pEpt;\r
+ //UdphsDma *pDma;\r
+\r
+ Endpoint *pEndpoint;\r
+ uint8_t bEndpoint;\r
+ uint8_t bType;\r
+ uint8_t bEndpointDir;\r
+ //uint8_t bInterval = 0;\r
+ uint8_t bNbTrans = 1;\r
+ uint8_t bSizeEpt = 0;\r
+ uint8_t bHs = ((pUdp->UDPHS_INTSTA & UDPHS_INTSTA_SPEED) > 0);\r
+\r
+ /* NULL descriptor -> Control endpoint 0 */\r
+ if (pDescriptor == 0)\r
+ {\r
+\r
+ bEndpoint = 0;\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ pEpt = &(pUdp->UDPHS_EPT[0]);\r
+ bType = USBEndpointDescriptor_CONTROL;\r
+ bEndpointDir = 0;\r
+ pEndpoint->size = CHIP_USB_ENDPOINTS_MAXPACKETSIZE(0);\r
+ pEndpoint->bank = CHIP_USB_ENDPOINTS_BANKS(0);\r
+ }\r
+ /* Device descriptor -> Control endpoint 0 */\r
+ else if (pDescriptor->bDescriptorType == USBGenericDescriptor_DEVICE)\r
+ {\r
+ USBDeviceDescriptor *pDevDesc = (USBDeviceDescriptor*)pDescriptor;\r
+ bEndpoint = 0;\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ pEpt = &(pUdp->UDPHS_EPT[0]);\r
+ bType = USBEndpointDescriptor_CONTROL;\r
+ bEndpointDir = 0;\r
+ pEndpoint->size =pDevDesc->bMaxPacketSize0;\r
+ pEndpoint->bank = CHIP_USB_ENDPOINTS_BANKS(0);\r
+ }\r
+ /* Endpoint descriptor */\r
+ else\r
+ {\r
+ /* The endpoint number */\r
+ bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor);\r
+ pEndpoint = &(endpoints[bEndpoint]);\r
+ pEpt = &(pUdp->UDPHS_EPT[bEndpoint]);\r
+ /* Transfer type: Control, Isochronous, Bulk, Interrupt */\r
+ bType = USBEndpointDescriptor_GetType(pDescriptor);\r
+ /* interval */\r
+ //bInterval = USBEndpointDescriptor_GetInterval(pDescriptor);\r
+ /* Direction, ignored for control endpoints */\r
+ bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor);\r
+ pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor);\r
+ pEndpoint->bank = CHIP_USB_ENDPOINTS_BANKS(bEndpoint);\r
+\r
+ /* Convert descriptor value to EP configuration */\r
+ if (bHs) { /* HS Interval, *125us */\r
+\r
+ /* MPS: Bit12,11 specify NB_TRANS, as USB 2.0 Spec. */\r
+ bNbTrans = ((pEndpoint->size >> 11) & 0x3);\r
+ if (bNbTrans == 3)\r
+ bNbTrans = 1;\r
+ else\r
+ bNbTrans ++;\r
+\r
+ /* Mask, bit 10..0 is the size */\r
+ pEndpoint->size &= 0x7FF;\r
+ }\r
+ }\r
+\r
+ //TRACE_DEBUG_WP("CfgE%d ", bEndpoint);\r
+\r
+ /* Abort the current transfer is the endpoint was configured and in\r
+ Write or Read state */\r
+ if( (pEndpoint->state == UDPHS_ENDPOINT_RECEIVING)\r
+ || (pEndpoint->state == UDPHS_ENDPOINT_SENDING)\r
+ || (pEndpoint->state == UDPHS_ENDPOINT_RECEIVINGM)\r
+ || (pEndpoint->state == UDPHS_ENDPOINT_SENDINGM) ) {\r
+\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_RESET);\r
+ }\r
+ pEndpoint->state = UDPHS_ENDPOINT_IDLE;\r
+\r
+ /* Disable endpoint */\r
+ pEpt->UDPHS_EPTCTLDIS = UDPHS_EPTCTLDIS_SHRT_PCKT\r
+ | UDPHS_EPTCTLDIS_BUSY_BANK\r
+ | UDPHS_EPTCTLDIS_NAK_OUT\r
+ | UDPHS_EPTCTLDIS_NAK_IN\r
+ | UDPHS_EPTCTLDIS_STALL_SNT\r
+ | UDPHS_EPTCTLDIS_RX_SETUP\r
+ | UDPHS_EPTCTLDIS_TX_PK_RDY\r
+ | UDPHS_EPTCTLDIS_RX_BK_RDY\r
+ | UDPHS_EPTCTLDIS_ERR_OVFLW\r
+ | UDPHS_EPTCTLDIS_MDATA_RX\r
+ | UDPHS_EPTCTLDIS_DATAX_RX\r
+ | UDPHS_EPTCTLDIS_NYET_DIS\r
+ | UDPHS_EPTCTLDIS_INTDIS_DMA\r
+ | UDPHS_EPTCTLDIS_AUTO_VALID\r
+ | UDPHS_EPTCTLDIS_EPT_DISABL\r
+ ;\r
+ /* Reset Endpoint Fifos */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ | UDPHS_EPTCLRSTA_FRCESTALL;\r
+ pUdp->UDPHS_EPTRST = 1 << bEndpoint;\r
+ /* Configure endpoint size */\r
+ if( pEndpoint->size <= 8 )\r
+ bSizeEpt = 0;\r
+ else if ( pEndpoint->size <= 16 )\r
+ bSizeEpt = 1;\r
+ else if ( pEndpoint->size <= 32 )\r
+ bSizeEpt = 2;\r
+ else if ( pEndpoint->size <= 64 )\r
+ bSizeEpt = 3;\r
+ else if ( pEndpoint->size <= 128 )\r
+ bSizeEpt = 4;\r
+ else if ( pEndpoint->size <= 256 )\r
+ bSizeEpt = 5;\r
+ else if ( pEndpoint->size <= 512 )\r
+ bSizeEpt = 6;\r
+ else if ( pEndpoint->size <= 1024 )\r
+ bSizeEpt = 7;\r
+\r
+ /* Configure endpoint */\r
+ if (bType == USBEndpointDescriptor_CONTROL)\r
+ {\r
+ pUdp->UDPHS_IEN |= (UDPHS_IEN_EPT_0 << bEndpoint);\r
+ }\r
+\r
+ pEpt->UDPHS_EPTCFG = bSizeEpt \r
+ | ( bEndpointDir << 3) \r
+ | ( bType << 4) \r
+ | ((pEndpoint->bank) << 6)\r
+ | ( bNbTrans << 8)\r
+ ;\r
+\r
+ while( (UDPHS_EPTCFG_EPT_MAPD & pEpt->UDPHS_EPTCFG) == 0 ) {\r
+\r
+ /* resolved by clearing the reset IT in good place */\r
+ TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint);\r
+ TRACE_ERROR("PB bSizeEpt: 0x%X\n\r", bSizeEpt);\r
+ TRACE_ERROR("PB bEndpointDir: 0x%X\n\r", bEndpointDir);\r
+ TRACE_ERROR("PB bType: 0x%X\n\r", bType);\r
+ TRACE_ERROR("PB pEndpoint->bank: 0x%X\n\r", pEndpoint->bank);\r
+ TRACE_ERROR("PB UDPHS_EPTCFG: 0x%X\n\r", pEpt->UDPHS_EPTCFG);\r
+ for(;;);\r
+ }\r
+\r
+ if (bType == USBEndpointDescriptor_CONTROL)\r
+ {\r
+ pEpt->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_RX_BK_RDY \r
+ | UDPHS_EPTCTLENB_RX_SETUP\r
+ | UDPHS_EPTCTLENB_EPT_ENABL;\r
+ }\r
+ else\r
+ {\r
+#ifndef DMA\r
+ pEpt->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL;\r
+#else\r
+ pEpt->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_AUTO_VALID | UDPHS_EPTCTLENB_EPT_ENABL;\r
+#endif\r
+ }\r
+\r
+ //TRACE_DEBUG_WP("<%x,%x,%x> ", pEpt->UDPHS_EPTCFG, pEpt->UDPHS_EPTCTL, pEpt->UDPHS_EPTSTA);\r
+ return bEndpoint;\r
+}\r
+\r
+/**\r
+ * Set callback for a USB endpoint for transfer (read/write).\r
+ *\r
+ * \param bEP Endpoint number.\r
+ * \param fCallback Optional callback function to invoke when the transfer is\r
+ * complete.\r
+ * \param pCbData Optional pointer to data to the callback function.\r
+ * \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED if endpoint is busy.\r
+ */\r
+uint8_t USBD_HAL_SetTransferCallback(uint8_t bEP,\r
+ TransferCallback fCallback,\r
+ void *pCbData)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEP]);\r
+ TransferHeader *pTransfer = (TransferHeader*)&(pEndpoint->transfer);\r
+ /* Check that the endpoint is not transferring */\r
+ if (pEndpoint->state > UDPHS_ENDPOINT_IDLE) {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ TRACE_DEBUG_WP("sXfrCb ");\r
+ /* Setup the transfer callback and extension data */\r
+ pTransfer->fCallback = (void*)fCallback;\r
+ pTransfer->pArgument = pCbData;\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Configure an endpoint to use multi-buffer-list transfer mode.\r
+ * The buffers can be added by _Read/_Write function.\r
+ * \param pMbList Pointer to a multi-buffer list used, NULL to disable MBL.\r
+ * \param mblSize Multi-buffer list size (number of buffers can be queued)\r
+ * \param startOffset When number of buffer achieve this offset transfer start\r
+ */\r
+uint8_t USBD_HAL_SetupMblTransfer( uint8_t bEndpoint,\r
+ USBDTransferBuffer* pMbList,\r
+ uint16_t mblSize,\r
+ uint16_t startOffset)\r
+{\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ MblTransfer *pXfr = (MblTransfer*)&(pEndpoint->transfer);\r
+ uint16_t i;\r
+ /* Check that the endpoint is not transferring */\r
+ if (pEndpoint->state > UDPHS_ENDPOINT_IDLE) {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ TRACE_DEBUG_WP("sMblXfr ");\r
+ /* Enable Multi-Buffer Transfer List */\r
+ if (pMbList) {\r
+ /* Reset list items */\r
+ for (i = 0; i < mblSize; i --) {\r
+ pMbList[i].pBuffer = NULL;\r
+ pMbList[i].size = 0;\r
+ pMbList[i].transferred = 0;\r
+ pMbList[i].buffered = 0;\r
+ pMbList[i].remaining = 0;\r
+ }\r
+ /* Setup transfer */\r
+ pXfr->transType = 1;\r
+ pXfr->listState = 0; /* OK */\r
+ pXfr->listSize = mblSize;\r
+ pXfr->pMbl = pMbList;\r
+ pXfr->outCurr = pXfr->outLast = 0;\r
+ pXfr->inCurr = 0;\r
+ pXfr->offsetSize = startOffset;\r
+ }\r
+ /* Disable Multi-Buffer Transfer */\r
+ else {\r
+ pXfr->transType = 0;\r
+ pXfr->pMbl = NULL;\r
+ pXfr->listSize = 0;\r
+ pXfr->offsetSize = 1;\r
+ }\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes one or two data payloads (depending on the number of FIFO bank\r
+ * for the endpoint) and then starts the actual transfer. The operation is\r
+ * complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+uint8_t USBD_HAL_Write( uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t dLength)\r
+{\r
+ if (endpoints[bEndpoint].transfer.transHdr.transType)\r
+ return UDPHS_AddWr(bEndpoint, pData, dLength);\r
+ else\r
+ return UDPHS_Write(bEndpoint, pData, dLength);\r
+}\r
+\r
+/**\r
+ * Special write function.\r
+ * Sends data through a USB endpoint. Sets up the transfer descriptor,\r
+ * writes header and one or two data payloads (depending on the number of\r
+ * FIFO bank for the endpoint) and then starts the actual transfer. The\r
+ * operation is complete when all the data has been sent.\r
+ *\r
+ * *If the size of the buffer is greater than the size of the endpoint\r
+ * (or twice the size if the endpoint has two FIFO banks), then the buffer\r
+ * must be kept allocated until the transfer is finished*. This means that\r
+ * it is not possible to declare it on the stack (i.e. as a local variable\r
+ * of a function which returns after starting a transfer).\r
+ *\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a buffer with the data to send.\r
+ * \param dLength Size of the data buffer.\r
+ * \return USBD_STATUS_SUCCESS if the transfer has been started;\r
+ * otherwise, the corresponding error status code.\r
+ */\r
+uint8_t USBD_HAL_WrWithHdr(uint8_t bEndpoint,\r
+ const void * pHdr, uint8_t bHdrLen,\r
+ const void * pData,uint32_t dLength)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pHwEp = &pUdp->UDPHS_EPT[bEndpoint];\r
+ \r
+ Endpoint *pEp = &(endpoints[bEndpoint]);\r
+ Transfer *pXfr = (Transfer*)&(pEp->transfer);\r
+\r
+ /* Return if DMA is not supported */\r
+ if (!CHIP_USB_ENDPOINTS_DMA(bEndpoint))\r
+ {\r
+ return USBD_STATUS_HW_NOT_SUPPORTED;\r
+ }\r
+\r
+#ifdef DMA\r
+ /* Return if busy */\r
+ if (pEp->state != UDPHS_ENDPOINT_IDLE)\r
+ {\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ /* Sending state */\r
+ pEp->state = UDPHS_ENDPOINT_SENDING;\r
+ TRACE_DEBUG_WP("Wr%d(%d+%d) ", bEndpoint, bHdrLen, dLength);\r
+ //printf("Wr%d(%d+%d) ", bEndpoint, bHdrLen, dLength);\r
+\r
+ pEp->sendZLP = 0;\r
+\r
+ /* Setup transfer descriptor */\r
+ pXfr->pData = (void*) pData;\r
+ pXfr->remaining = bHdrLen + dLength;\r
+ pXfr->buffered = 0;\r
+ pXfr->transferred = 0;\r
+\r
+ /* 1. DMA supported always, 2. Not ZLP */\r
+ if (bHdrLen + dLength > 0)\r
+ {\r
+ uint8_t bNbTrans = (pHwEp->UDPHS_EPTCFG & UDPHS_EPTCFG_NB_TRANS_Msk)\r
+ >> UDPHS_EPTCFG_NB_TRANS_Pos;\r
+ if (pXfr->remaining > DMA_MAX_FIFO_SIZE)\r
+ {\r
+ /* Transfer the max */\r
+ pXfr->buffered = DMA_MAX_FIFO_SIZE;\r
+ }\r
+ else\r
+ {\r
+ /* Good size, total size */\r
+ pXfr->buffered = pXfr->remaining;\r
+ }\r
+\r
+ /* LD1: header - load to fifo without interrupt */\r
+ /* Header discarded if exceed the DMA FIFO length */\r
+ //if (bHdrLen > DMA_MAX_FIFO_SIZE) bHdrLen = DMA_MAX_FIFO_SIZE;\r
+ pDmaLL[0].pNxtDesc = (void*)&pDmaLL[1];\r
+ pDmaLL[0].pAddr = (void*)pHdr;\r
+ pDmaLL[0].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(bHdrLen)\r
+ | UDPHS_DMACONTROL_LDNXT_DSC;\r
+ /* High bandwidth ISO EP, max size n*ep_size */\r
+ if (bNbTrans > 1) {\r
+ uint8_t* pU8 = (uint8_t*)pData;\r
+ uint32_t maxSize = bNbTrans * pEp->size;\r
+ dLength = pXfr->buffered - bHdrLen;\r
+ if (dLength > maxSize) dLength = maxSize;\r
+ #if 0 /* Prepare banks by 1 DMA descriptor -- NK if not standard EP size, works! */\r
+ /* LD2: data - load to fifo with interrupt */\r
+ pDmaLL[1].pNxtDesc = (void*)NULL;\r
+ pDmaLL[1].pAddr = (void*)pU8;\r
+ pDmaLL[1].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(dLength)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT;\r
+ #else\r
+ uint32_t pktLen, ndxData = 0;\r
+ /* LD2: data - bank 0 */\r
+ pktLen = pEp->size - bHdrLen;\r
+ if (pktLen >= dLength) { /* It's the last DMA LLI */\r
+ pDmaLL[1].pNxtDesc = (void*)NULL;\r
+ pDmaLL[1].pAddr = (void*)pU8;\r
+ pDmaLL[1].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(dLength)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT;\r
+ }\r
+ else {\r
+ pDmaLL[1].pNxtDesc = (void*)&pDmaLL[2];\r
+ pDmaLL[1].pAddr = (void*)pU8;\r
+ pDmaLL[1].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(pktLen)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_LDNXT_DSC;\r
+ dLength -= pktLen; ndxData += pktLen;\r
+ /* LD3: data - bank 1 */\r
+ pktLen = pEp->size;\r
+ if (pktLen >= dLength) { /* It's the last */\r
+ pDmaLL[1].pNxtDesc = (void*) NULL;\r
+ pDmaLL[1].pAddr = (void*)&pU8[ndxData];\r
+ pDmaLL[1].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(dLength)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT;\r
+ }\r
+ else {\r
+ pDmaLL[2].pNxtDesc = (void*)&pDmaLL[3];\r
+ pDmaLL[2].pAddr = (void*)&pU8[ndxData];\r
+ pDmaLL[2].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(pktLen)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_LDNXT_DSC;\r
+ dLength -= pktLen; ndxData += pktLen;\r
+ /* LD4: data - bank 2 */\r
+ pDmaLL[3].pNxtDesc = (void*) NULL;\r
+ pDmaLL[3].pAddr = (void*)&pU8[ndxData];\r
+ pDmaLL[3].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(dLength)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT;\r
+ }\r
+ }\r
+ #endif\r
+ }\r
+ else { /* Normal, fill all data */\r
+ /* LD2: data - load to fifo with interrupt */\r
+ dLength = pXfr->buffered - bHdrLen;\r
+ pDmaLL[1].pNxtDesc = (void*)NULL;\r
+ pDmaLL[1].pAddr = (void*)pData;\r
+ pDmaLL[1].dwCtrl = UDPHS_DMACONTROL_CHANN_ENB\r
+ | UDPHS_DMACONTROL_BUFF_LENGTH(dLength)\r
+ | UDPHS_DMACONTROL_END_B_EN\r
+ | UDPHS_DMACONTROL_END_BUFFIT;\r
+ }\r
+\r
+ /* Interrupt enable */\r
+ pUdp->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint);\r
+ /* Start transfer with LLI */\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMANXTDSC = (uint32_t)pDmaLL;\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0;\r
+ pUdp->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = UDPHS_DMACONTROL_LDNXT_DSC;\r
+ return USBD_STATUS_SUCCESS;\r
+ }\r
+#endif\r
+ \r
+ /* Enable IT */\r
+ pUdp->UDPHS_IEN |= ( UDPHS_IEN_EPT_0 << bEndpoint );\r
+ pHwEp->UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_TX_PK_RDY;\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Reads incoming data on an USB endpoint This methods sets the transfer\r
+ * descriptor and activate the endpoint interrupt. The actual transfer is\r
+ * then carried out by the endpoint interrupt handler. The Read operation\r
+ * finishes either when the buffer is full, or a short packet (inferior to\r
+ * endpoint maximum size) is received.\r
+ *\r
+ * *The buffer must be kept allocated until the transfer is finished*.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param pData Pointer to a data buffer.\r
+ * \param dLength Size of the data buffer in bytes.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+uint8_t USBD_HAL_Read(uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength)\r
+{\r
+ if (endpoints[bEndpoint].transfer.transHdr.transType)\r
+ return USBD_STATUS_SW_NOT_SUPPORTED;\r
+ else\r
+ return UDPHS_Read(bEndpoint, pData, dLength);\r
+}\r
+\r
+/**\r
+ * \brief Enable Pull-up, connect.\r
+ *\r
+ * -# Enable HW access if needed\r
+ * -# Enable Pull-Up\r
+ * -# Disable HW access if needed\r
+ */\r
+void USBD_HAL_Connect(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ uint8_t dis = UDPHS_EnablePeripheralClock();\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_PULLD_DIS;\r
+ pUdp->UDPHS_CTRL &= ~(uint32_t)UDPHS_CTRL_DETACH;\r
+ if (dis) UDPHS_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * \brief Disable Pull-up, disconnect.\r
+ *\r
+ * -# Enable HW access if needed\r
+ * -# Disable PULL-Up\r
+ * -# Disable HW access if needed\r
+ */\r
+void USBD_HAL_Disconnect(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ uint8_t dis = UDPHS_EnablePeripheralClock();\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_DETACH;\r
+ pUdp->UDPHS_CTRL &= ~(uint32_t)UDPHS_CTRL_PULLD_DIS;\r
+ if (dis) UDPHS_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * Starts a remote wake-up procedure.\r
+ */\r
+void USBD_HAL_RemoteWakeUp(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ UDPHS_EnablePeripheralClock();\r
+ UDPHS_EnableUsbClock();\r
+\r
+ TRACE_INFO_WP("RWUp ");\r
+\r
+ /* Activates a remote wakeup (edge on ESR), then clear ESR */\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_REWAKEUP;\r
+ while(pUdp->UDPHS_CTRL & UDPHS_CTRL_REWAKEUP)\r
+ {\r
+ TRACE_DEBUG_WP("w");\r
+ }\r
+ UDPHS_EnableBIAS();\r
+}\r
+\r
+/**\r
+ * Sets the device address to the given value.\r
+ * \param address New device address.\r
+ */\r
+void USBD_HAL_SetAddress(uint8_t address)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+\r
+ if (address)\r
+ {\r
+ pUdp->UDPHS_CTRL &= ~(uint32_t)UDPHS_CTRL_DEV_ADDR_Msk;\r
+ pUdp->UDPHS_CTRL |= address | UDPHS_CTRL_FADDR_EN;\r
+ }\r
+ else\r
+ {\r
+ pUdp->UDPHS_CTRL &= ~(uint32_t)UDPHS_CTRL_FADDR_EN;\r
+ }\r
+}\r
+\r
+/**\r
+ * Sets the current device configuration.\r
+ * \param cfgnum - Configuration number to set.\r
+ */\r
+void USBD_HAL_SetConfiguration(uint8_t cfgnum)\r
+{\r
+ /* Nothing to do now */\r
+ cfgnum = cfgnum;\r
+}\r
+\r
+/**\r
+ * Initializes the USB HW Access driver.\r
+ */\r
+void USBD_HAL_Init(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pEpt;\r
+ UdphsDma *pDma;\r
+ uint32_t i;\r
+#ifdef DMA\r
+ /* DMA Link list should be 16-bytes aligned */\r
+ if ((uint32_t)dmaLL & 0xFFFFFFF0)\r
+ pDmaLL = (UdphsDmaDescriptor*)((uint32_t)&dmaLL[1] & 0xFFFFFFF0);\r
+ else\r
+ pDmaLL = (UdphsDmaDescriptor*)((uint32_t)&dmaLL[0]);\r
+#endif\r
+ /* Must before USB & TXVC access! */\r
+ UDPHS_EnablePeripheralClock();\r
+\r
+ /* Reset & disable endpoints */\r
+ USBD_HAL_ResetEPs(0xFFFFFFFF, USBD_STATUS_RESET, 0);\r
+\r
+ /* Configure the pull-up on D+ and disconnect it */\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_DETACH;\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_PULLD_DIS;\r
+\r
+ /* Reset IP */\r
+ pUdp->UDPHS_CTRL &= ~(uint32_t)UDPHS_CTRL_EN_UDPHS;\r
+ pUdp->UDPHS_CTRL |= UDPHS_CTRL_EN_UDPHS;\r
+\r
+ /* (XCHQ[2010.1.21], IP recomendation, setup clock after reset IP) */\r
+ UDPHS_EnableUsbClock();\r
+\r
+ /* Initialize DMA */\r
+ for (i = 1;\r
+ i < ((pUdp->UDPHS_IPFEATURES & UDPHS_IPFEATURES_DMA_CHANNEL_NBR_Msk) >> 4);\r
+ i ++)\r
+ {\r
+ pEpt = &pUdp->UDPHS_EPT[i];\r
+ pDma = &pUdp->UDPHS_DMA[i];\r
+ /* DMA stop */\r
+ pDma->UDPHS_DMACONTROL = 0;\r
+ /* Disable endpoint */\r
+ pEpt->UDPHS_EPTCTLDIS = (uint32_t)UDPHS_EPTCTLDIS_SHRT_PCKT\r
+ | UDPHS_EPTCTLDIS_BUSY_BANK\r
+ | UDPHS_EPTCTLDIS_NAK_OUT\r
+ | UDPHS_EPTCTLDIS_NAK_IN\r
+ | UDPHS_EPTCTLDIS_STALL_SNT\r
+ | UDPHS_EPTCTLDIS_RX_SETUP\r
+ | UDPHS_EPTCTLDIS_TX_PK_RDY\r
+ | UDPHS_EPTCTLDIS_TX_COMPLT\r
+ | UDPHS_EPTCTLDIS_RX_BK_RDY\r
+ | UDPHS_EPTCTLDIS_ERR_OVFLW\r
+ | UDPHS_EPTCTLDIS_MDATA_RX\r
+ | UDPHS_EPTCTLDIS_DATAX_RX\r
+ | UDPHS_EPTCTLDIS_NYET_DIS\r
+ | UDPHS_EPTCTLDIS_INTDIS_DMA\r
+ | UDPHS_EPTCTLDIS_AUTO_VALID\r
+ | UDPHS_EPTCTLDIS_EPT_DISABL\r
+ ;\r
+ /* Clear status endpoint */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ\r
+ | UDPHS_EPTCLRSTA_FRCESTALL\r
+ | UDPHS_EPTCLRSTA_RX_BK_RDY\r
+ | UDPHS_EPTCLRSTA_TX_COMPLT\r
+ | UDPHS_EPTCLRSTA_RX_SETUP\r
+ | UDPHS_EPTCLRSTA_STALL_SNT\r
+ | UDPHS_EPTCLRSTA_NAK_IN\r
+ | UDPHS_EPTCLRSTA_NAK_OUT\r
+ ;\r
+ /* Reset endpoint config */\r
+ pEpt->UDPHS_EPTCTLENB = 0;\r
+ /* Reset DMA channel (Buffer count and Control field) */\r
+ pDma->UDPHS_DMACONTROL = UDPHS_DMACONTROL_LDNXT_DSC;\r
+ /* Reset DMA channel */\r
+ pDma->UDPHS_DMACONTROL = 0;\r
+ /* Clear DMA channel status (read to clear) */\r
+ pDma->UDPHS_DMASTATUS = pDma->UDPHS_DMASTATUS;\r
+ }\r
+\r
+ /* Force Full-Speed */\r
+ pUdp->UDPHS_TST = forceUsbFS ? UDPHS_TST_SPEED_CFG_FULL_SPEED : 0;\r
+\r
+ pUdp->UDPHS_IEN = 0;\r
+ pUdp->UDPHS_CLRINT = UDPHS_CLRINT_UPSTR_RES\r
+ | UDPHS_CLRINT_ENDOFRSM\r
+ | UDPHS_CLRINT_WAKE_UP\r
+ | UDPHS_CLRINT_ENDRESET\r
+ | UDPHS_CLRINT_INT_SOF\r
+ | UDPHS_CLRINT_MICRO_SOF\r
+ | UDPHS_CLRINT_DET_SUSPD\r
+ ;\r
+\r
+ /* Enable interrupts */\r
+ pUdp->UDPHS_IEN = UDPHS_IEN_ENDOFRSM\r
+ | UDPHS_IEN_WAKE_UP\r
+ | UDPHS_IEN_DET_SUSPD;\r
+\r
+ /* Disable USB clocks */\r
+ UDPHS_DisableUsbClock();\r
+}\r
+\r
+/**\r
+ * Causes the given endpoint to acknowledge the next packet it receives\r
+ * with a STALL handshake except setup request.\r
+ * \param bEP Endpoint number.\r
+ * \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED.\r
+ */\r
+uint8_t USBD_HAL_Stall(uint8_t bEP)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pEpt = &pUdp->UDPHS_EPT[bEP];\r
+\r
+ Endpoint *pEndpoint = &(endpoints[bEP]);\r
+\r
+ /* Check that endpoint is in Idle state */\r
+ if (pEndpoint->state != UDPHS_ENDPOINT_IDLE)\r
+ {\r
+ TRACE_WARNING("UDP_Stall: EP%d locked\n\r", bEP);\r
+ return USBD_STATUS_LOCKED;\r
+ }\r
+ /* STALL endpoint */\r
+ pEpt->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_FRCESTALL;\r
+\r
+ TRACE_DEBUG_WP("Stall%d ", bEP);\r
+ return USBD_STATUS_SUCCESS;\r
+}\r
+\r
+/**\r
+ * Sets/Clear/Get the HALT state on the endpoint.\r
+ * In HALT state, the endpoint should keep stalling any packet.\r
+ * \param bEndpoint Endpoint number.\r
+ * \param ctl Control code CLR/HALT/READ.\r
+ * 0: Clear HALT state;\r
+ * 1: Set HALT state;\r
+ * .: Return HALT status.\r
+ * \return USBD_STATUS_INVALID_PARAMETER if endpoint not exist,\r
+ * otherwise endpoint halt status.\r
+ */\r
+uint8_t USBD_HAL_Halt(uint8_t bEndpoint, uint8_t ctl)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ UdphsEpt *pEpt = &pUdp->UDPHS_EPT[bEndpoint];\r
+\r
+ Endpoint *pEndpoint = &(endpoints[bEndpoint]);\r
+ uint8_t status = 0;\r
+\r
+ /* SET Halt */\r
+ if (ctl == 1)\r
+ {\r
+ /* Check that endpoint is enabled and not already in Halt state */\r
+ if ((pEndpoint->state != UDPHS_ENDPOINT_DISABLED)\r
+ && (pEndpoint->state != UDPHS_ENDPOINT_HALTED))\r
+ {\r
+\r
+ TRACE_DEBUG_WP("Halt%d ", bEndpoint);\r
+\r
+ /* Abort the current transfer if necessary */\r
+ UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);\r
+\r
+ /* Put endpoint into Halt state */\r
+ pEndpoint->state = UDPHS_ENDPOINT_HALTED;\r
+ pEpt->UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_FRCESTALL;\r
+\r
+ #ifdef DMA\r
+ if (CHIP_USB_ENDPOINTS_DMA(bEndpoint))\r
+ {\r
+ /* Enable the endpoint DMA interrupt */\r
+ pUdp->UDPHS_IEN |= ( 1 << SHIFT_DMA << bEndpoint );\r
+ }\r
+ else\r
+ {\r
+ /* Enable the endpoint interrupt */\r
+ pUdp->UDPHS_IEN |= ( UDPHS_IEN_EPT_0 << bEndpoint );\r
+ }\r
+ #else\r
+ /* Enable the endpoint interrupt */\r
+ pUdp->UDPHS_IEN |= ( UDPHS_IEN_EPT_0 << bEndpoint );\r
+ #endif\r
+ }\r
+ }\r
+ /* CLEAR Halt */\r
+ else if (ctl == 0)\r
+ {\r
+ /* Check if the endpoint is halted */\r
+ if (pEndpoint->state == UDPHS_ENDPOINT_HALTED)\r
+ {\r
+\r
+ TRACE_DEBUG_WP("Unhalt%d ", bEndpoint);\r
+\r
+ /* Return endpoint to Idle state */\r
+ pEndpoint->state = UDPHS_ENDPOINT_IDLE;\r
+\r
+ /* Clear FORCESTALL flag */\r
+ pEpt->UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_TOGGLESQ\r
+ | UDPHS_EPTCLRSTA_FRCESTALL;\r
+\r
+ /* Reset Endpoint Fifos */\r
+ pUdp->UDPHS_EPTRST = (1 << bEndpoint);\r
+ }\r
+ }\r
+\r
+ /* Return Halt status */\r
+ if (pEndpoint->state == UDPHS_ENDPOINT_HALTED)\r
+ {\r
+ status = 1;\r
+ }\r
+ return( status );\r
+}\r
+\r
+/**\r
+ * Indicates if the device is running in high or full-speed. Always returns 0\r
+ * since UDP does not support high-speed mode.\r
+ */\r
+uint8_t USBD_HAL_IsHighSpeed(void)\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ return (pUdp->UDPHS_INTSTA & UDPHS_INTSTA_SPEED);\r
+}\r
+\r
+/**\r
+ * Suspend USB Device HW Interface\r
+ *\r
+ * -# Disable transceiver\r
+ * -# Disable USB Clock\r
+ * -# Disable USB Peripheral\r
+ */\r
+void USBD_HAL_Suspend(void)\r
+{\r
+ /* The device enters the Suspended state */\r
+ UDPHS_DisableBIAS();\r
+ UDPHS_DisableUsbClock();\r
+ UDPHS_DisablePeripheralClock();\r
+}\r
+\r
+/**\r
+ * Activate USB Device HW Interface\r
+ * -# Enable USB Peripheral\r
+ * -# Enable USB Clock\r
+ * -# Enable transceiver\r
+ */\r
+void USBD_HAL_Activate(void)\r
+{\r
+ UDPHS_EnablePeripheralClock();\r
+ UDPHS_EnableUsbClock();\r
+ UDPHS_EnableBIAS();\r
+}\r
+\r
+/**\r
+ * Certification test for High Speed device.\r
+ * \param bIndex Test to be done\r
+ */\r
+void USBD_HAL_Test( uint8_t bIndex )\r
+{\r
+ Udphs *pUdp = UDPHS;\r
+ uint8_t *pFifo;\r
+ uint32_t i;\r
+\r
+ /* remove suspend for TEST */\r
+ pUdp->UDPHS_IEN &= ~UDPHS_IEN_DET_SUSPD;\r
+ /* force High Speed (remove suspend) */\r
+ pUdp->UDPHS_TST |= UDPHS_TST_SPEED_CFG_HIGH_SPEED;\r
+\r
+ switch( bIndex ) {\r
+\r
+ case USBFeatureRequest_TESTPACKET:\r
+ TRACE_DEBUG_WP("TEST_PACKET ");\r
+\r
+ pUdp->UDPHS_DMA[1].UDPHS_DMACONTROL = 0;\r
+ pUdp->UDPHS_DMA[2].UDPHS_DMACONTROL = 0;\r
+\r
+ /* Configure endpoint 2, 64 bytes, direction IN, type BULK, 1 bank */\r
+ pUdp->UDPHS_EPT[2].UDPHS_EPTCFG = UDPHS_EPTCFG_EPT_SIZE_64\r
+ | UDPHS_EPTCFG_EPT_DIR\r
+ | UDPHS_EPTCFG_EPT_TYPE_BULK\r
+ | UDPHS_EPTCFG_BK_NUMBER_1;\r
+ while( (pUdp->UDPHS_EPT[2].UDPHS_EPTCFG & UDPHS_EPTCFG_EPT_MAPD) != UDPHS_EPTCFG_EPT_MAPD );\r
+ pUdp->UDPHS_EPT[2].UDPHS_EPTCTLENB = UDPHS_EPTCTLENB_EPT_ENABL;\r
+\r
+ /* Write FIFO */\r
+ pFifo = (uint8_t*)((uint32_t *)(UDPHS_RAM_ADDR) + (EPT_VIRTUAL_SIZE * 2));\r
+ for( i=0; i<sizeof(test_packet_buffer); i++) {\r
+ pFifo[i] = test_packet_buffer[i];\r
+ }\r
+ /* Tst PACKET */\r
+ pUdp->UDPHS_TST |= UDPHS_TST_TST_PKT;\r
+ /* Send packet */\r
+ pUdp->UDPHS_EPT[2].UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_TX_PK_RDY;\r
+ break;\r
+\r
+ case USBFeatureRequest_TESTJ:\r
+ TRACE_DEBUG_WP("TEST_J ");\r
+ pUdp->UDPHS_TST = UDPHS_TST_TST_J;\r
+ break;\r
+\r
+ case USBFeatureRequest_TESTK:\r
+ TRACE_DEBUG_WP("TEST_K ");\r
+ pUdp->UDPHS_TST = UDPHS_TST_TST_K;\r
+ break;\r
+\r
+ case USBFeatureRequest_TESTSE0NAK:\r
+ TRACE_DEBUG_WP("TEST_SEO_NAK ");\r
+ pUdp->UDPHS_IEN = 0; // for test\r
+ break;\r
+\r
+ case USBFeatureRequest_TESTSENDZLP:\r
+ //while( 0 != (pUdp->UDPHS_EPT[0].UDPHS_EPTSTA & UDPHS_EPTSETSTA_TX_PK_RDY ) ) {}\r
+ pUdp->UDPHS_EPT[0].UDPHS_EPTSETSTA = UDPHS_EPTSETSTA_TX_PK_RDY;\r
+ //while( 0 != (pUdp->UDPHS_EPT[0].UDPHS_EPTSTA & UDPHS_EPTSETSTA_TX_PK_RDY ) ) {}\r
+ TRACE_DEBUG_WP("SEND_ZLP ");\r
+ break;\r
+ }\r
+ TRACE_DEBUG_WP("\n\r");\r
+}\r
+\r
+/**@}*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Definitions and methods for USB composite device implement.\r
+ * \r
+ */\r
+\r
+#ifndef CDCAUDDDRIVER_H\r
+#define CDCAUDDDRIVER_H\r
+/** \addtogroup usbd_composite_cdcaud\r
+ *@{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include <USBRequests.h>\r
+#include <CDCDescriptors.h>\r
+#include <AUDDescriptors.h>\r
+#include "USBD.h"\r
+#include <USBDDriver.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_aud_desc USB CDC(Serial) + AUD(Speaker) Definitions\r
+ * @{\r
+ */\r
+/** Number of interfaces of the device (5, can be 4 if no mic support */\r
+#define CDCAUDDDriverDescriptors_MaxNumInterfaces 5\r
+/** Number of the CDC interface. */\r
+#define CDCAUDDDriverDescriptors_CDC_INTERFACE 0\r
+/** Number of the Audio interface. */\r
+#define CDCAUDDDriverDescriptors_AUD_INTERFACE 2\r
+/** Number of Audio function channels (M,L,R) */\r
+#define AUDD_NumChannels 3\r
+/** @}*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+\r
+/** Audio header descriptor with 1 interface */\r
+typedef struct _AUDHeaderDescriptor1{\r
+\r
+ /** Header descriptor.*/\r
+ AUDHeaderDescriptor header;\r
+ /** Id of the first grouped interface.*/\r
+ uint8_t bInterface0;\r
+\r
+} __attribute__ ((__packed__)) AUDHeaderDescriptor1;\r
+\r
+/** Audio header descriptor with 2 interface */\r
+typedef struct _AUDHeaderDescriptor2 {\r
+\r
+ /** Header descriptor. */\r
+ AUDHeaderDescriptor header;\r
+ /** Id of the first grouped interface - Speaker. */\r
+ uint8_t bInterface0;\r
+ /** Id of the second grouped interface - Speakerphone. */\r
+ uint8_t bInterface1;\r
+\r
+} __attribute__ ((__packed__)) AUDHeaderDescriptor2; /* GCC */\r
+\r
+/**\r
+ * Feature unit descriptor with 3 channel controls (master, right, left).\r
+ */\r
+typedef struct _AUDFeatureUnitDescriptor3{\r
+\r
+ /** Feature unit descriptor.*/\r
+ AUDFeatureUnitDescriptor feature;\r
+ /** Available controls for each channel.*/\r
+ uint8_t bmaControls[AUDD_NumChannels];\r
+ /** Index of a string descriptor for the feature unit.*/\r
+ uint8_t iFeature;\r
+\r
+} __attribute__ ((__packed__)) AUDFeatureUnitDescriptor3;\r
+\r
+/**\r
+ * List of descriptors for detailling the audio control interface of a\r
+ * device using a USB audio speaker function.\r
+ */\r
+typedef struct _AUDDSpeakerAcDescriptors{\r
+\r
+ /** Header descriptor (with one slave interface).*/\r
+ AUDHeaderDescriptor1 header;\r
+ /** Input terminal descriptor.*/\r
+ AUDInputTerminalDescriptor input;\r
+ /** Output terminal descriptor.*/\r
+ AUDOutputTerminalDescriptor output;\r
+ /** Feature unit descriptor.*/\r
+ AUDFeatureUnitDescriptor3 feature;\r
+\r
+} __attribute__ ((__packed__)) AUDDSpeakerAcDescriptors;\r
+\r
+/**\r
+ * List of descriptors for detailling the audio control interface of a\r
+ * device using a USB Audio Speakerphoneer function.\r
+ */\r
+typedef struct _AUDDSpeakerPhoneAcDescriptors {\r
+\r
+ /** Header descriptor (with one slave interface). */\r
+ AUDHeaderDescriptor2 header;\r
+ /** Input terminal descriptor. */\r
+ AUDInputTerminalDescriptor inputSpeakerPhone;\r
+ /** Output terminal descriptor. */\r
+ AUDOutputTerminalDescriptor outputSpeakerPhone;\r
+ /** Feature unit descriptor - SpeakerPhone. */\r
+ AUDFeatureUnitDescriptor3 featureSpeakerPhone;\r
+ /** Input terminal descriptor. */\r
+ AUDInputTerminalDescriptor inputRec;\r
+ /** Output terminal descriptor. */\r
+ AUDOutputTerminalDescriptor outputRec;\r
+ /** Feature unit descriptor - SpeakerPhonephone. */\r
+ AUDFeatureUnitDescriptor3 featureRec;\r
+\r
+} __attribute__ ((__packed__)) AUDDSpeakerPhoneAcDescriptors;\r
+\r
+/**\r
+ * Format type I descriptor with one discrete sampling frequency.\r
+ */\r
+typedef struct _AUDFormatTypeOneDescriptor1{\r
+\r
+ /** Format type I descriptor.*/\r
+ AUDFormatTypeOneDescriptor formatType;\r
+ /** Sampling frequency in Hz.*/\r
+ uint8_t tSamFreq[3];\r
+\r
+} __attribute__ ((__packed__)) AUDFormatTypeOneDescriptor1;\r
+\r
+/**\r
+ * Configuration descriptor list for a device implementing\r
+ * CDC(Serial) + Audio(Speaker) composite driver.\r
+ */\r
+typedef struct _CdcAudspkdDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+\r
+ /* --- CDC 0 */\r
+ /** IAD 0 */\r
+ USBInterfaceAssociationDescriptor cdcIAD0;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication0;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader0;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement0;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion0;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification0;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData0;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut0;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn0;\r
+\r
+ /* --- AUDIO (AC) */\r
+ /** IAD 1*/\r
+ USBInterfaceAssociationDescriptor audIAD;\r
+ /** Audio control interface.*/\r
+ USBInterfaceDescriptor audInterface;\r
+ /** Descriptors for the audio control interface.*/\r
+ AUDDSpeakerAcDescriptors audControl;\r
+ /* -- AUDIO out (AS) */\r
+ /** Streaming out interface descriptor (with no endpoint, required).*/\r
+ USBInterfaceDescriptor audStreamingOutNoIsochronous;\r
+ /** Streaming out interface descriptor.*/\r
+ USBInterfaceDescriptor audStreamingOut;\r
+ /** Audio class descriptor for the streaming out interface.*/\r
+ AUDStreamingInterfaceDescriptor audStreamingOutClass;\r
+ /** Stream format descriptor.*/\r
+ AUDFormatTypeOneDescriptor1 audStreamingOutFormatType;\r
+ /** Streaming out endpoint descriptor.*/\r
+ AUDEndpointDescriptor audStreamingOutEndpoint;\r
+ /** Audio class descriptor for the streaming out endpoint.*/\r
+ AUDDataEndpointDescriptor audStreamingOutDataEndpoint;\r
+\r
+} __attribute__ ((__packed__)) CdcAudspkdDriverConfigurationDescriptors;\r
+\r
+/**\r
+ * Configuration descriptor list for a device implementing\r
+ * CDC(Serial) + Audio(SpeakerPhone) composite driver.\r
+ */\r
+typedef struct _CdcAuddDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+\r
+ /* --- CDC 0 */\r
+ /** IAD 0 */\r
+ USBInterfaceAssociationDescriptor cdcIAD0;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication0;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader0;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement0;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion0;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification0;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData0;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut0;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn0;\r
+\r
+ /* --- AUDIO (AC) */\r
+ /** IAD 1*/\r
+ USBInterfaceAssociationDescriptor audIAD;\r
+ /** Audio control interface.*/\r
+ USBInterfaceDescriptor audInterface;\r
+ /** Descriptors for the audio control interface.*/\r
+ AUDDSpeakerPhoneAcDescriptors audControl;\r
+ /* -- AUDIO out (AS) */\r
+ /** Streaming out interface descriptor (with no endpoint, required).*/\r
+ USBInterfaceDescriptor audStreamingOutNoIsochronous;\r
+ /** Streaming out interface descriptor.*/\r
+ USBInterfaceDescriptor audStreamingOut;\r
+ /** Audio class descriptor for the streaming out interface.*/\r
+ AUDStreamingInterfaceDescriptor audStreamingOutClass;\r
+ /** Stream format descriptor.*/\r
+ AUDFormatTypeOneDescriptor1 audStreamingOutFormatType;\r
+ /** Streaming out endpoint descriptor.*/\r
+ AUDEndpointDescriptor audStreamingOutEndpoint;\r
+ /** Audio class descriptor for the streaming out endpoint.*/\r
+ AUDDataEndpointDescriptor audStreamingOutDataEndpoint;\r
+ /*- AUDIO IN */\r
+ /** Streaming in interface descriptor (with no endpoint, required). */\r
+ USBInterfaceDescriptor streamingInNoIsochronous;\r
+ /** Streaming in interface descriptor. */\r
+ USBInterfaceDescriptor streamingIn;\r
+ /** Audio class descriptor for the streaming in interface. */\r
+ AUDStreamingInterfaceDescriptor streamingInClass;\r
+ /** Stream format descriptor. */\r
+ AUDFormatTypeOneDescriptor1 streamingInFormatType;\r
+ /** Streaming in endpoint descriptor. */\r
+ AUDEndpointDescriptor streamingInEndpoint;\r
+ /** Audio class descriptor for the streaming in endpoint. */\r
+ AUDDataEndpointDescriptor streamingInDataEndpoint;\r
+\r
+} __attribute__ ((__packed__)) CdcAuddDriverConfigurationDescriptors;\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+extern void CDCAUDDDriver_Initialize(const USBDDriverDescriptors * pDescriptors);\r
+extern void CDCAUDDDriver_ConfigurationChangedHandler(uint8_t cfgnum);\r
+extern void CDCAUDDDriver_InterfaceSettingChangedHandler(\r
+ uint8_t interface, uint8_t setting);\r
+extern void CDCAUDDDriver_RequestHandler(const USBGenericRequest *request);\r
+\r
+/**@}*/\r
+#endif //#ifndef CDCHIDDDRIVER_H\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * Single CDC Serial Port Function for USB device & composite driver.\r
+ */\r
+\r
+#ifndef CDCDSERIAL_H\r
+#define CDCDSERIAL_H\r
+\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99\r
+ by working group ISO/IEC JTC1/SC22/WG14. */\r
+#include <stdint.h>\r
+\r
+#include <USBRequests.h>\r
+\r
+#include <USBDDriver.h>\r
+#include <CDCDSerialPort.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+extern void CDCDSerial_Initialize(\r
+ USBDDriver * pUsbd, uint8_t bInterfaceNb);\r
+\r
+extern uint32_t CDCDSerial_RequestHandler(\r
+ const USBGenericRequest *request);\r
+\r
+extern void CDCDSerial_ConfigureFunction(\r
+ USBGenericDescriptor * pDescriptors, uint16_t wLength);\r
+\r
+extern uint32_t CDCDSerial_Write(\r
+ void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument);\r
+\r
+extern uint32_t CDCDSerial_Read(\r
+ void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument);\r
+\r
+extern void CDCDSerial_GetLineCoding(CDCLineCoding * pLineCoding);\r
+\r
+extern uint8_t CDCDSerial_GetControlLineState(void);\r
+\r
+extern uint16_t CDCDSerial_GetSerialState(void);\r
+\r
+extern void CDCDSerial_SetSerialState(uint16_t serialState);\r
+\r
+extern uint8_t CDCDSerial_LineCodingIsToChange(\r
+ CDCLineCoding * pLineCoding);\r
+\r
+extern void CDCDSerial_ControlLineStateChanged(\r
+ uint8_t DTR,uint8_t RTS);\r
+\r
+/**@}*/\r
+\r
+#endif /*#ifndef CDCSERIAL_H*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Definition of a class for implementing a USB device CDC serial driver.\r
+ *\r
+ * \section Usage\r
+ *\r
+ * -# Re-implement the USBDCallbacks_RequestReceived method to pass\r
+ * received requests to CDCDSerialDriver_RequestHandler. *This is\r
+ * automatically done unless the NOAUTOCALLBACK symbol is defined*.\r
+ * -# Initialize the CDC serial and USB drivers using\r
+ * CDCDSerialDriver_Initialize.\r
+ * -# Logically connect the device to the host using USBD_Connect.\r
+ * -# Send serial data to the USB host using CDCDSerialDriver_Write.\r
+ * -# Receive serial data from the USB host using CDCDSerialDriver_Read.\r
+ */\r
+\r
+#ifndef CDCDSERIALDRIVER_H\r
+#define CDCDSERIALDRIVER_H\r
+\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99\r
+ by working group ISO/IEC JTC1/SC22/WG14. */\r
+#include <stdint.h>\r
+\r
+#include <USBRequests.h>\r
+#include <CDCRequests.h>\r
+#include <CDCDescriptors.h>\r
+#include <CDCNotifications.h>\r
+\r
+#include <CDCDSerial.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_if USB Device CDC Serial Interface IDs\r
+ * @{\r
+ */\r
+/** Communication Class Interface ID */\r
+#define CDCDSerialDriver_CC_INTERFACE 0\r
+/** Data Class Interface ID */\r
+#define CDCDSerialDriver_DC_INTERFACE 1\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+\r
+/**\r
+ * \typedef CDCDSerialDriverConfigurationDescriptors\r
+ * \brief Configuration descriptor list for a device implementing a\r
+ * CDC serial driver.\r
+ */\r
+typedef struct _CDCDSerialDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+ /** Communication interface descriptor. */\r
+ USBInterfaceDescriptor communication;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor header;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor callManagement;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor abstractControlManagement;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor union1;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor notification;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor data;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor dataOut;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor dataIn;\r
+\r
+} __attribute__ ((__packed__)) CDCDSerialDriverConfigurationDescriptors;\r
+\r
+/**\r
+ * \typedef CDCDSerialDriverConfigurationDescriptorsOTG\r
+ * \brief Configuration descriptor list for a device implementing a\r
+ * CDC serial OTG driver.\r
+ */\r
+typedef struct _CDCDSerialDriverConfigurationDescriptorsOTG {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+ /* OTG descriptor */\r
+ USBOtgDescriptor otgDescriptor;\r
+ /** Communication interface descriptor. */\r
+ USBInterfaceDescriptor communication;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor header;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor callManagement;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor abstractControlManagement;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor union1;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor notification;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor data;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor dataOut;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor dataIn;\r
+\r
+} __attribute__ ((__packed__)) CDCDSerialDriverConfigurationDescriptorsOTG;\r
+\r
+#pragma pack()\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+extern void CDCDSerialDriver_Initialize(\r
+ const USBDDriverDescriptors *pDescriptors);\r
+\r
+extern void CDCDSerialDriver_ConfigurationChangedHandler(uint8_t cfgnum);\r
+\r
+extern void CDCDSerialDriver_RequestHandler(\r
+ const USBGenericRequest *request);\r
+\r
+/**\r
+ * Sends a data buffer through the virtual COM port created by the CDC\r
+ * device serial driver. This function behaves exactly like USBD_Write.\r
+ * \param data Pointer to the data buffer to send.\r
+ * \param size Size of the data buffer in bytes.\r
+ * \param callback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param argument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+static inline uint32_t CDCDSerialDriver_Write(\r
+ void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument)\r
+{\r
+ return CDCDSerial_Write(data, size, callback, argument);\r
+}\r
+\r
+/**\r
+ * Receives data from the host through the virtual COM port created by\r
+ * the CDC device serial driver. This function behaves like USBD_Read.\r
+ * \param data Pointer to the data buffer to put received data.\r
+ * \param size Size of the data buffer in bytes.\r
+ * \param callback Optional callback function to invoke when the transfer\r
+ * finishes.\r
+ * \param argument Optional argument to the callback function.\r
+ * \return USBD_STATUS_SUCCESS if the read operation has been started normally;\r
+ * otherwise, the corresponding error code.\r
+ */\r
+static inline uint32_t CDCDSerialDriver_Read(\r
+ void *data,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *argument)\r
+{\r
+ return CDCDSerial_Read(data, size, callback, argument);\r
+}\r
+\r
+/**\r
+ * Copy current line coding settings to pointered space.\r
+ * \param pLineCoding Pointer to CDCLineCoding instance.\r
+ */\r
+static inline void CDCDSerialDriver_GetLineCoding(CDCLineCoding * pLineCoding)\r
+{\r
+ CDCDSerial_GetLineCoding(pLineCoding);\r
+}\r
+\r
+/**\r
+ * Returns the current control line state of the RS-232 line.\r
+ */\r
+static inline uint8_t CDCDSerialDriver_GetControlLineState(void)\r
+{\r
+ return CDCDSerial_GetControlLineState();\r
+}\r
+\r
+/**\r
+ * Returns the current status of the RS-232 line.\r
+ */\r
+static inline uint16_t CDCDSerialDriver_GetSerialState(void)\r
+{\r
+ return CDCDSerial_GetSerialState();\r
+}\r
+\r
+/**\r
+ * Sets the current serial state of the device to the given value.\r
+ * \param serialState New device state.\r
+ */\r
+static inline void CDCDSerialDriver_SetSerialState(uint16_t serialState)\r
+{\r
+ CDCDSerial_SetSerialState(serialState);\r
+}\r
+\r
+/**@}*/\r
+\r
+#endif /*#ifndef CDCSERIALDRIVER_H*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * Definition of a class for implementing a USB device\r
+ * CDC serial port function.\r
+ */\r
+\r
+#ifndef _CDCDSERIALPORT_H_\r
+#define _CDCDSERIALPORT_H_\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+ \r
+/* These headers were introduced in C99\r
+ by working group ISO/IEC JTC1/SC22/WG14. */\r
+#include <stdint.h>\r
+\r
+#include <USBRequests.h>\r
+#include <CDCRequests.h>\r
+#include <CDCNotifications.h>\r
+#include "USBD.h"\r
+#include <USBDDriver.h>\r
+/** \addtogroup usbd_cdc\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Defines\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_serial_desc USB Device Serial Port Descriptor Values\r
+ * @{\r
+ */\r
+/** Default CDC interrupt endpoints max packat size (8). */\r
+#define CDCDSerialPort_INTERRUPT_MAXPACKETSIZE 8\r
+/** Default CDC interrupt endpoint polling rate of High Speed (16ms). */\r
+#define CDCDSerialPort_INTERRUPT_INTERVAL_HS 8\r
+/** Default CDC interrupt endpoint polling rate of Full Speed (16ms). */\r
+#define CDCDSerialPort_INTERRUPT_INTERVAL_FS 16\r
+/** Default CDC bulk endpoints max packat size (512, for HS actually). */\r
+#define CDCDSerialPort_BULK_MAXPACKETSIZE_HS 512\r
+/** Default CDC bulk endpoints max packat size (64, for FS actually). */\r
+#define CDCDSerialPort_BULK_MAXPACKETSIZE_FS 64\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_cdc_serial_events USB Device Serial Port Events\r
+ * @{\r
+ */\r
+/** SetControlLineState event, value is changed */\r
+#define CDCDSerialPortEvent_SETCONTROLLINESTATE 0\r
+/** SetLineCoding event, value is to changed according to return value */\r
+#define CDCDSerialPortEvent_SETLINECODING 1\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** Callback function for serial port events */\r
+typedef uint32_t (*CDCDSerialPortEventHandler)(uint32_t dwEvent,\r
+ uint32_t dwParam,\r
+ void * pArguments);\r
+\r
+/**\r
+ * Struct for USB CDC virtual COM serial port function.\r
+ */\r
+typedef struct _CDCDSerialPort {\r
+ /** USB Driver for the %device */\r
+ USBDDriver *pUsbd;\r
+ /** Callback for serial port events */\r
+ CDCDSerialPortEventHandler fEventHandler;\r
+ /** Callback arguments */\r
+ void *pArg;\r
+ /** USB starting interface index */\r
+ uint8_t bInterfaceNdx;\r
+ /** USB number of interfaces */\r
+ uint8_t bNumInterface;\r
+ /** USB interrupt IN endpoint address */\r
+ uint8_t bIntInPIPE;\r
+ /** USB bulk IN endpoint address */\r
+ uint8_t bBulkInPIPE;\r
+ /** USB bulk OUT endpoint address */\r
+ uint8_t bBulkOutPIPE;\r
+\r
+ /** Serial port ControlLineState */\r
+ uint8_t bControlLineState;\r
+ /** Serial port SerialState */\r
+ uint16_t wSerialState;\r
+ /** Serial port linecoding */\r
+ CDCLineCoding lineCoding;\r
+\r
+ uint8_t bReserved;\r
+} CDCDSerialPort;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+extern void CDCDSerialPort_Initialize(CDCDSerialPort *pCdcd,\r
+ USBDDriver *pUsbd,\r
+ CDCDSerialPortEventHandler fCallback,\r
+ void *pArg,\r
+ uint8_t firstInterface,\r
+ uint8_t numInterface);\r
+\r
+extern USBGenericDescriptor * CDCDSerialPort_ParseInterfaces(\r
+ CDCDSerialPort * pCdcd,\r
+ USBGenericDescriptor * pDescriptors, uint32_t dwLength);\r
+\r
+extern uint32_t CDCDSerialPort_RequestHandler(\r
+ CDCDSerialPort *pCdcd,\r
+ const USBGenericRequest *pRequest);\r
+\r
+extern uint32_t CDCDSerialPort_Write(\r
+ const CDCDSerialPort *pCdcd,\r
+ void *pData, uint32_t dwSize,\r
+ TransferCallback fCallback, void* pArg);\r
+\r
+extern uint32_t CDCDSerialPort_Read(\r
+ const CDCDSerialPort *pCdcd,\r
+ void *pData, uint32_t dwSize,\r
+ TransferCallback fCallback, void* pArg);\r
+\r
+extern uint16_t CDCDSerialPort_GetSerialState(\r
+ const CDCDSerialPort *pCdcd);\r
+\r
+extern void CDCDSerialPort_SetSerialState(\r
+ CDCDSerialPort *pCdcd,\r
+ uint16_t wSerialState);\r
+\r
+extern uint8_t CDCDSerialPort_GetControlLineState(\r
+ const CDCDSerialPort * pCdcd);\r
+\r
+extern void CDCDSerialPort_GetLineCoding(\r
+ const CDCDSerialPort * pCdcd,\r
+ CDCLineCoding * pLineCoding);\r
+\r
+/**@}*/\r
+#endif /* #ifndef _CDCDSERIALPORT_H_ */\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * Definitions and classes for USB CDC class descriptors.\r
+ */\r
+\r
+#ifndef _CDCDESCRIPTORS_H_\r
+#define _CDCDESCRIPTORS_H_\r
+/** \addtogroup usb_cdc\r
+ *@{\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Includes\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Definitions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usb_cdc_ver USB CDC Specification Release Numbers\r
+ * @{\r
+ * This section list the CDC Spec. Release Numbers.\r
+ * - \ref CDCGenericDescriptor_CDC1_10\r
+ */\r
+ \r
+/** Identify CDC specification version 1.10. */\r
+#define CDCGenericDescriptor_CDC1_10 0x0110\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_desc_type CDC Descriptro Types\r
+ * @{\r
+ * This section lists CDC descriptor types.\r
+ * - \ref CDCGenericDescriptor_INTERFACE\r
+ * - \ref CDCGenericDescriptor_ENDPOINT\r
+ */\r
+/**Indicates that a CDC descriptor applies to an interface. */\r
+#define CDCGenericDescriptor_INTERFACE 0x24\r
+/** Indicates that a CDC descriptor applies to an endpoint. */\r
+#define CDCGenericDescriptor_ENDPOINT 0x25\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_desc_subtype CDC Descriptor Subtypes\r
+ * @{\r
+ * This section lists CDC descriptor sub types\r
+ * - \ref CDCGenericDescriptor_HEADER\r
+ * - \ref CDCGenericDescriptor_CALLMANAGEMENT\r
+ * - \ref CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT\r
+ * - \ref CDCGenericDescriptor_UNION\r
+ */\r
+\r
+/** Header functional descriptor subtype. */\r
+#define CDCGenericDescriptor_HEADER 0x00\r
+/** Call management functional descriptor subtype. */\r
+#define CDCGenericDescriptor_CALLMANAGEMENT 0x01\r
+/** Abstract control management descriptor subtype. */\r
+#define CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT 0x02\r
+/** Union descriptor subtype. */\r
+#define CDCGenericDescriptor_UNION 0x06\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_descriptor USB CDC Device Descriptor Values\r
+ * @{\r
+ * This section lists the values for CDC Device Descriptor.\r
+ * - \ref CDCDeviceDescriptor_CLASS\r
+ * - \ref CDCDeviceDescriptor_SUBCLASS\r
+ * - \ref CDCDeviceDescriptor_PROTOCOL\r
+ */\r
+/** Device class code when using the CDC class. */\r
+#define CDCDeviceDescriptor_CLASS 0x02\r
+/** Device subclass code when using the CDC class. */\r
+#define CDCDeviceDescriptor_SUBCLASS 0x00\r
+/** Device protocol code when using the CDC class. */\r
+#define CDCDeviceDescriptor_PROTOCOL 0x00\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_if_desc USB CDC Communication Interface Descriptor\r
+ * @{\r
+ * This section lists the values for CDC Communication Interface Descriptor.\r
+ * - \ref CDCCommunicationInterfaceDescriptor_CLASS\r
+ * - \ref CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL\r
+ * - \ref CDCCommunicationInterfaceDescriptor_NOPROTOCOL\r
+ */\r
+/** Interface class code for a CDC communication class interface. */\r
+#define CDCCommunicationInterfaceDescriptor_CLASS 0x02\r
+/** Interface subclass code for an Abstract Control Model interface descriptor.\r
+ */\r
+#define CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL 0x02\r
+/** Interface protocol code when a CDC communication interface does not\r
+ implemenent any particular protocol. */\r
+#define CDCCommunicationInterfaceDescriptor_NOPROTOCOL 0x00\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_data_if USB CDC Data Interface Values\r
+ * @{\r
+ * This section lists the values for CDC Data Interface Descriptor.\r
+ * - \ref CDCDataInterfaceDescriptor_CLASS\r
+ * - \ref CDCDataInterfaceDescriptor_SUBCLASS\r
+ * - \ref CDCDataInterfaceDescriptor_NOPROTOCOL\r
+ */\r
+ \r
+/** Interface class code for a data class interface. */\r
+#define CDCDataInterfaceDescriptor_CLASS 0x0A\r
+/** Interface subclass code for a data class interface. */\r
+#define CDCDataInterfaceDescriptor_SUBCLASS 0x00\r
+/** Protocol code for a data class interface which does not implement any\r
+ particular protocol. */\r
+#define CDCDataInterfaceDescriptor_NOPROTOCOL 0x00\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_cb_man_desc USB CDC CallManagement Capabilities\r
+ * @{\r
+ * This section lists CDC CallManagement Capabilities.\r
+ * - \ref CDCCallManagementDescriptor_SELFCALLMANAGEMENT\r
+ * - \ref CDCCallManagementDescriptor_DATACALLMANAGEMENT\r
+ */\r
+/** Device handles call management itself. */\r
+#define CDCCallManagementDescriptor_SELFCALLMANAGEMENT (1 << 0)\r
+/** Device can exchange call management information over a Data class interface.\r
+ */\r
+#define CDCCallManagementDescriptor_DATACALLMANAGEMENT (1 << 1)\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_acm USB CDC ACM Capabilities\r
+ * @{\r
+ *\r
+ * This section lists the capabilities of the CDC ACM.\r
+ * - \ref CDCAbstractControlManagementDescriptor_COMMFEATURE\r
+ * - \ref CDCAbstractControlManagementDescriptor_LINE\r
+ * - \ref CDCAbstractControlManagementDescriptor_SENDBREAK\r
+ * - \ref CDCAbstractControlManagementDescriptor_NETWORKCONNECTION\r
+ */\r
+ \r
+/** Device supports the request combination of SetCommFeature, ClearCommFeature\r
+ and GetCommFeature. */\r
+#define CDCAbstractControlManagementDescriptor_COMMFEATURE (1 << 0)\r
+/** Device supports the request combination of SetLineCoding, GetLineCoding and\r
+ SetControlLineState. */\r
+#define CDCAbstractControlManagementDescriptor_LINE (1 << 1)\r
+/** Device supports the SendBreak request. */\r
+#define CDCAbstractControlManagementDescriptor_SENDBREAK (1 << 2)\r
+/** Device supports the NetworkConnection notification. */\r
+#define CDCAbstractControlManagementDescriptor_NETWORKCONNECTION (1 << 3)\r
+/** @}*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Types\r
+ *----------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ * \typedef CDCHeaderDescriptor\r
+ * \brief Marks the beginning of the concatenated set of functional descriptors\r
+ * for the interface.\r
+ */\r
+typedef struct _CDCHeaderDescriptor {\r
+\r
+ /** Size of this descriptor in bytes. */\r
+ uint8_t bFunctionLength;\r
+ /** Descriptor type . */\r
+ uint8_t bDescriptorType;\r
+ /** Descriptor sub-type . */\r
+ uint8_t bDescriptorSubtype;\r
+ /** USB CDC specification release number. */\r
+ uint16_t bcdCDC;\r
+\r
+} __attribute__ ((__packed__)) CDCHeaderDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef CDCUnionDescriptor\r
+ * \brief Describes the relationship between a group of interfaces that can\r
+ * be considered to form a functional unit.\r
+ */\r
+typedef struct _CDCUnionDescriptor {\r
+\r
+ /** Size of the descriptor in bytes. */\r
+ uint8_t bFunctionLength;\r
+ /** Descriptor type . */\r
+ uint8_t bDescriptorType;\r
+ /** Descriptor subtype . */\r
+ uint8_t bDescriptorSubtype;\r
+ /** Number of the master interface for this union. */\r
+ uint8_t bMasterInterface;\r
+ /** Number of the first slave interface for this union. */\r
+ uint8_t bSlaveInterface0;\r
+\r
+} __attribute__ ((__packed__)) CDCUnionDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef CDCCallManagementDescriptor\r
+ * \brief Describes the processing of calls for the communication class\r
+ * interface.\r
+ */\r
+typedef struct _CDCCallManagementDescriptor {\r
+\r
+ /** Size of this descriptor in bytes. */\r
+ uint8_t bFunctionLength;\r
+ /** Descriptor type . */\r
+ uint8_t bDescriptorType;\r
+ /** Descriptor sub-type . */\r
+ uint8_t bDescriptorSubtype;\r
+ /** Configuration capabilities\r
+ \sa usb_cdc_cb_man_desc CDC CallManagement Capabilities. */\r
+ uint8_t bmCapabilities;\r
+ /** Interface number of the data class interface used for call management\r
+ (optional). */\r
+ uint8_t bDataInterface;\r
+\r
+} __attribute__ ((__packed__)) CDCCallManagementDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef CDCAbstractControlManagementDescriptor\r
+ * \brief Describes the command supported by the communication interface class\r
+ * with the Abstract Control Model subclass code.\r
+ */\r
+typedef struct _CDCAbstractControlManagementDescriptor {\r
+\r
+ /** Size of this descriptor in bytes. */\r
+ uint8_t bFunctionLength;\r
+ /** Descriptor type . */\r
+ uint8_t bDescriptorType;\r
+ /** Descriptor subtype . */\r
+ uint8_t bDescriptorSubtype;\r
+ /** Configuration capabilities.\r
+ \sa usb_cdc_acm CDC ACM Capabilities. */\r
+ uint8_t bmCapabilities;\r
+\r
+} __attribute__ ((__packed__)) CDCAbstractControlManagementDescriptor; /* GCC */\r
+\r
+#pragma pack()\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+\r
+/**@}*/\r
+#endif /* #ifndef _CDCDESCRIPTORS_H_ */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Definitions and methods for USB composite device implement.\r
+ * \r
+ * \section Usage\r
+ * \r
+ * -# Initialize USB function specified driver ( for MSD currently )\r
+ * - MSDDFunctionDriver_Initialize()\r
+ *\r
+ * -# Initialize USB composite driver and USB driver\r
+ * - CDCHIDDDriver_Initialize()\r
+ *\r
+ * -# Handle and dispach USB requests\r
+ * - CDCHIDDDriver_RequestHandler()\r
+ *\r
+ * -# Try starting a remote wake-up sequence\r
+ * - CDCHIDDDriver_RemoteWakeUp()\r
+ */\r
+\r
+#ifndef CDCHIDDDRIVER_H\r
+#define CDCHIDDDRIVER_H\r
+/** \addtogroup usbd_composite_cdchid\r
+ *@{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include <USBRequests.h>\r
+#include <CDCDescriptors.h>\r
+#include <HIDDescriptors.h>\r
+#include "USBD.h"\r
+#include <USBDDriver.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_hid_desc USB CDC(Serial) + HID(Kbd) Descriptors define\r
+ * @{\r
+ */\r
+/** Number of interfaces of the device */\r
+#define CDCHIDDDriverDescriptors_NUMINTERFACE 3\r
+/** Number of the CDC interface. */\r
+#define CDCHIDDDriverDescriptors_CDC_INTERFACE 0\r
+/** Number of the HID interface. */\r
+#define CDCHIDDDriverDescriptors_HID_INTERFACE 2\r
+/** @}*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ * \typedef CdcHidDriverConfigurationDescriptors\r
+ * \brief Configuration descriptor list for a device implementing a\r
+ * composite driver.\r
+ */\r
+typedef struct _CdcHidDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+\r
+ /* --- CDC 0 */\r
+ /** IAD 0 */\r
+ USBInterfaceAssociationDescriptor cdcIAD0;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication0;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader0;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement0;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion0;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification0;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData0;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut0;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn0;\r
+\r
+ /* --- HID */\r
+ USBInterfaceDescriptor hidInterface;\r
+ HIDDescriptor1 hid;\r
+ USBEndpointDescriptor hidInterruptIn;\r
+ USBEndpointDescriptor hidInterruptOut;\r
+\r
+} __attribute__ ((__packed__)) CdcHidDriverConfigurationDescriptors;\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* -CDCHID */\r
+extern void CDCHIDDDriver_Initialize(\r
+ const USBDDriverDescriptors * pDescriptors);\r
+\r
+extern void CDCHIDDDriver_ConfigurationChangedHandler(uint8_t cfgnum);\r
+\r
+extern void CDCHIDDDriver_RequestHandler(const USBGenericRequest *request);\r
+\r
+extern void CDCHIDDDriver_RemoteWakeUp(void);\r
+\r
+/**@}*/\r
+#endif //#ifndef CDCHIDDDRIVER_H\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Definitions and methods for USB CDCMSD device implement.\r
+ * \r
+ * \section Usage\r
+ * \r
+ * -# Initialize USB function specified driver ( for MSD currently )\r
+ * - MSDDFunctionDriver_Initialize\r
+ *\r
+ * -# Initialize USB CDCMSD driver and USB driver\r
+ * - CDCMSDDDriver_Initialize\r
+ *\r
+ * -# Handle and dispach USB requests\r
+ * - CDCMSDDDriver_RequestHandler\r
+ *\r
+ * -# Try starting a remote wake-up sequence\r
+ * - CDCMSDDDriver_RemoteWakeUp\r
+ */\r
+\r
+#ifndef CDCMSDDDRIVER_H\r
+#define CDCMSDDDRIVER_H\r
+/** \addtogroup usbd_composite_cdcmsd\r
+ *@{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include <USBRequests.h>\r
+#include <CDCDescriptors.h>\r
+#include <MSDescriptors.h>\r
+#include <MSDLun.h>\r
+#include "USBD.h"\r
+#include <USBDDriver.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Consts\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_cdc_msd_desc USB CDC(Serial) + MS Descriptors define\r
+ * @{\r
+ */\r
+/** Number of interfaces of the device */\r
+#define CDCMSDDriverDescriptors_NUMINTERFACE 3\r
+/** Number of the CDC interface. */\r
+#define CDCMSDDriverDescriptors_CDC_INTERFACE 0\r
+/** Number of the HID interface. */\r
+#define CDCMSDDriverDescriptors_MSD_INTERFACE 2\r
+/** @}*/\r
+\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ * \typedef CDCMSDDriverConfigurationDescriptors\r
+ * \brief Configuration descriptor list for a device implementing\r
+ * a CDCMSD driver.\r
+ */\r
+typedef struct _CDCMSDDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+\r
+ /* --- CDC 0 */\r
+ /** IAD 0 */\r
+ USBInterfaceAssociationDescriptor cdcIAD0;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication0;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader0;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement0;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion0;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification0;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData0;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut0;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn0;\r
+\r
+ /* --- MSD */\r
+ /** Mass storage interface descriptor. */\r
+ USBInterfaceDescriptor msdInterface;\r
+ /** Bulk-out endpoint descriptor. */\r
+ USBEndpointDescriptor msdBulkOut;\r
+ /** Bulk-in endpoint descriptor. */\r
+ USBEndpointDescriptor msdBulkIn;\r
+\r
+} __attribute__ ((__packed__)) CDCMSDDriverConfigurationDescriptors;\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* -CDCMSD */\r
+extern void CDCMSDDriver_Initialize(\r
+ const USBDDriverDescriptors *pDescriptors,\r
+ MSDLun *pLuns, unsigned char numLuns);\r
+\r
+extern void CDCMSDDriver_ConfigurationChangedHandler(unsigned char cfgnum);\r
+\r
+extern void CDCMSDDriver_RequestHandler(const USBGenericRequest *request);\r
+\r
+/**@}*/\r
+#endif /* #ifndef CDCMSDDDRIVER_H */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * Definitions and methods for USB CDC Notifications.\r
+ */\r
+\r
+#ifndef _CDCNOTIFICATIONS_H_\r
+#define _CDCNOTIFICATIONS_H_\r
+/** \addtogroup usb_cdc\r
+ *@{\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Includes\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Definitions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup cdc_serial_states CDC SerialState bits\r
+ * @{\r
+ * This page lists the bit map for CDC Serial States.\r
+ *\r
+ * - \ref CDCSerialState_RXDRIVER\r
+ * - \ref CDCSerialState_TXCARRIER\r
+ * - \ref CDCSerialState_BREAK\r
+ * - \ref CDCSerialState_RINGSIGNAL\r
+ * - \ref CDCSerialState_FRAMING\r
+ * - \ref CDCSerialState_PARITY\r
+ * - \ref CDCSerialState_OVERRUN\r
+ */\r
+\r
+/** Indicates the receiver carrier signal is present */\r
+#define CDCSerialState_RXDRIVER (1 << 0)\r
+/** Indicates the transmission carrier signal is present */\r
+#define CDCSerialState_TXCARRIER (1 << 1)\r
+/** Indicates a break has been detected */\r
+#define CDCSerialState_BREAK (1 << 2)\r
+/** Indicates a ring signal has been detected */\r
+#define CDCSerialState_RINGSIGNAL (1 << 3)\r
+/** Indicates a framing error has occured */\r
+#define CDCSerialState_FRAMING (1 << 4)\r
+/** Indicates a parity error has occured */\r
+#define CDCSerialState_PARITY (1 << 5)\r
+/** Indicates a data overrun error has occured */\r
+#define CDCSerialState_OVERRUN (1 << 6)\r
+/** @}*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Types\r
+ *----------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/** USB CDC SerialState struct (bitmap) */\r
+typedef struct _CDCSerialState {\r
+ uint16_t bRxCarrier:1, /**< State of receive carrier detection (V2.4 signal\r
+ 109 and RS-232 signal DCD) */\r
+ bTxCarrier:1, /**< State of transmission carrier */\r
+ bBreak:1, /**< State of break detection */\r
+ bRingSignal:1, /**< State of ring signal */\r
+ bFraming:1, /**< Framing error */\r
+ bParity:1, /**< Parity error */\r
+ bOverRun:1, /**< Received data discarded due to overrun error */\r
+ reserved:9; /**< Reserved */\r
+} __attribute__ ((__packed__)) CDCSerialState;\r
+\r
+#pragma pack()\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/**@}*/\r
+#endif /* #ifndef _CDCNOTIFICATIONS_H_ */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ *\r
+ * Definitions and classes for USB CDC class requests\r
+ * (mostly for ACM).\r
+ *\r
+ * \section CDCLineCoding\r
+ *\r
+ * -# Initialize a CDCLineCoding instance using CDCLineCoding_Initialize.\r
+ * -# Send a CDCLineCoding object to the host in response to a GetLineCoding\r
+ * request.\r
+ * -# Receive a CDCLineCoding object from the host after a SetLineCoding\r
+ * request.\r
+ * \r
+ */\r
+\r
+#ifndef _CDCREQUESTS_H_\r
+#define _CDCREQUESTS_H_\r
+/** \addtogroup usb_cdc\r
+ *@{\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Includes\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+\r
+#include <USBRequests.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Definitions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usb_cdc_request USB CDC Request Codes\r
+ * @{\r
+ * This section lists USB CDC Request Codes.\r
+ * - \ref CDCGenericRequest_SETLINECODING\r
+ * - \ref CDCGenericRequest_GETLINECODING\r
+ * - \ref CDCGenericRequest_SETCONTROLLINESTATE\r
+ */\r
+\r
+/** SetLineCoding request code. */\r
+#define CDCGenericRequest_SETLINECODING 0x20\r
+/** GetLineCoding request code. */\r
+#define CDCGenericRequest_GETLINECODING 0x21\r
+/** SetControlLineState request code. */\r
+#define CDCGenericRequest_SETCONTROLLINESTATE 0x22\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_ctrl_line_state USB CDC ControlLineState bitmap\r
+ * @{\r
+ * This section lists CDC ControlLineState bitmap.\r
+ * - \ref CDCControlLineState_DTR, CDCControlLineState_DTE_PRESENT\r
+ * - \ref CDCControlLineState_RTS, CDCControlLineState_CARRIER_ON\r
+ */\r
+/** Indicates to DCE if DTE is present or not. */\r
+#define CDCControlLineState_DTE_PRESENT (1 << 0)\r
+/** RS232 signal DTR: Data Terminal Ready. */\r
+#define CDCControlLineState_DTR (1 << 0)\r
+/** Carrier control for half duplex modems. */\r
+#define CDCControlLineState_CARRIER_ON (1 << 1)\r
+/** RS232 signal RTS: Request to send. */\r
+#define CDCControlLineState_RTS (1 << 1)\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_stop USB CDC LineCoding StopBits\r
+ * @{\r
+ * This section lists Stop Bits for CDC Line Coding.\r
+ * - \ref CDCLineCoding_ONESTOPBIT\r
+ * - \ref CDCLineCoding_ONE5STOPBIT\r
+ * - \ref CDCLineCoding_TWOSTOPBITS\r
+ */\r
+/** The transmission protocol uses one stop bit. */\r
+#define CDCLineCoding_ONESTOPBIT 0\r
+/** The transmission protocol uses 1.5 stop bit. */\r
+#define CDCLineCoding_ONE5STOPBIT 1\r
+/** The transmissin protocol uses two stop bits. */\r
+#define CDCLineCoding_TWOSTOPBITS 2\r
+/** @}*/\r
+\r
+/** \addtogroup usb_cdc_parity USB CDC LineCoding ParityCheckings\r
+ * @{\r
+ * This section lists Parity checkings for CDC Line Coding.\r
+ * - \ref CDCLineCoding_NOPARITY\r
+ * - \ref CDCLineCoding_ODDPARITY\r
+ * - \ref CDCLineCoding_EVENPARITY\r
+ * - \ref CDCLineCoding_MARKPARITY\r
+ * - \ref CDCLineCoding_SPACEPARITY\r
+ */\r
+/** No parity checking. */\r
+#define CDCLineCoding_NOPARITY 0\r
+/** Odd parity checking. */\r
+#define CDCLineCoding_ODDPARITY 1\r
+/** Even parity checking. */\r
+#define CDCLineCoding_EVENPARITY 2\r
+/** Mark parity checking. */\r
+#define CDCLineCoding_MARKPARITY 3\r
+/** Space parity checking. */\r
+#define CDCLineCoding_SPACEPARITY 4\r
+/** @}*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Types\r
+ *----------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+\r
+/**\r
+ * \typedef CDCLineCoding\r
+ * \brief Format of the data returned when a GetLineCoding request is received.\r
+ */\r
+typedef struct _CDCLineCoding {\r
+\r
+ /** Data terminal rate in bits per second. */\r
+ uint32_t dwDTERate;\r
+ /** Number of stop bits.\r
+ \sa usb_cdc_stop CDC LineCoding StopBits. */\r
+ uint8_t bCharFormat;\r
+ /** Type of parity checking used.\r
+ \sa usb_cdc_parity CDC LineCoding ParityCheckings. */\r
+ uint8_t bParityType;\r
+ /** Number of data bits (5, 6, 7, 8 or 16). */\r
+ uint8_t bDataBits;\r
+\r
+} __attribute__ ((__packed__)) CDCLineCoding; /* GCC */\r
+\r
+#pragma pack()\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+extern uint8_t CDCSetControlLineStateRequest_IsDtePresent(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t CDCSetControlLineStateRequest_ActivateCarrier(\r
+ const USBGenericRequest *request);\r
+\r
+extern void CDCLineCoding_Initialize(CDCLineCoding *lineCoding,\r
+ uint32_t bitrate,\r
+ uint8_t stopbits,\r
+ uint8_t parity,\r
+ uint8_t databits);\r
+\r
+\r
+/**@}*/\r
+#endif /* #define _CDCREQUESTS_H_ */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Definitions and methods for USB composite device implement.\r
+ * \r
+ */\r
+\r
+#ifndef DUALCDCDDRIVER_H\r
+#define DUALCDCDDRIVER_H\r
+/** \addtogroup usbd_composite_cdccdc\r
+ *@{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+#include <USBRequests.h>\r
+#include <CDCDescriptors.h>\r
+\r
+#include "USBD.h"\r
+#include <CDCDSerialPort.h>\r
+\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Defines\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_composite_cdccdc_desc\r
+ * The driver uses these interface numbers in configuration descriptor.\r
+ * @{\r
+ */\r
+/** Number of interfaces of the device */\r
+#define DUALCDCDDriverDescriptors_NUMINTERFACE 4\r
+/** Number of the CDC0 interface. */\r
+#define DUALCDCDDriverDescriptors_INTERFACENUM0 0\r
+/** Number of the CDC1 interface. */\r
+#define DUALCDCDDriverDescriptors_INTERFACENUM1 2\r
+/** @}*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ * \typedef DualCdcDriverConfigurationDescriptors\r
+ * \brief Configuration descriptor list for a device implementing a\r
+ * dual CDC serial composite driver.\r
+ */\r
+typedef struct _DualCdcDriverConfigurationDescriptors {\r
+\r
+ /** Standard configuration descriptor. */\r
+ USBConfigurationDescriptor configuration;\r
+\r
+ /* --- CDC 0 */\r
+ /** IAD 0 */\r
+ USBInterfaceAssociationDescriptor cdcIAD0;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication0;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader0;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement0;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion0;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification0;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData0;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut0;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn0;\r
+\r
+ /* --- CDC 1 */\r
+ /** IAD 1 */\r
+ USBInterfaceAssociationDescriptor cdcIAD1;\r
+ /** Communication interface descriptor */\r
+ USBInterfaceDescriptor cdcCommunication1;\r
+ /** CDC header functional descriptor. */\r
+ CDCHeaderDescriptor cdcHeader1;\r
+ /** CDC call management functional descriptor. */\r
+ CDCCallManagementDescriptor cdcCallManagement1;\r
+ /** CDC abstract control management functional descriptor. */\r
+ CDCAbstractControlManagementDescriptor cdcAbstractControlManagement1;\r
+ /** CDC union functional descriptor (with one slave interface). */\r
+ CDCUnionDescriptor cdcUnion1;\r
+ /** Notification endpoint descriptor. */\r
+ USBEndpointDescriptor cdcNotification1;\r
+ /** Data interface descriptor. */\r
+ USBInterfaceDescriptor cdcData1;\r
+ /** Data OUT endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataOut1;\r
+ /** Data IN endpoint descriptor. */\r
+ USBEndpointDescriptor cdcDataIn1;\r
+\r
+} __attribute__ ((__packed__)) DualCdcDriverConfigurationDescriptors;\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* -DUALCDC */\r
+extern void DUALCDCDDriver_Initialize(\r
+ const USBDDriverDescriptors* pDescriptors);\r
+\r
+extern void DUALCDCDDriver_ConfigurationChangeHandler(uint8_t cfgnum);\r
+\r
+extern void DUALCDCDDriver_RequestHandler(const USBGenericRequest *request);\r
+\r
+extern CDCDSerialPort* DUALCDCDDriver_GetSerialPort(uint32_t port);\r
+\r
+/**@}*/\r
+#endif /* #ifndef DUALCDCDDRIVER_H */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \section Purpose\r
+ *\r
+ * SCSI definitions.\r
+ *\r
+ * \section Usage\r
+ *\r
+ * -# After command block received, Access and decode the SCSI command block\r
+ * with SBCCommand structure.\r
+ */\r
+\r
+#ifndef SBC_H\r
+#define SBC_H\r
+\r
+/** \addtogroup usbd_msd\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_sbc_operation_codes SBC Operation Codes\r
+ * @{\r
+ * This page lists operation codes of commands described in the SBC-3\r
+ * standard.\r
+ *\r
+ * \note That most commands are actually defined in other standards,\r
+ * like SPC-4. Optional commands are not included here.\r
+ *\r
+ * \see sbc3r07.pdf - Section 5.1 - Table 12\r
+ * \see spc4r06.pdf\r
+ * \see SBCCommand\r
+ *\r
+ * \section Codes\r
+ * - SBC_INQUIRY\r
+ * - SBC_READ_10\r
+ * - SBC_READ_CAPACITY_10\r
+ * - SBC_REQUEST_SENSE\r
+ * - SBC_TEST_UNIT_READY\r
+ * - SBC_WRITE_10\r
+ *\r
+ * \section Optional Codes but required by Windows\r
+ * - SBC_PREVENT_ALLOW_MEDIUM_REMOVAL\r
+ * - SBC_MODE_SENSE_6\r
+ * - SBC_VERIFY_10\r
+ * - SBC_READ_FORMAT_CAPACITIES\r
+ */\r
+\r
+/** Request information regarding parameters of the target and Logical Unit. */\r
+#define SBC_INQUIRY 0x12\r
+/** Request the transfer data to the host. */\r
+#define SBC_READ_10 0x28\r
+/** Request capacities of the currently installed medium. */\r
+#define SBC_READ_CAPACITY_10 0x25\r
+/** Request that the device server transfer sense data. */\r
+#define SBC_REQUEST_SENSE 0x03\r
+/** Check if the LUN is ready */\r
+#define SBC_TEST_UNIT_READY 0x00\r
+/** Request that the device write the data transferred by the host. */\r
+#define SBC_WRITE_10 0x2A\r
+\r
+/** Request that the target enable or disable the removal of the medium in */\r
+/** the Logical Unit. */\r
+#define SBC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E\r
+/** Report parameters. */\r
+#define SBC_MODE_SENSE_6 0x1A\r
+/** Request that the %device verify the data on the medium. */\r
+#define SBC_VERIFY_10 0x2F\r
+/** Request a list of the possible capacities that can be formatted on medium */\r
+#define SBC_READ_FORMAT_CAPACITIES 0x23\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_sbc_periph_quali SBC Periph. Qualifiers\r
+ * @{\r
+ * This page lists the peripheral qualifier values specified in the INQUIRY\r
+ * data\r
+ * \see spc4r06.pdf - Section 6.4.2 - Table 83\r
+ * \see SBCInquiryData\r
+ *\r
+ * \section Qualifiers\r
+ * - SBC_PERIPHERAL_DEVICE_CONNECTED\r
+ * - SBC_PERIPHERAL_DEVICE_NOT_CONNECTED\r
+ * - SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED\r
+ */\r
+\r
+#define SBC_PERIPHERAL_DEVICE_CONNECTED 0x00\r
+#define SBC_PERIPHERAL_DEVICE_NOT_CONNECTED 0x01\r
+#define SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED 0x03\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_sbc_periph_types SBC Periph. Types\r
+ * @{\r
+ * This page lists peripheral device types specified in the INQUIRY data\r
+ * \see spc4r06.pdf - Section 6.4.2 - Table 84\r
+ * \see SBCInquiryData\r
+ *\r
+ * \section Types\r
+ * - SBC_DIRECT_ACCESS_BLOCK_DEVICE\r
+ * - SBC_SEQUENTIAL_ACCESS_DEVICE\r
+ * - SBC_PRINTER_DEVICE\r
+ * - SBC_PROCESSOR_DEVICE\r
+ * - SBC_WRITE_ONCE_DEVICE\r
+ * - SBC_CD_DVD_DEVICE\r
+ * - SBC_SCANNER_DEVICE\r
+ * - SBC_OPTICAL_MEMORY_DEVICE\r
+ * - SBC_MEDIA_CHANGER_DEVICE\r
+ * - SBC_COMMUNICATION_DEVICE\r
+ * - SBC_STORAGE_ARRAY_CONTROLLER_DEVICE\r
+ * - SBC_ENCLOSURE_SERVICES_DEVICE\r
+ * - SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE\r
+ * - SBC_OPTICAL_CARD_READER_WRITER_DEVICE\r
+ * - SBC_BRIDGE_CONTROLLER_COMMANDS\r
+ * - SBC_OBJECT_BASED_STORAGE_DEVICE\r
+ */\r
+\r
+#define SBC_DIRECT_ACCESS_BLOCK_DEVICE 0x00\r
+#define SBC_SEQUENTIAL_ACCESS_DEVICE 0x01\r
+#define SBC_PRINTER_DEVICE 0x02\r
+#define SBC_PROCESSOR_DEVICE 0x03\r
+#define SBC_WRITE_ONCE_DEVICE 0x04\r
+#define SBC_CD_DVD_DEVICE 0x05\r
+#define SBC_SCANNER_DEVICE 0x06\r
+#define SBC_OPTICAL_MEMORY_DEVICE 0x07\r
+#define SBC_MEDIA_CHANGER_DEVICE 0x08\r
+#define SBC_COMMUNICATION_DEVICE 0x09\r
+#define SBC_STORAGE_ARRAY_CONTROLLER_DEVICE 0x0C\r
+#define SBC_ENCLOSURE_SERVICES_DEVICE 0x0D\r
+#define SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE 0x0E\r
+#define SBC_OPTICAL_CARD_READER_WRITER_DEVICE 0x0F\r
+#define SBC_BRIDGE_CONTROLLER_COMMANDS 0x10\r
+#define SBC_OBJECT_BASED_STORAGE_DEVICE 0x11\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief Version value for the SBC-3 specification */\r
+/** \see spc4r06.pdf - Section 6.4.2 - Table 85 */\r
+#define SBC_SPC_VERSION_4 0x06\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief Values for the TPGS field returned in INQUIRY data */\r
+/** \see spc4r06.pdf - Section 6.4.2 - Table 86 */\r
+#define SBC_TPGS_NONE 0x0\r
+#define SBC_TPGS_ASYMMETRIC 0x1\r
+#define SBC_TPGS_SYMMETRIC 0x2\r
+#define SBC_TPGS_BOTH 0x3\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief Version descriptor value for the SBC-3 specification */\r
+/** \see spc4r06.pdf - Section 6.4.2 - Table 87 */\r
+#define SBC_VERSION_DESCRIPTOR_SBC_3 0x04C0\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/** \addtogroup usbd_sbc_secse_codes SBC Sense Response Codes\r
+ * @{\r
+ * This page lists sense data response codes returned in REQUEST SENSE data\r
+ * \see spc4r06.pdf - Section 4.5.1 - Table 12\r
+ *\r
+ * \section Codes\r
+ * - SBC_SENSE_DATA_FIXED_CURRENT\r
+ * - SBC_SENSE_DATA_FIXED_DEFERRED\r
+ * - SBC_SENSE_DATA_DESCRIPTOR_CURRENT\r
+ * - SBC_SENSE_DATA_DESCRIPTOR_DEFERRED\r
+ */\r
+\r
+#define SBC_SENSE_DATA_FIXED_CURRENT 0x70\r
+#define SBC_SENSE_DATA_FIXED_DEFERRED 0x71\r
+#define SBC_SENSE_DATA_DESCRIPTOR_CURRENT 0x72\r
+#define SBC_SENSE_DATA_DESCRIPTOR_DEFERRED 0x73\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_sbc_sense_keys SBC Sense Keys\r
+ * @{\r
+ * This page lists sense key values returned in the REQUEST SENSE data\r
+ * \see spc4r06.pdf - Section 4.5.6 - Table 27\r
+ *\r
+ * \section Keys\r
+ * - SBC_SENSE_KEY_NO_SENSE\r
+ * - SBC_SENSE_KEY_RECOVERED_ERROR\r
+ * - SBC_SENSE_KEY_NOT_READY\r
+ * - SBC_SENSE_KEY_MEDIUM_ERROR\r
+ * - SBC_SENSE_KEY_HARDWARE_ERROR\r
+ * - SBC_SENSE_KEY_ILLEGAL_REQUEST\r
+ * - SBC_SENSE_KEY_UNIT_ATTENTION\r
+ * - SBC_SENSE_KEY_DATA_PROTECT\r
+ * - SBC_SENSE_KEY_BLANK_CHECK\r
+ * - SBC_SENSE_KEY_VENDOR_SPECIFIC\r
+ * - SBC_SENSE_KEY_COPY_ABORTED\r
+ * - SBC_SENSE_KEY_ABORTED_COMMAND\r
+ * - SBC_SENSE_KEY_VOLUME_OVERFLOW\r
+ * - SBC_SENSE_KEY_MISCOMPARE\r
+ */\r
+\r
+/** No specific sense key. Successful command. */\r
+#define SBC_SENSE_KEY_NO_SENSE 0x00\r
+/** Command completed succesfully with some recovery action by the %device. */\r
+#define SBC_SENSE_KEY_RECOVERED_ERROR 0x01\r
+/** The device can not be accessed. */\r
+#define SBC_SENSE_KEY_NOT_READY 0x02\r
+/** Command terminated with a error condition that was probably caused by a */\r
+/** flaw in the medium or an error in the recorded data. */\r
+#define SBC_SENSE_KEY_MEDIUM_ERROR 0x03\r
+/** Hardware failure while performing the command or during a self test. */\r
+#define SBC_SENSE_KEY_HARDWARE_ERROR 0x04\r
+/** Illegal parameter found in the command or additional parameters. */\r
+#define SBC_SENSE_KEY_ILLEGAL_REQUEST 0x05\r
+/** Removable medium may have been changed or the %device has been reset. */\r
+#define SBC_SENSE_KEY_UNIT_ATTENTION 0x06\r
+/** Write on a block that is protected. */\r
+#define SBC_SENSE_KEY_DATA_PROTECT 0x07\r
+/** Indicates that a write-once device or a sequential-access device */\r
+/** encountered blank medium or format-defined end-of-data indication while */\r
+/** reading or a write-once device encountered a non-blank medium while writing. */\r
+#define SBC_SENSE_KEY_BLANK_CHECK 0x08\r
+/** Reporting vendor specific conditions. */\r
+#define SBC_SENSE_KEY_VENDOR_SPECIFIC 0x09\r
+/** EXTENDED COPY command was aborted. */\r
+#define SBC_SENSE_KEY_COPY_ABORTED 0x0A\r
+/** Device aborted the command. */\r
+#define SBC_SENSE_KEY_ABORTED_COMMAND 0x0B\r
+/** A buffered peripheral device is overflow. */\r
+#define SBC_SENSE_KEY_VOLUME_OVERFLOW 0x0D\r
+/** The source data did not match the data read from the medium. */\r
+#define SBC_SENSE_KEY_MISCOMPARE 0x0E\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_sbc_sense_additionals SBC Sense Additionals\r
+ * @{\r
+ * This page lists additional sense code values returned in REQUEST SENSE data\r
+ * \see spc4r06.pdf - Section 4.5.6 - Table 28\r
+ *\r
+ * \section Additional Codes\r
+ * - SBC_ASC_LOGICAL_UNIT_NOT_READY\r
+ * - SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE\r
+ * - SBC_ASC_INVALID_FIELD_IN_CDB\r
+ * - SBC_ASC_WRITE_PROTECTED\r
+ * - SBC_ASC_FORMAT_CORRUPTED\r
+ * - SBC_ASC_INVALID_COMMAND_OPERATION_CODE\r
+ * - SBC_ASC_TOO_MUCH_WRITE_DATA\r
+ * - SBC_ASC_NOT_READY_TO_READY_CHANGE\r
+ * - SBC_ASC_MEDIUM_NOT_PRESENT\r
+ */\r
+\r
+#define SBC_ASC_LOGICAL_UNIT_NOT_READY 0x04\r
+#define SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21\r
+#define SBC_ASC_INVALID_FIELD_IN_CDB 0x24\r
+#define SBC_ASC_WRITE_PROTECTED 0x27\r
+#define SBC_ASC_FORMAT_CORRUPTED 0x31\r
+#define SBC_ASC_INVALID_COMMAND_OPERATION_CODE 0x20\r
+#define SBC_ASC_TOO_MUCH_WRITE_DATA 0x26\r
+#define SBC_ASC_NOT_READY_TO_READY_CHANGE 0x28\r
+#define SBC_ASC_MEDIUM_NOT_PRESENT 0x3A\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief MEDIUM TYPE field value for direct-access block devices */\r
+/** \see sbc3r06.pdf - Section 6.3.1 */\r
+#define SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE 0x00\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief MRIE field values */\r
+/** \see sbc3r06.pdf - Section 7.4.11 - Table 286 */\r
+#define SBC_MRIE_NO_REPORTING 0x00\r
+#define SBC_MRIE_ASYNCHRONOUS 0x01\r
+#define SBC_MRIE_GENERATE_UNIT_ATTENTION 0x02\r
+#define SBC_MRIE_COND_GENERATE_RECOVERED_ERROR 0x03\r
+#define SBC_MRIE_UNCOND_GENERATE_RECOVERED_ERROR 0x04\r
+#define SBC_MRIE_GENERATE_NO_SENSE 0x05\r
+#define SBC_MRIE_ON_REQUEST 0x06\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/*------------------------------------------------------------------------------ */\r
+/** \brief Supported mode pages */\r
+/** \see sbc3r06.pdf - Section 6.3.1 - Table 115 */\r
+#define SBC_PAGE_READ_WRITE_ERROR_RECOVERY 0x01\r
+#define SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL 0x1C\r
+#define SBC_PAGE_RETURN_ALL 0x3F\r
+#define SBC_PAGE_VENDOR_SPECIFIC 0x00\r
+/*------------------------------------------------------------------------------ */\r
+\r
+/** \addtogroup usbd_msd_endian_macros MSD Endian Macros\r
+ * @{\r
+ * This page lists the macros for endianness conversion.\r
+ *\r
+ * \section Macros\r
+ * - WORDB\r
+ * - DWORDB\r
+ * - STORE_DWORDB\r
+ * - STORE_WORDB\r
+ */\r
+\r
+ /** \brief Converts a byte array to a word value using the big endian format */\r
+#define WORDB(bytes) ((unsigned short) ((bytes[0] << 8) | bytes[1]))\r
+\r
+/** \brief Converts a byte array to a dword value using the big endian format */\r
+#define DWORDB(bytes) ((unsigned int) ((bytes[0] << 24) | (bytes[1] << 16) \\r
+ | (bytes[2] << 8) | bytes[3]))\r
+\r
+/** \brief Stores a dword value in a byte array, in big endian format */\r
+#define STORE_DWORDB(dword, bytes) \\r
+ bytes[0] = (unsigned char) (((dword) >> 24) & 0xFF); \\r
+ bytes[1] = (unsigned char) (((dword) >> 16) & 0xFF); \\r
+ bytes[2] = (unsigned char) (((dword) >> 8) & 0xFF); \\r
+ bytes[3] = (unsigned char) ((dword) & 0xFF);\r
+\r
+/** \brief Stores a word value in a byte array, in big endian format */\r
+#define STORE_WORDB(word, bytes) \\r
+ bytes[0] = (unsigned char) (((word) >> 8) & 0xFF); \\r
+ bytes[1] = (unsigned char) ((word) & 0xFF);\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Structures\r
+ *------------------------------------------------------------------------------*/\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ * \typedef SBCInquiry\r
+ * \brief Structure for the INQUIRY command\r
+ * \see spc4r06.pdf - Section 6.4.1 - Table 81\r
+ */\r
+typedef struct _SBCInquiry {\r
+\r
+ unsigned char bOperationCode; /*!< 0x12 : SBC_INQUIRY */\r
+ unsigned char isEVPD:1, /*!< Type of requested data */\r
+ bReserved1:7; /*!< Reserved bits */\r
+ unsigned char bPageCode; /*!< Specifies the VPD to return */\r
+ unsigned char pAllocationLength[2]; /*!< Size of host buffer */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} __attribute__ ((__packed__)) SBCInquiry; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCInquiryData\r
+ * \brief Standard INQUIRY data format returned by the device\r
+ * \see spc4r06.pdf - Section 6.4.2 - Table 82\r
+ */\r
+typedef struct _SBCInquiryData {\r
+\r
+ unsigned char bPeripheralDeviceType:5, /*!< Peripheral device type */\r
+ bPeripheralQualifier :3; /*!< Peripheral qualifier */\r
+ unsigned char bReserved1:7, /*!< Reserved bits */\r
+ isRMB :1; /*!< Is media removable ? */\r
+ unsigned char bVersion; /*!< SPC version used */\r
+ unsigned char bResponseDataFormat:4, /*!< Must be 0x2 */\r
+ isHIGHSUP :1, /*!< Hierarchical addressing used ? */\r
+ isNORMACA :1, /*!< ACA attribute supported ? */\r
+ bObsolete1 :2; /*!< Obsolete bits */\r
+ unsigned char bAdditionalLength; /*!< Length of remaining INQUIRY data */\r
+ unsigned char isSCCS :1, /*!< Embedded SCC ? */\r
+ isACC :1, /*!< Access control coordinator ? */\r
+ bTPGS :2, /*!< Target port support group */\r
+ is3PC :1, /*!< Third-party copy supported ? */\r
+ bReserved2:2, /*!< Reserved bits */\r
+ isProtect :1; /*!< Protection info supported ? */\r
+ unsigned char bObsolete2:1, /*!< Obsolete bit */\r
+ isEncServ :1, /*!< Embedded enclosure service comp? */\r
+ isVS :1, /*!< ??? */\r
+ isMultiP :1, /*!< Multi-port device ? */\r
+ bObsolete3:3, /*!< Obsolete bits */\r
+ bUnused1 :1; /*!< Unused feature */\r
+ unsigned char bUnused2:6, /*!< Unused features */\r
+ isCmdQue:1, /*!< Task management model supported ? */\r
+ isVS2 :1; /*!< ??? */\r
+ unsigned char pVendorID[8]; /*!< T10 vendor identification */\r
+ unsigned char pProductID[16]; /*!< Vendor-defined product ID */\r
+ unsigned char pProductRevisionLevel[4];/*!< Vendor-defined product revision */\r
+ unsigned char pVendorSpecific[20]; /*!< Vendor-specific data */\r
+ unsigned char bUnused3; /*!< Unused features */\r
+ unsigned char bReserved3; /*!< Reserved bits */\r
+ unsigned short pVersionDescriptors[8]; /*!< Standards the device complies to */\r
+ unsigned char pReserved4[22]; /*!< Reserved bytes */\r
+\r
+} __attribute__ ((__packed__)) SBCInquiryData; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCRead10\r
+ * \brief Data structure for the READ (10) command\r
+ * \see sbc3r07.pdf - Section 5.7 - Table 34\r
+ */\r
+typedef struct _SBCRead10 {\r
+\r
+ unsigned char bOperationCode; /*!< 0x28 : SBC_READ_10 */\r
+ unsigned char bObsolete1:1, /*!< Obsolete bit */\r
+ isFUA_NV:1, /*!< Cache control bit */\r
+ bReserved1:1, /*!< Reserved bit */\r
+ isFUA:1, /*!< Cache control bit */\r
+ isDPO:1, /*!< Cache control bit */\r
+ bRdProtect:3; /*!< Protection information to send */\r
+ unsigned char pLogicalBlockAddress[4]; /*!< Index of first block to read */\r
+ unsigned char bGroupNumber:5, /*!< Information grouping */\r
+ bReserved2:3; /*!< Reserved bits */\r
+ unsigned char pTransferLength[2]; /*!< Number of blocks to transmit */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} __attribute__ ((__packed__)) SBCRead10; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCReadCapacity10\r
+ * \brief Structure for the READ CAPACITY (10) command\r
+ * \see sbc3r07.pdf - Section 5.11.1 - Table 40\r
+ */\r
+typedef struct _SBCReadCapacity10 {\r
+\r
+ unsigned char bOperationCode; /*!< 0x25 : RBC_READ_CAPACITY */\r
+ unsigned char bObsolete1:1, /*!< Obsolete bit */\r
+ bReserved1:7; /*!< Reserved bits */\r
+ unsigned char pLogicalBlockAddress[4]; /*!< Block to evaluate if PMI is set */\r
+ unsigned char pReserved2[2]; /*!< Reserved bytes */\r
+ unsigned char isPMI:1, /*!< Partial medium indicator bit */\r
+ bReserved3:7; /*!< Reserved bits */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} SBCReadCapacity10;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * \brief Data returned by the device after a READ CAPACITY (10) command\r
+ * \see sbc3r07.pdf - Section 5.11.2 - Table 41\r
+ *------------------------------------------------------------------------------*/\r
+typedef struct {\r
+\r
+ unsigned char pLogicalBlockAddress[4]; /*!< Address of last logical block */\r
+ unsigned char pLogicalBlockLength[4]; /*!< Length of each logical block */\r
+\r
+} SBCReadCapacity10Data;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * \brief Structure for the REQUEST SENSE command\r
+ * \see spc4r06.pdf - Section 6.26 - Table 170\r
+ *------------------------------------------------------------------------------*/\r
+typedef struct {\r
+\r
+ unsigned char bOperationCode; /*!< 0x03 : SBC_REQUEST_SENSE */\r
+ unsigned char isDesc :1, /*!< Type of information expected */\r
+ bReserved1:7; /*!< Reserved bits */\r
+ unsigned char pReserved2[2]; /*!< Reserved bytes */\r
+ unsigned char bAllocationLength; /*!< Size of host buffer */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} SBCRequestSense;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * \brief Fixed format sense data returned after a REQUEST SENSE command has\r
+ * been received with a DESC bit cleared.\r
+ * \see spc4r06.pdf - Section 4.5.3 - Table 26\r
+ *------------------------------------------------------------------------------*/\r
+typedef struct {\r
+\r
+ unsigned char bResponseCode:7, /*!< Sense data format */\r
+ isValid :1; /*!< Information field is standard */\r
+ unsigned char bObsolete1; /*!< Obsolete byte */\r
+ unsigned char bSenseKey :4, /*!< Generic error information */\r
+ bReserved1:1, /*!< Reserved bit */\r
+ isILI :1, /*!< SSC */\r
+ isEOM :1, /*!< SSC */\r
+ isFilemark:1; /*!< SSC */\r
+ unsigned char pInformation[4]; /*!< Command-specific */\r
+ unsigned char bAdditionalSenseLength; /*!< sizeof(SBCRequestSense_data)-8 */\r
+ unsigned char pCommandSpecificInformation[4]; /*!< Command-specific */\r
+ unsigned char bAdditionalSenseCode; /*!< Additional error information */\r
+ unsigned char bAdditionalSenseCodeQualifier; /*!< Further error information */\r
+ unsigned char bFieldReplaceableUnitCode; /*!< Specific component code */\r
+ unsigned char bSenseKeySpecific:7, /*!< Additional exception info */\r
+ isSKSV :1; /*!< Is sense key specific valid? */\r
+ unsigned char pSenseKeySpecific[2]; /*!< Additional exception info */\r
+\r
+} SBCRequestSenseData;\r
+\r
+/**\r
+ * \brief SBCTestUnitReady\r
+ * Data structure for the TEST UNIT READY command\r
+ * \see spc4r06.pdf - Section 6.34 - Table 192\r
+ */\r
+typedef struct _SBCTestUnitReady {\r
+\r
+ unsigned char bOperationCode; /*!< 0x00 : SBC_TEST_UNIT_READY */\r
+ unsigned char pReserved1[4]; /*!< Reserved bits */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} __attribute__ ((__packed__)) SBCTestUnitReady; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCWrite10\r
+ * \brief Structure for the WRITE (10) command\r
+ * \see sbc3r07.pdf - Section 5.26 - Table 70\r
+ */\r
+typedef struct _SBCWrite10 {\r
+\r
+ unsigned char bOperationCode; /*!< 0x2A : SBC_WRITE_10 */\r
+ unsigned char bObsolete1:1, /*!< Obsolete bit */\r
+ isFUA_NV:1, /*!< Cache control bit */\r
+ bReserved1:1, /*!< Reserved bit */\r
+ isFUA:1, /*!< Cache control bit */\r
+ isDPO:1, /*!< Cache control bit */\r
+ bWrProtect:3; /*!< Protection information to send */\r
+ unsigned char pLogicalBlockAddress[4]; /*!< First block to write */\r
+ unsigned char bGroupNumber:5, /*!< Information grouping */\r
+ bReserved2:3; /*!< Reserved bits */\r
+ unsigned char pTransferLength[2]; /*!< Number of blocks to write */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} SBCWrite10;\r
+\r
+/**\r
+ * \typedef SBCMediumRemoval\r
+ * \brief Structure for the PREVENT/ALLOW MEDIUM REMOVAL command\r
+ * \see sbc3r07.pdf - Section 5.5 - Table 30\r
+ */\r
+typedef struct _SBCMediumRemoval {\r
+\r
+ unsigned char bOperationCode; /*!< 0x1E : SBC_PREVENT_ALLOW_MEDIUM_REMOVAL */\r
+ unsigned char pReserved1[3]; /*!< Reserved bytes */\r
+ unsigned char bPrevent:2, /*!< Accept/prohibit removal */\r
+ bReserved2:6; /*!< Reserved bits */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} __attribute__ ((__packed__)) SBCMediumRemoval; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCModeSense6\r
+ * \brief Structure for the MODE SENSE (6) command\r
+ * \see spc4r06 - Section 6.9.1 - Table 98\r
+ */\r
+typedef struct _SBCModeSense6 {\r
+\r
+ unsigned char bOperationCode; /*!< 0x1A : SBC_MODE_SENSE_6 */\r
+ unsigned char bReserved1:3, /*!< Reserved bits */\r
+ isDBD:1, /*!< Disable block descriptors bit */\r
+ bReserved2:4; /*!< Reserved bits */\r
+ unsigned char bPageCode:6, /*!< Mode page to return */\r
+ bPC:2; /*!< Type of parameter values to return */\r
+ unsigned char bSubpageCode; /*!< Mode subpage to return */\r
+ unsigned char bAllocationLength; /*!< Host buffer allocated size */\r
+ unsigned char bControl; /*!< 0x00 */\r
+\r
+} __attribute__ ((__packed__)) SBCModeSense6; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCModeParameterHeader6\r
+ * \brief Header for the data returned after a MODE SENSE (6) command\r
+ * \see spc4r06.pdf - Section 7.4.3 - Table 268\r
+ */\r
+typedef struct _SBCModeParameterHeader6 {\r
+\r
+ unsigned char bModeDataLength; /*!< Length of mode data to follow */\r
+ unsigned char bMediumType; /*!< Type of medium (SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE) */\r
+ unsigned char bReserved1:4, /*!< Reserved bits */\r
+ isDPOFUA:1, /*!< DPO/FUA bits supported ? */\r
+ bReserved2:2, /*!< Reserved bits */\r
+ isWP:1; /*!< Is medium write-protected ? */\r
+ unsigned char bBlockDescriptorLength; /*!< Length of all block descriptors */\r
+\r
+} __attribute__ ((__packed__)) SBCModeParameterHeader6; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCInformationalExceptionsControl\r
+ * \brief Informational exceptions control mode page\r
+ * \see spc4r06.pdf - Section 7.4.11 - Table 285\r
+ */\r
+typedef struct _SBCInformationalExceptionsControl {\r
+\r
+ unsigned char bPageCode:6, /*!< 0x1C : SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL */\r
+ isSPF:1, /*!< Page or subpage data format */\r
+ isPS:1; /*!< Parameters saveable ? */\r
+ unsigned char bPageLength; /*!< Length of page data (0x0A) */\r
+ unsigned char isLogErr:1, /*!< Should informational exceptions be logged ? */\r
+ isEBackErr:1, /*!< Enable background error bit */\r
+ isTest:1, /*!< Create a device test failure ? */\r
+ isDExcpt:1, /*!< Disable exception control bit */\r
+ isEWasc:1, /*!< Report warnings ? */\r
+ isEBF:1, /*!< Enable background function bit */\r
+ bReserved1:1, /*!< Reserved bit */\r
+ isPerf:1; /*!< Delay acceptable when treating exceptions ? */\r
+ unsigned char bMRIE:4, /*!< Method of reporting informational exceptions */\r
+ bReserved2:4; /*!< Reserved bits */\r
+ unsigned char pIntervalTimer[4]; /*!< Error reporting period */\r
+ unsigned char pReportCount[4]; /*!< Maximum number of time a report can be issued */\r
+\r
+} __attribute__ ((__packed__)) SBCInformationalExceptionsControl; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCReadWriteErrorRecovery\r
+ * \brief Read/write error recovery mode page\r
+ * \see sbc3r07.pdf - Section 6.3.5 - Table 122\r
+ */\r
+typedef struct _SBCReadWriteErrorRecovery {\r
+\r
+ unsigned char bPageCode:6, /*!< 0x01 : SBC_PAGE_READ_WRITE_ERROR_RECOVERY */\r
+ isSPF:1, /*!< Page or subpage data format */\r
+ isPS:1; /*!< Parameters saveable ? */\r
+ unsigned char bPageLength; /*!< Length of page data (0x0A) */\r
+ unsigned char isDCR:1, /*!< Disable correction bit */\r
+ isDTE:1, /*!< Data terminate on error bit */\r
+ isPER:1, /*!< Post error bit */\r
+ isEER:1, /*!< Enable early recovery bit */\r
+ isRC:1, /*!< Read continuous bit */\r
+ isTB:1, /*!< Transfer block bit */\r
+ isARRE:1, /*!< Automatic read reallocation enabled bit */\r
+ isAWRE:1; /*!< Automatic write reallocation enabled bit */\r
+ unsigned char bReadRetryCount; /*!< Number of retries when reading */\r
+ unsigned char pObsolete1[3]; /*!< Obsolete bytes */\r
+ unsigned char bReserved1; /*!< Reserved byte */\r
+ unsigned char bWriteRetryCount; /*!< Number of retries when writing */\r
+ unsigned char bReserved2; /*!< Reserved byte */\r
+ unsigned char pRecoveryTimeLimit[2]; /*!< Maximum time duration for error recovery */\r
+\r
+} __attribute__ ((__packed__)) SBCReadWriteErrorRecovery; /* GCC */\r
+\r
+/**\r
+ * \typedef SBCCommand\r
+ * \brief Generic structure for holding information about SBC commands\r
+ * \see SBCInquiry\r
+ * \see SBCRead10\r
+ * \see SBCReadCapacity10\r
+ * \see SBCRequestSense\r
+ * \see SBCTestUnitReady\r
+ * \see SBCWrite10\r
+ * \see SBCMediumRemoval\r
+ * \see SBCModeSense6\r
+ */\r
+typedef union _SBCCommand {\r
+\r
+ unsigned char bOperationCode; /*!< Operation code of the command */\r
+ SBCInquiry inquiry; /*!< INQUIRY command */\r
+ SBCRead10 read10; /*!< READ (10) command */\r
+ SBCReadCapacity10 readCapacity10; /*!< READ CAPACITY (10) command */\r
+ SBCRequestSense requestSense; /*!< REQUEST SENSE command */\r
+ SBCTestUnitReady testUnitReady; /*!< TEST UNIT READY command */\r
+ SBCWrite10 write10; /*!< WRITE (10) command */\r
+ SBCMediumRemoval mediumRemoval; /*!< PREVENT/ALLOW MEDIUM REMOVAL command */\r
+ SBCModeSense6 modeSense6; /*!< MODE SENSE (6) command */\r
+\r
+} SBCCommand;\r
+\r
+#pragma pack()\r
+\r
+/**@}*/\r
+\r
+#endif /*#ifndef SBC_H */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \section Purpose\r
+ *\r
+ * SCSI commands implementation.\r
+ *\r
+ * section Usage\r
+ *\r
+ * -# After a CBW is received from host, use SBC_GetCommandInformation to check\r
+ * if the command is supported, and get the command length and type\r
+ * information before processing it.\r
+ * -# Then SBC_ProcessCommand can be used to handle a valid command, to\r
+ * perform the command operations.\r
+ * -# SBC_UpdateSenseData is used to update the sense data that will be sent\r
+ * to host.\r
+ */\r
+\r
+#ifndef SBCMETHODS_H\r
+#define SBCMETHODS_H\r
+\r
+/** \addtogroup usbd_msd\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "SBC.h"\r
+#include "MSDLun.h"\r
+#include "MSDDStateMachine.h"\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/** \addtogroup usbd_sbc_command_state SBC Command States\r
+ * @{\r
+ * This page lists the possible states of a SBC command.\r
+ *\r
+ * \section States\r
+ * - SBC_STATE_READ\r
+ * - SBC_STATE_WAIT_READ\r
+ * - SBC_STATE_WRITE\r
+ * - SBC_STATE_WAIT_WRITE\r
+ * - SBC_STATE_NEXT_BLOCK\r
+ */\r
+\r
+/** Start of reading bulk data */\r
+#define SBC_STATE_READ 0x01\r
+/** Waiting for the bulk data reading complete */\r
+#define SBC_STATE_WAIT_READ 0x02\r
+/** Read error state */\r
+#define SBC_STATE_READ_ERROR 0x03\r
+/** Start next read block */\r
+#define SBC_STATE_NEXT_READ 0x04\r
+/** Start writing bulk data to host */\r
+#define SBC_STATE_WRITE 0x05\r
+/** Waiting for the bulk data sending complete */\r
+#define SBC_STATE_WAIT_WRITE 0x06\r
+/** Write error state */\r
+#define SBC_STATE_WRITE_ERROR 0x07\r
+/** Start next write block */\r
+#define SBC_STATE_NEXT_WRITE 0x08\r
+/** Start next command block */\r
+#define SBC_STATE_NEXT_BLOCK 0x09\r
+/** @}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+void SBC_UpdateSenseData(SBCRequestSenseData *requestSenseData,\r
+ unsigned char senseKey,\r
+ unsigned char additionalSenseCode,\r
+ unsigned char additionalSenseCodeQualifier);\r
+\r
+unsigned char SBC_GetCommandInformation(void *command,\r
+ unsigned int *length,\r
+ unsigned char *type,\r
+ MSDLun *lun);\r
+\r
+unsigned char SBC_ProcessCommand(MSDLun *lun,\r
+ MSDCommandState *commandState);\r
+\r
+/**@}*/\r
+\r
+#endif /*#ifndef SBCMETHODS_H */\r
+\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * Collection of methods for using the USB device controller on AT91\r
+ * microcontrollers.\r
+ *\r
+ * \section Usage\r
+ *\r
+ * Please refer to the corresponding application note.\r
+ * - \ref usbd_framework AT91 USB device framework\r
+ * - \ref usbd_api USBD API\r
+ *\r
+ */\r
+\r
+#ifndef USBD_H\r
+#define USBD_H\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+\r
+#include "USBDescriptors.h"\r
+#include "USBRequests.h"\r
+\r
+#include "USBLib_Types.h"\r
+\r
+#include <stdio.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/* Define attribute */\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+ #define WEAK __attribute__ ((weak))\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */\r
+ #define WEAK __weak\r
+#elif defined ( __GNUC__ ) /* GCC CS3 2009q3-68 */\r
+ #define WEAK __attribute__ ((weak))\r
+#endif\r
+\r
+/* Define NO_INIT attribute */\r
+#if defined ( __CC_ARM )\r
+ #define NO_INIT\r
+#elif defined ( __ICCARM__ )\r
+ #define NO_INIT __no_init\r
+#elif defined ( __GNUC__ )\r
+ #define NO_INIT\r
+#endif\r
+\r
+\r
+/** \addtogroup usbd_interface\r
+ *@{*/\r
+\r
+/**\r
+ * \addtogroup usbd_rc USB device API return codes\r
+ * @{\r
+ * This section lists the return codes for the USB device driver API\r
+ * - \ref USBD_STATUS_SUCCESS\r
+ * - \ref USBD_STATUS_LOCKED\r
+ * - \ref USBD_STATUS_ABORTED\r
+ * - \ref USBD_STATUS_RESET\r
+ */\r
+\r
+/** Indicates the operation was successful. */\r
+#define USBD_STATUS_SUCCESS USBRC_SUCCESS\r
+/** Endpoint/device is already busy. */\r
+#define USBD_STATUS_LOCKED USBRC_BUSY\r
+/** Operation has been aborted (error or stall). */\r
+#define USBD_STATUS_ABORTED USBRC_ABORTED\r
+/** Operation has been canceled (by user). */\r
+#define USBD_STATUS_CANCELED USBRC_CANCELED\r
+/** Operation has been aborted because the device init/reset/un-configure. */\r
+#define USBD_STATUS_RESET USBRC_RESET\r
+/** Part ot operation successfully done. */\r
+#define USBD_STATUS_PARTIAL_DONE USBRC_PARTIAL_DONE\r
+/** Operation failed because parameter error */\r
+#define USBD_STATUS_INVALID_PARAMETER USBRC_PARAM_ERR\r
+/** Operation failed because in unexpected state */\r
+#define USBD_STATUS_WRONG_STATE USBRC_STATE_ERR\r
+/** Operation failed because SW not supported */\r
+#define USBD_STATUS_SW_NOT_SUPPORTED USBRC_SW_NOT_SUPPORTED\r
+/** Operation failed because HW not supported */\r
+#define USBD_STATUS_HW_NOT_SUPPORTED USBRC_HW_NOT_SUPPORTED\r
+/** @}*/\r
+\r
+/** \addtogroup usbd_states USB device states\r
+ * @{\r
+ * This section lists the device states of the USB device driver.\r
+ * - \ref USBD_STATE_SUSPENDED\r
+ * - \ref USBD_STATE_ATTACHED\r
+ * - \ref USBD_STATE_POWERED\r
+ * - \ref USBD_STATE_DEFAULT\r
+ * - \ref USBD_STATE_ADDRESS\r
+ * - \ref USBD_STATE_CONFIGURED\r
+ */\r
+\r
+/** The device is currently suspended. */\r
+#define USBD_STATE_SUSPENDED 0\r
+/** USB cable is plugged into the device. */\r
+#define USBD_STATE_ATTACHED 1\r
+/** Host is providing +5V through the USB cable. */\r
+#define USBD_STATE_POWERED 2\r
+/** Device has been reset. */\r
+#define USBD_STATE_DEFAULT 3\r
+/** The device has been given an address on the bus. */\r
+#define USBD_STATE_ADDRESS 4\r
+/** A valid configuration has been selected. */\r
+#define USBD_STATE_CONFIGURED 5\r
+/** @}*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Types\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * \brief Buffer struct used for multi-buffer-listed transfer.\r
+ *\r
+ * The driver can process 255 bytes of buffers or buffer list window.\r
+ */\r
+typedef struct _USBDTransferBuffer {\r
+ /** Pointer to frame buffer */\r
+ uint8_t * pBuffer;\r
+ /** Size of the frame (up to 64K-1) */\r
+ uint16_t size;\r
+ /** Bytes transferred */\r
+ uint16_t transferred;\r
+ /** Bytes in FIFO */\r
+ uint16_t buffered;\r
+ /** Bytes remaining */\r
+ uint16_t remaining;\r
+} USBDTransferBuffer;\r
+\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */\r
+#define __attribute__(...)\r
+#elif defined ( __GNUC__ ) /* GCC CS3 2009q3-68 */\r
+#endif\r
+\r
+/**\r
+ * \brief Struct used for USBD DMA Link List Transfer Descriptor, must be 16-bytes\r
+ * aligned.\r
+ *\r
+ * (For USB, DMA transfer is linked to EPs and FIFO address is EP defined)\r
+ */\r
+typedef struct _USBDDmaDescriptor {\r
+ /** Pointer to Next Descriptor */\r
+ void* pNxtDesc;\r
+ /** Pointer to data buffer address */\r
+ void* pDataAddr;\r
+ /** DMA Control setting register value */\r
+ uint32_t ctrlSettings:8, /** Control settings */\r
+ reserved:8, /** Not used */\r
+ bufferLength:16; /** Length of buffer */\r
+ /** Loaded to DMA register, OK to modify */\r
+ uint32_t used;\r
+} __attribute__((aligned(16))) USBDDmaDescriptor;\r
+\r
+#pragma pack()\r
+\r
+/**\r
+ * Callback used by transfer functions (USBD_Read & USBD_Write) to notify\r
+ * that a transaction is complete.\r
+ */\r
+typedef void (*TransferCallback)(void *pArg,\r
+ uint8_t status,\r
+ uint32_t transferred,\r
+ uint32_t remaining);\r
+\r
+/**\r
+ * Callback used by MBL transfer functions (USBD_Read & USBD_Write) to notify\r
+ * that a transaction is complete.\r
+ * \param pArg Pointer to callback arguments.\r
+ * \param status USBD status.\r
+ */\r
+typedef void (*MblTransferCallback)(void *pArg,\r
+ uint8_t status);\r
+\r
+/**@}*/\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+//extern void USBD_IrqHandler(void);\r
+\r
+extern void USBD_Init(void);\r
+\r
+extern void USBD_ConfigureSpeed(uint8_t forceFS);\r
+\r
+extern void USBD_Connect(void);\r
+\r
+extern void USBD_Disconnect(void);\r
+\r
+extern uint8_t USBD_Write(\r
+ uint8_t bEndpoint,\r
+ const void *pData,\r
+ uint32_t size,\r
+ TransferCallback callback,\r
+ void *pArg);\r
+\r
+extern uint8_t USBD_Read(\r
+ uint8_t bEndpoint,\r
+ void *pData,\r
+ uint32_t dLength,\r
+ TransferCallback fCallback,\r
+ void *pArg);\r
+\r
+extern uint8_t USBD_Stall(uint8_t bEndpoint);\r
+\r
+extern void USBD_Halt(uint8_t bEndpoint);\r
+\r
+extern void USBD_Unhalt(uint8_t bEndpoint);\r
+\r
+extern void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor);\r
+\r
+extern uint8_t USBD_IsHalted(uint8_t bEndpoint);\r
+\r
+extern void USBD_RemoteWakeUp(void);\r
+\r
+extern void USBD_SetAddress(uint8_t address);\r
+\r
+extern void USBD_SetConfiguration(uint8_t cfgnum);\r
+\r
+extern uint8_t USBD_GetState(void);\r
+\r
+extern uint8_t USBD_IsHighSpeed(void);\r
+\r
+extern void USBD_Test(uint8_t bIndex);\r
+\r
+extern void USBD_SuspendHandler(void);\r
+extern void USBD_ResumeHandler(void);\r
+extern void USBD_ResetHandler(void);\r
+extern void USBD_RequestHandler(uint8_t bEndpoint,\r
+ const USBGenericRequest * pRequest);\r
+\r
+\r
+extern void USBDCallbacks_Initialized(void);\r
+extern void USBDCallbacks_Reset(void);\r
+extern void USBDCallbacks_Suspended(void);\r
+extern void USBDCallbacks_Resumed(void);\r
+extern void USBDCallbacks_RequestReceived(const USBGenericRequest *request);\r
+\r
+#endif /*#ifndef USBD_H*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * USB Device Driver class definition.\r
+ *\r
+ * \section Usage\r
+ *\r
+ * -# Instanciate a USBDDriver object and initialize it using\r
+ * USBDDriver_Initialize.\r
+ * -# When a USB SETUP request is received, forward it to the standard\r
+ * driver using USBDDriver_RequestHandler.\r
+ * -# Check the Remote Wakeup setting via USBDDriver_IsRemoteWakeUpEnabled.\r
+ */\r
+\r
+#ifndef USBDDRIVER_H\r
+#define USBDDRIVER_H\r
+\r
+/** \addtogroup usbd_interface\r
+ *@{\r
+ */\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99 by working group\r
+ * ISO/IEC JTC1/SC22/WG14.\r
+ */\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+\r
+#include <USBRequests.h>\r
+#include <USBDescriptors.h>\r
+#include <USBLib_Types.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Types\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/**\r
+ * \typedef USBDDriverDescriptors\r
+ * \brief List of all descriptors used by a USB device driver. Each descriptor\r
+ * can be provided in two versions: full-speed and high-speed. Devices\r
+ * which are not high-speed capable do not need to provided high-speed\r
+ * descriptors and the full-speed qualifier & other speed descriptors.\r
+ */\r
+typedef struct _USBDDriverDescriptors {\r
+\r
+ /** Pointer to the full-speed device descriptor */\r
+ const USBDeviceDescriptor *pFsDevice;\r
+ /** Pointer to the full-speed configuration descriptor */\r
+ const USBConfigurationDescriptor *pFsConfiguration;\r
+ /** Pointer to the full-speed qualifier descriptor */\r
+ const USBDeviceQualifierDescriptor *pFsQualifier;\r
+ /** Pointer to the full-speed other speed configuration descriptor */\r
+ const USBConfigurationDescriptor *pFsOtherSpeed;\r
+ /** Pointer to the high-speed device descriptor */\r
+ const USBDeviceDescriptor *pHsDevice;\r
+ /** Pointer to the high-speed configuration descriptor */\r
+ const USBConfigurationDescriptor *pHsConfiguration;\r
+ /** Pointer to the high-speed qualifier descriptor */\r
+ const USBDeviceQualifierDescriptor *pHsQualifier;\r
+ /** Pointer to the high-speed other speed configuration descriptor */\r
+ const USBConfigurationDescriptor *pHsOtherSpeed;\r
+ /** Pointer to the list of string descriptors */\r
+ const uint8_t **pStrings;\r
+ /** Number of string descriptors in list */\r
+ uint8_t numStrings;\r
+\r
+} USBDDriverDescriptors;\r
+\r
+/**\r
+ * \typedef USBDDriver\r
+ * \brief USB device driver structure, holding a list of descriptors identifying\r
+ * the device as well as the driver current state.\r
+ */\r
+typedef struct _USBDDriver {\r
+\r
+ /** List of descriptors used by the device. */\r
+ const USBDDriverDescriptors *pDescriptors;\r
+ /** Current setting for each interface. */\r
+ uint8_t *pInterfaces;\r
+ /** Current configuration number (0 -> device is not configured). */\r
+ uint8_t cfgnum;\r
+ /** Indicates if remote wake up has been enabled by the host. */\r
+ uint8_t isRemoteWakeUpEnabled;\r
+ /** Features supported by OTG */\r
+ uint8_t otg_features_supported;\r
+} USBDDriver;\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Exported functions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+extern USBDDriver *USBD_GetDriver(void);\r
+extern void USBDDriver_Initialize(\r
+ USBDDriver *pDriver,\r
+ const USBDDriverDescriptors *pDescriptors,\r
+ uint8_t *pInterfaces);\r
+extern USBConfigurationDescriptor* USBDDriver_GetCfgDescriptors(\r
+ USBDDriver * pDriver,\r
+ uint8_t cfgNum);\r
+extern void USBDDriver_RequestHandler(\r
+ USBDDriver *pDriver,\r
+ const USBGenericRequest *pRequest);\r
+extern uint8_t USBDDriver_IsRemoteWakeUpEnabled(const USBDDriver *pDriver);\r
+extern uint8_t USBDDriver_returnOTGFeatures(const USBDDriver *pDriver);\r
+extern void USBDDriver_clearOTGFeatures(USBDDriver *pDriver);\r
+\r
+extern void USBDDriverCallbacks_ConfigurationChanged(uint8_t cfgnum);\r
+extern void USBDDriverCallbacks_InterfaceSettingChanged(uint8_t interface,\r
+ uint8_t setting);\r
+\r
+/**@}*/\r
+\r
+#endif /*#ifndef USBDDRIVER_H*/\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2009, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+#ifndef USBD_HAL_H\r
+#define USBD_HAL_H\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * This file defines functions for USB Device Hardware Access Level.\r
+ */\r
+\r
+/** \addtogroup usbd_hal\r
+ *@{*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/* Introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+\r
+#include "USBD.h"\r
+#include <USBDescriptors.h>\r
+#include <USBRequests.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Consts\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Macros\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/** Get bitmap for an endpoint */\r
+#define bmEP(bEP) (1 << (bEP))\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Types\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Exported functoins\r
+ *----------------------------------------------------------------------------*/\r
+\r
+extern void USBD_HAL_Init(void);\r
+extern void USBD_HAL_Connect(void);\r
+extern void USBD_HAL_Disconnect(void);\r
+\r
+extern void USBD_HAL_RemoteWakeUp(void);\r
+extern void USBD_HAL_SetConfiguration(uint8_t cfgnum);\r
+extern void USBD_HAL_SetAddress(uint8_t address);\r
+extern uint8_t USBD_HAL_IsHighSpeed(void);\r
+\r
+extern void USBD_HAL_Suspend(void);\r
+extern void USBD_HAL_Activate(void);\r
+\r
+extern void USBD_HAL_ResetEPs(uint32_t bmEPs,uint8_t bStatus, uint8_t bKeepCfg);\r
+extern void USBD_HAL_CancelIo(uint32_t bmEPs);\r
+extern uint8_t USBD_HAL_ConfigureEP(const USBEndpointDescriptor * pDescriptor);\r
+\r
+extern uint8_t USBD_HAL_SetTransferCallback(uint8_t bEP,\r
+ TransferCallback fCallback,\r
+ void * pCbData);\r
+extern uint8_t USBD_HAL_SetupMblTransfer(uint8_t bEndpoint,\r
+ USBDTransferBuffer * pMbList,\r
+ uint16_t mblSize,\r
+ uint16_t startOffset);\r
+extern uint8_t USBD_HAL_Write(uint8_t bEndpoint,\r
+ const void * pData,\r
+ uint32_t dLength);\r
+extern uint8_t USBD_HAL_WrWithHdr(uint8_t bEndpoint,\r
+ const void * pHdr, uint8_t bHdrLen,\r
+ const void * pData, uint32_t dLength);\r
+extern uint8_t USBD_HAL_Read(uint8_t bEndpoint,\r
+ void * pData,\r
+ uint32_t dLength);\r
+extern uint8_t USBD_HAL_Stall(uint8_t bEP);\r
+extern uint8_t USBD_HAL_Halt(uint8_t bEndpoint,uint8_t ctl);\r
+extern void USBD_HAL_Test(uint8_t bIndex);\r
+/**@}*/\r
+\r
+#endif // #define USBD_HAL_H\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \section Purpose\r
+ *\r
+ * Definitions and methods for USB descriptor structures described by the\r
+ * USB specification.\r
+ *\r
+ * \section Usage\r
+ *\r
+ */\r
+\r
+#ifndef _USBDESCRIPTORS_H_\r
+#define _USBDESCRIPTORS_H_\r
+/** \addtogroup usb_general\r
+ * @{\r
+ * \addtogroup usb_descriptor USB Descriptors\r
+ * @{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99 by working group\r
+ * ISO/IEC JTC1/SC22/WG14.\r
+ */\r
+#include <stdint.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*--------- Generic Descriptors --------*/\r
+\r
+/** \addtogroup usb_desc_type USB Descriptor types\r
+ * @{\r
+ * This section lists the codes of the usb descriptor types\r
+ * - \ref USBGenericDescriptor_DEVICE\r
+ * - \ref USBGenericDescriptor_CONFIGURATION\r
+ * - \ref USBGenericDescriptor_STRING\r
+ * - \ref USBGenericDescriptor_INTERFACE\r
+ * - \ref USBGenericDescriptor_ENDPOINT\r
+ * - \ref USBGenericDescriptor_DEVICEQUALIFIER\r
+ * - \ref USBGenericDescriptor_OTHERSPEEDCONFIGURATION\r
+ * - \ref USBGenericDescriptor_INTERFACEPOWER\r
+ * - \ref USBGenericDescriptor_OTG\r
+ * - \ref USBGenericDescriptor_DEBUG\r
+ * - \ref USBGenericDescriptor_INTERFACEASSOCIATION\r
+ */\r
+/** Device descriptor type. */\r
+#define USBGenericDescriptor_DEVICE 1\r
+/** Configuration descriptor type. */\r
+#define USBGenericDescriptor_CONFIGURATION 2\r
+/** String descriptor type. */\r
+#define USBGenericDescriptor_STRING 3\r
+/** Interface descriptor type. */\r
+#define USBGenericDescriptor_INTERFACE 4\r
+/** Endpoint descriptor type. */\r
+#define USBGenericDescriptor_ENDPOINT 5\r
+/** Device qualifier descriptor type. */\r
+#define USBGenericDescriptor_DEVICEQUALIFIER 6\r
+/** Other speed configuration descriptor type. */\r
+#define USBGenericDescriptor_OTHERSPEEDCONFIGURATION 7\r
+/** Interface power descriptor type. */\r
+#define USBGenericDescriptor_INTERFACEPOWER 8\r
+/** On-The-Go descriptor type. */\r
+#define USBGenericDescriptor_OTG 9\r
+/** Debug descriptor type. */\r
+#define USBGenericDescriptor_DEBUG 10\r
+/** Interface association descriptor type. */\r
+#define USBGenericDescriptor_INTERFACEASSOCIATION 11\r
+/** @}*/\r
+\r
+\r
+/*--------- Device Descriptors --------*/\r
+\r
+/** \addtogroup usb_release_number USB release numbers\r
+ * @{\r
+ * This section lists the codes of USB release numbers.\r
+ * - \ref USBDeviceDescriptor_USB2_00\r
+ */\r
+\r
+/** The device supports USB 2.00. */\r
+#define USBDeviceDescriptor_USB2_00 0x0200\r
+/** @}*/\r
+\r
+\r
+/*--------- Configuration Descriptors --------*/\r
+\r
+/** \addtogroup usb_attributes USB Device Attributes\r
+ * @{\r
+ * This section lists the codes of the usb attributes.\r
+ * - \ref USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP\r
+ * - \ref USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP\r
+ * - \ref USBConfigurationDescriptor_BUSPOWERED_RWAKEUP\r
+ * - \ref USBConfigurationDescriptor_SELFPOWERED_RWAKEUP\r
+ * - \ref USBConfigurationDescriptor_POWER\r
+ */\r
+/** Device is bus-powered and not support remote wake-up. */\r
+#define USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP 0x80\r
+/** Device is self-powered and not support remote wake-up. */\r
+#define USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP 0xC0\r
+/** Device is bus-powered and supports remote wake-up. */\r
+#define USBConfigurationDescriptor_BUSPOWERED_RWAKEUP 0xA0\r
+/** Device is self-powered and supports remote wake-up. */\r
+#define USBConfigurationDescriptor_SELFPOWERED_RWAKEUP 0xE0\r
+/** Calculates the value of the power consumption field given the value in mA.\r
+ * \param power The power consumption value in mA\r
+ * \return The value that should be set to the field in descriptor\r
+ */\r
+#define USBConfigurationDescriptor_POWER(power) (power / 2)\r
+/** @}*/\r
+\r
+\r
+/*--------- Endpoint Descriptors --------*/\r
+\r
+/** \addtogroup usb_ep_define USB Endpoint definitions\r
+ * @{\r
+ * This section lists definitions and macro for endpoint descriptors.\r
+ * - \ref usb_ep_dir USB Endpoint directions\r
+ * - \ref USBEndpointDescriptor_OUT\r
+ * - \ref USBEndpointDescriptor_IN\r
+ *\r
+ * - \ref usb_ep_type USB Endpoint types\r
+ * - \ref USBEndpointDescriptor_CONTROL\r
+ * - \ref USBEndpointDescriptor_ISOCHRONOUS\r
+ * - \ref USBEndpointDescriptor_BULK\r
+ * - \ref USBEndpointDescriptor_INTERRUPT\r
+ *\r
+ * - \ref usb_ep_size USB Endpoint maximun sizes\r
+ * - \ref USBEndpointDescriptor_MAXCTRLSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXCTRLSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXBULKSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXBULKSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXINTERRUPTSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXINTERRUPTSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS\r
+ *\r
+ * - \ref usb_ep_addr USB Endpoint address define\r
+ * - \ref USBEndpointDescriptor_ADDRESS\r
+ */\r
+\r
+/** \addtogroup usb_ep_dir USB Endpoint directions\r
+ * @{\r
+ * This section lists definitions of USB endpoint directions.\r
+ * - USBEndpointDescriptor_OUT\r
+ * - USBEndpointDescriptor_IN\r
+ */\r
+/** Endpoint receives data from the host. */\r
+#define USBEndpointDescriptor_OUT 0\r
+/** Endpoint sends data to the host. */\r
+#define USBEndpointDescriptor_IN 1\r
+/** @}*/\r
+\r
+/** \addtogroup usb_ep_type USB Endpoint types\r
+ * @{\r
+ * This section lists definitions of USB endpoint types.\r
+ * - \ref USBEndpointDescriptor_CONTROL\r
+ * - \ref USBEndpointDescriptor_ISOCHRONOUS\r
+ * - \ref USBEndpointDescriptor_BULK\r
+ * - \ref USBEndpointDescriptor_INTERRUPT\r
+ */\r
+/** Control endpoint type. */\r
+#define USBEndpointDescriptor_CONTROL 0\r
+/** Isochronous endpoint type. */\r
+#define USBEndpointDescriptor_ISOCHRONOUS 1\r
+/** Bulk endpoint type. */\r
+#define USBEndpointDescriptor_BULK 2\r
+/** Interrupt endpoint type. */\r
+#define USBEndpointDescriptor_INTERRUPT 3\r
+/** @}*/\r
+\r
+/** \addtogroup usb_ep_size USB Endpoint maximun sizes\r
+ * @{\r
+ * This section lists definitions of USB endpoint maximun sizes.\r
+ * - \ref USBEndpointDescriptor_MAXCTRLSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXCTRLSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXBULKSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXBULKSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXINTERRUPTSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXINTERRUPTSIZE_HS\r
+ * - \ref USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS\r
+ * - \ref USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS\r
+ */\r
+/** Maximum size for a full-speed control endpoint. */\r
+#define USBEndpointDescriptor_MAXCTRLSIZE_FS 64\r
+/** Maximum size for a high-speed control endpoint. */\r
+#define USBEndpointDescriptor_MAXCTRLSIZE_HS 64\r
+/** Maximum size for a full-speed bulk endpoint. */\r
+#define USBEndpointDescriptor_MAXBULKSIZE_FS 64\r
+/** Maximum size for a high-speed bulk endpoint. */\r
+#define USBEndpointDescriptor_MAXBULKSIZE_HS 512\r
+/** Maximum size for a full-speed interrupt endpoint. */\r
+#define USBEndpointDescriptor_MAXINTERRUPTSIZE_FS 64\r
+/** Maximum size for a high-speed interrupt endpoint. */\r
+#define USBEndpointDescriptor_MAXINTERRUPTSIZE_HS 1024\r
+/** Maximum size for a full-speed isochronous endpoint. */\r
+#define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS 1023\r
+/** Maximum size for a high-speed isochronous endpoint. */\r
+#define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS 1024\r
+/** @}*/\r
+\r
+/** \addtogroup usb_ep_addr USB Endpoint address define\r
+ * @{\r
+ * This section lists macro for USB endpoint address definition.\r
+ * - \ref USBEndpointDescriptor_ADDRESS\r
+ */\r
+/**\r
+ * Calculates the address of an endpoint given its number and direction\r
+ * \param direction USB endpoint direction definition\r
+ * \param number USB endpoint number\r
+ * \return The value used to set the endpoint descriptor based on input number\r
+ * and direction\r
+ */\r
+#define USBEndpointDescriptor_ADDRESS(direction, number) \\r
+ (((direction & 0x01) << 7) | (number & 0xF))\r
+/** @}*/\r
+/** @}*/\r
+\r
+\r
+/*--------- Generic Descriptors --------*/\r
+\r
+/** \addtogroup usb_string_descriptor USB String Descriptor Definitions\r
+ * @{\r
+ * This section lists the codes and macros for USB string descriptor definition.\r
+ *\r
+ * \par Language IDs\r
+ * - USBStringDescriptor_ENGLISH_US\r
+ *\r
+ * \par String Descriptor Length\r
+ * - USBStringDescriptor_LENGTH\r
+ *\r
+ * \par ASCII to UNICODE convertion\r
+ * - USBStringDescriptor_UNICODE\r
+ */\r
+/** Language ID for US english. */\r
+#define USBStringDescriptor_ENGLISH_US 0x09, 0x04\r
+/**\r
+ * Calculates the length of a string descriptor given the number of ascii\r
+ * characters/language IDs in it.\r
+ * \param length The ascii format string length.\r
+ * \return The actual data length in bytes.\r
+ */\r
+#define USBStringDescriptor_LENGTH(length) ((length) * 2 + 2)\r
+/**\r
+ * Converts an ascii character to its unicode representation.\r
+ * \param ascii The ASCII character to convert\r
+ * \return A 2-byte-array for the UNICODE based on given ASCII\r
+ */\r
+#define USBStringDescriptor_UNICODE(ascii) (ascii), 0\r
+/** @}*/\r
+\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*\r
+ * Function types\r
+ */\r
+\r
+typedef uint32_t (*USBDescriptorParseFunction)(void *descriptor, void *parseArg);\r
+\r
+\r
+/*\r
+ * Descriptor structs types\r
+ */\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm */\r
+#define __attribute__(...)\r
+#define __packed__ packed\r
+#elif defined ( __GNUC__ ) /* GCC CS3 */\r
+#define __packed__ aligned(1)\r
+#endif\r
+/**\r
+ \typedef USBGenericDescriptor\r
+ \brief Holds the few fields shared by all USB descriptors.\r
+ */\r
+typedef struct _USBGenericDescriptor {\r
+\r
+ /** Length of the descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type. */\r
+ uint8_t bDescriptorType;\r
+\r
+} __attribute__ ((__packed__)) USBGenericDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef USBDeviceDescriptor\r
+ * \brief USB standard device descriptor structure.\r
+ */\r
+typedef struct _USBDeviceDescriptor {\r
+\r
+ /** Size of this descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type (USBGenericDescriptor_DEVICE). */\r
+ uint8_t bDescriptorType;\r
+ /** USB specification release number in BCD format. */\r
+ uint16_t bcdUSB;\r
+ /** Device class code. */\r
+ uint8_t bDeviceClass;\r
+ /** Device subclass code. */\r
+ uint8_t bDeviceSubClass;\r
+ /** Device protocol code. */\r
+ uint8_t bDeviceProtocol;\r
+ /** Maximum packet size of endpoint 0 (in bytes). */\r
+ uint8_t bMaxPacketSize0;\r
+ /** Vendor ID. */\r
+ uint16_t idVendor;\r
+ /** Product ID. */\r
+ uint16_t idProduct;\r
+ /** Device release number in BCD format. */\r
+ uint16_t bcdDevice;\r
+ /** Index of the manufacturer string descriptor. */\r
+ uint8_t iManufacturer;\r
+ /** Index of the product string descriptor. */\r
+ uint8_t iProduct;\r
+ /** Index of the serial number string descriptor. */\r
+ uint8_t iSerialNumber;\r
+ /** Number of possible configurations for the device. */\r
+ uint8_t bNumConfigurations;\r
+\r
+} __attribute__ ((__packed__)) USBDeviceDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef USBOtgDescriptor\r
+ * \brief USB On-The-Go descriptor struct.\r
+ */\r
+typedef struct _USBOtgDescriptor {\r
+\r
+ /** Size of this descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type (USBGenericDescriptor_OTG). */\r
+ uint8_t bDescriptorType;\r
+ /** Attribute Fields D7?: Reserved D1: HNP support D0: SRP support */\r
+ uint8_t bmAttributes;\r
+\r
+} __attribute__ ((__packed__)) USBOtgDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef USBDeviceQualifierDescriptor\r
+ * \brief Alternate device descriptor indicating the capabilities of the device\r
+ * in full-speed, if currently in high-speed; or in high-speed, if it is\r
+ * currently in full-speed. Only relevant for devices supporting the\r
+ * high-speed mode.\r
+ */\r
+typedef struct _USBDeviceQualifierDescriptor {\r
+\r
+ /** Size of the descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type (USBDESC_DEVICE_QUALIFIER or "USB device types"). */\r
+ uint8_t bDescriptorType;\r
+ /** USB specification release number (in BCD format). */\r
+ uint16_t bcdUSB;\r
+ /** Device class code. */\r
+ uint8_t bDeviceClass;\r
+ /** Device subclass code. */\r
+ uint8_t bDeviceSubClass;\r
+ /** Device protocol code. */\r
+ uint8_t bDeviceProtocol;\r
+ /** Maximum packet size of endpoint 0. */\r
+ uint8_t bMaxPacketSize0;\r
+ /** Number of possible configurations for the device. */\r
+ uint8_t bNumConfigurations;\r
+ /** Reserved. */\r
+ uint8_t bReserved;\r
+\r
+} __attribute__ ((__packed__)) USBDeviceQualifierDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef USBConfigurationDescriptor\r
+ * \brief USB standard configuration descriptor structure.\r
+ */\r
+typedef struct _USBConfigurationDescriptor {\r
+\r
+ /** Size of the descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type\r
+ (USBDESC_CONFIGURATION of \ref usb_desc_type USB Descriptor types). */\r
+ uint8_t bDescriptorType;\r
+ /** Length of all descriptors returned along with this configuration\r
+ descriptor. */\r
+ uint16_t wTotalLength;\r
+ /** Number of interfaces in this configuration. */\r
+ uint8_t bNumInterfaces;\r
+ /** Value for selecting this configuration. */\r
+ uint8_t bConfigurationValue;\r
+ /** Index of the configuration string descriptor. */\r
+ uint8_t iConfiguration;\r
+ /** Configuration characteristics. */\r
+ uint8_t bmAttributes;\r
+ /** Maximum power consumption of the device when in this configuration. */\r
+ uint8_t bMaxPower;\r
+\r
+} __attribute__ ((__packed__)) USBConfigurationDescriptor; /* GCC*/\r
+\r
+/**\r
+ * \typedef USBInterfaceAssociationDescriptor\r
+ * \brief\r
+ */\r
+typedef struct _USBInterfaceAssociationDescriptor {\r
+\r
+ unsigned char bLength;\r
+ unsigned char bDescriptorType;\r
+ unsigned char bFirstInterface;\r
+ unsigned char bInterfaceCount;\r
+ unsigned char bFunctionClass;\r
+ unsigned char bFunctionSubClass;\r
+ unsigned char bFunctionProtocol;\r
+ unsigned char iFunction;\r
+} __attribute__ ((__packed__)) USBInterfaceAssociationDescriptor; /* GCC*/\r
+\r
+/**\r
+ * \typedef USBInterfaceDescriptor\r
+ * \brief USB standard interface descriptor structure.\r
+ */\r
+typedef struct _USBInterfaceDescriptor {\r
+\r
+ /** Size of the descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type (USBGenericDescriptor_INTERFACE). */\r
+ uint8_t bDescriptorType;\r
+ /** Number of the interface in its configuration. */\r
+ uint8_t bInterfaceNumber;\r
+ /** Value to select this alternate interface setting. */\r
+ uint8_t bAlternateSetting;\r
+ /** Number of endpoints used by the inteface (excluding endpoint 0). */\r
+ uint8_t bNumEndpoints;\r
+ /** Interface class code. */\r
+ uint8_t bInterfaceClass;\r
+ /** Interface subclass code. */\r
+ uint8_t bInterfaceSubClass;\r
+ /** Interface protocol code. */\r
+ uint8_t bInterfaceProtocol;\r
+ /** Index of the interface string descriptor. */\r
+ uint8_t iInterface;\r
+\r
+} __attribute__ ((__packed__)) USBInterfaceDescriptor; /* GCC */\r
+\r
+/**\r
+ * \typedef USBEndpointDescriptor\r
+ * \brief USB standard endpoint descriptor structure.\r
+ */\r
+typedef struct _USBEndpointDescriptor {\r
+\r
+ /** Size of the descriptor in bytes. */\r
+ uint8_t bLength;\r
+ /** Descriptor type (\ref USBGenericDescriptor_ENDPOINT). */\r
+ uint8_t bDescriptorType;\r
+ /** Address and direction of the endpoint. */\r
+ uint8_t bEndpointAddress;\r
+ /** Endpoint type and additional characteristics\r
+ (for isochronous endpoints). */\r
+ uint8_t bmAttributes;\r
+ /** Maximum packet size (in bytes) of the endpoint. */\r
+ uint16_t wMaxPacketSize;\r
+ /** Polling rate of the endpoint. */\r
+ uint8_t bInterval;\r
+\r
+} __attribute__ ((__packed__)) USBEndpointDescriptor; /* GCC*/\r
+\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported Functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+extern uint32_t USBGenericDescriptor_GetLength(\r
+ const USBGenericDescriptor *descriptor);\r
+\r
+extern uint8_t USBGenericDescriptor_GetType(\r
+ const USBGenericDescriptor *descriptor);\r
+\r
+extern USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor(\r
+ const USBGenericDescriptor *descriptor);\r
+\r
+extern USBGenericDescriptor *USBGenericDescriptor_Parse(\r
+ const USBGenericDescriptor * descriptor,\r
+ uint32_t totalLength,\r
+ USBDescriptorParseFunction parseFunction,\r
+ void * parseArg);\r
+\r
+\r
+extern uint32_t USBConfigurationDescriptor_GetTotalLength(\r
+ const USBConfigurationDescriptor *configuration);\r
+\r
+extern uint8_t USBConfigurationDescriptor_GetNumInterfaces(\r
+ const USBConfigurationDescriptor *configuration);\r
+\r
+extern uint8_t USBConfigurationDescriptor_IsSelfPowered(\r
+ const USBConfigurationDescriptor *configuration);\r
+\r
+extern void USBConfigurationDescriptor_Parse(\r
+ const USBConfigurationDescriptor *configuration,\r
+ USBInterfaceDescriptor **interfaces,\r
+ USBEndpointDescriptor **endpoints,\r
+ USBGenericDescriptor **others);\r
+\r
+extern uint8_t USBEndpointDescriptor_GetNumber(\r
+ const USBEndpointDescriptor *endpoint);\r
+\r
+extern uint8_t USBEndpointDescriptor_GetDirection(\r
+ const USBEndpointDescriptor *endpoint);\r
+\r
+extern uint8_t USBEndpointDescriptor_GetType(\r
+ const USBEndpointDescriptor *endpoint);\r
+\r
+extern uint16_t USBEndpointDescriptor_GetMaxPacketSize(\r
+ const USBEndpointDescriptor *endpoint);\r
+\r
+extern uint8_t USBEndpointDescriptor_GetInterval(\r
+ const USBEndpointDescriptor *endpoint);\r
+\r
+\r
+/** @}*/\r
+/**@}*/\r
+#endif /* #ifndef _USBDESCRIPTORS_H_ */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2008, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \par Purpose\r
+ *\r
+ * Standard output methods for reporting debug information, warnings and\r
+ * errors, which can be easily be turned on/off.\r
+ *\r
+ * \par Usage\r
+ * -# Initialize the debug message port in application, for stdio printf().\r
+ * -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR()\r
+ * TRACE_FATAL() macros to output traces throughout the program.\r
+ * -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2\r
+ * and Fatal 1. Disable a group of traces by changing the value of\r
+ * TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL\r
+ * are not generated. To generate no trace, use the reserved value 0.\r
+ * -# Trace disabling can be static or dynamic. If dynamic disabling is selected\r
+ * the trace level can be modified in runtime. If static disabling is selected\r
+ * the disabled traces are not compiled.\r
+ *\r
+ * \par traceLevels Trace level description\r
+ * -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program,\r
+ * and which do not produce meaningful information otherwise.\r
+ * -# TRACE_INFO (4): Informational trace about the program execution. Should\r
+ * enable the user to see the execution flow.\r
+ * -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case\r
+ * it can be discarded safely; it may even be expected.\r
+ * -# TRACE_ERROR (2): Indicates an error which may not stop the program execution,\r
+ * but which indicates there is a problem with the code.\r
+ * -# TRACE_FATAL (1): Indicates a major error which prevents the program from going\r
+ * any further.\r
+ */\r
+\r
+#ifndef _USBLIB_TRACE_H\r
+#define _USBLIB_TRACE_H\r
+\r
+/*\r
+ * Headers\r
+ */\r
+\r
+#include <stdio.h>\r
+\r
+/*\r
+ * Global Definitions\r
+ */\r
+\r
+/** Softpack Version */\r
+#define USBLIB_VERSION "0.1"\r
+\r
+#define TRACE_LEVEL_DEBUG 5\r
+#define TRACE_LEVEL_INFO 4\r
+#define TRACE_LEVEL_WARNING 3\r
+#define TRACE_LEVEL_ERROR 2\r
+#define TRACE_LEVEL_FATAL 1\r
+#define TRACE_LEVEL_NO_TRACE 0\r
+\r
+/* By default, all traces are output except the debug one. */\r
+#if !defined(TRACE_LEVEL)\r
+#define TRACE_LEVEL TRACE_LEVEL_INFO\r
+#endif\r
+\r
+/* By default, trace level is static (not dynamic) */\r
+#if !defined(DYN_TRACES)\r
+#define DYN_TRACES 0\r
+#endif\r
+\r
+#if defined(NOTRACE)\r
+#error "Error: NOTRACE has to be not defined !"\r
+#endif\r
+\r
+#undef NOTRACE\r
+#if (DYN_TRACES==0)\r
+ #if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE)\r
+ #define NOTRACE\r
+ #endif\r
+#endif\r
+\r
+\r
+\r
+/* ------------------------------------------------------------------------------\r
+ * Global Macros\r
+ * ------------------------------------------------------------------------------\r
+ */\r
+\r
+#ifndef DYNTRACE\r
+#define DYNTRACE 0\r
+#endif\r
+\r
+\r
+/**\r
+ * Outputs a formatted string using 'printf' if the log level is high\r
+ * enough. Can be disabled by defining TRACE_LEVEL=0 during compilation.\r
+ * \param ... Additional parameters depending on formatted string.\r
+ */\r
+#if defined(NOTRACE)\r
+\r
+/* Empty macro */\r
+#define TRACE_DEBUG(...) { }\r
+#define TRACE_INFO(...) { }\r
+#define TRACE_WARNING(...) { }\r
+#define TRACE_ERROR(...) { }\r
+#define TRACE_FATAL(...) { while(1); }\r
+\r
+#define TRACE_DEBUG_WP(...) { }\r
+#define TRACE_INFO_WP(...) { }\r
+#define TRACE_WARNING_WP(...) { }\r
+#define TRACE_ERROR_WP(...) { }\r
+#define TRACE_FATAL_WP(...) { while(1); }\r
+\r
+#elif (DYN_TRACES == 1)\r
+\r
+/* Trace output depends on dwTraceLevel value */\r
+#define TRACE_DEBUG(...) { if (dwTraceLevel >= TRACE_LEVEL_DEBUG) { printf("-D- " __VA_ARGS__); } }\r
+#define TRACE_INFO(...) { if (dwTraceLevel >= TRACE_LEVEL_INFO) { printf("-I- " __VA_ARGS__); } }\r
+#define TRACE_WARNING(...) { if (dwTraceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } }\r
+#define TRACE_ERROR(...) { if (dwTraceLevel >= TRACE_LEVEL_ERROR) { printf("-E- " __VA_ARGS__); } }\r
+#define TRACE_FATAL(...) { if (dwTraceLevel >= TRACE_LEVEL_FATAL) { printf("-F- " __VA_ARGS__); while(1); } }\r
+\r
+#define TRACE_DEBUG_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_DEBUG) { printf(__VA_ARGS__); } }\r
+#define TRACE_INFO_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_INFO) { printf(__VA_ARGS__); } }\r
+#define TRACE_WARNING_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } }\r
+#define TRACE_ERROR_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_ERROR) { printf(__VA_ARGS__); } }\r
+#define TRACE_FATAL_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_FATAL) { printf(__VA_ARGS__); while(1); } }\r
+\r
+#else\r
+\r
+/* Trace compilation depends on TRACE_LEVEL value */\r
+#if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG)\r
+#define TRACE_DEBUG(...) { printf("-D- " __VA_ARGS__); }\r
+#define TRACE_DEBUG_WP(...) { printf(__VA_ARGS__); }\r
+#else\r
+#define TRACE_DEBUG(...) { }\r
+#define TRACE_DEBUG_WP(...) { }\r
+#endif\r
+\r
+#if (TRACE_LEVEL >= TRACE_LEVEL_INFO)\r
+#define TRACE_INFO(...) { printf("-I- " __VA_ARGS__); }\r
+#define TRACE_INFO_WP(...) { printf(__VA_ARGS__); }\r
+#else\r
+#define TRACE_INFO(...) { }\r
+#define TRACE_INFO_WP(...) { }\r
+#endif\r
+\r
+#if (TRACE_LEVEL >= TRACE_LEVEL_WARNING)\r
+#define TRACE_WARNING(...) { printf("-W- " __VA_ARGS__); }\r
+#define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); }\r
+#else\r
+#define TRACE_WARNING(...) { }\r
+#define TRACE_WARNING_WP(...) { }\r
+#endif\r
+\r
+#if (TRACE_LEVEL >= TRACE_LEVEL_ERROR)\r
+#define TRACE_ERROR(...) { printf("-E- " __VA_ARGS__); }\r
+#define TRACE_ERROR_WP(...) { printf(__VA_ARGS__); }\r
+#else\r
+#define TRACE_ERROR(...) { }\r
+#define TRACE_ERROR_WP(...) { }\r
+#endif\r
+\r
+#if (TRACE_LEVEL >= TRACE_LEVEL_FATAL)\r
+#define TRACE_FATAL(...) { printf("-F- " __VA_ARGS__); while(1); }\r
+#define TRACE_FATAL_WP(...) { printf(__VA_ARGS__); while(1); }\r
+#else\r
+#define TRACE_FATAL(...) { while(1); }\r
+#define TRACE_FATAL_WP(...) { while(1); }\r
+#endif\r
+\r
+#endif\r
+\r
+\r
+/**\r
+ * Exported variables\r
+ */\r
+/** Depending on DYN_TRACES, dwTraceLevel is a modifable runtime variable or a define */\r
+#if !defined(NOTRACE) && (DYN_TRACES == 1)\r
+ extern uint32_t dwTraceLevel ;\r
+#endif\r
+\r
+#endif /* #ifndef _USBLIB_TRACE_H */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * Definitions for USB Lib compiling.\r
+ */\r
+\r
+#ifndef USBLIB_TYPES_H\r
+#define USBLIB_TYPES_H\r
+/*----------------------------------------------------------------------------\r
+ * Includes\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Defines\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/* Define WEAK attribute */\r
+#ifndef WEAK\r
+#if defined ( __CC_ARM )\r
+ #define WEAK __attribute__ ((weak))\r
+#elif defined ( __ICCARM__ )\r
+ #define WEAK __weak\r
+#elif defined ( __GNUC__ )\r
+ #define WEAK __attribute__ ((weak))\r
+#endif\r
+#endif\r
+\r
+/** USB status ReturnCode */\r
+typedef enum _USBRC {\r
+ USBRC_OK = 0, /**< Operation was successful */\r
+ USBRC_SUCCESS = 0, /**< Operation was successful */\r
+ /* Bool codes */\r
+ USBRC_FALSE = 0, /**< As boolean TRUE */\r
+ USBRC_TRUE = 1, /**< As boolean FALSE */\r
+ /* Error codes */ \r
+ USBRC_BUSY, /**< EP/Device is already busy */\r
+ USBRC_ABORTED, /**< Operation aborted due to error or stall */\r
+ USBRC_CANCELED, /**< Operation canceled by user */\r
+ USBRC_RESET, /**< Operation aborted due to init/reset/un-configure */\r
+ USBRC_PARTIAL_DONE,/**< Part of operation successfully done */\r
+ USBRC_FINISHED, /**< All operation successfully done and terminate */\r
+\r
+ USBRC_PARAM_ERR, /**< Failed due to parameter error */\r
+ USBRC_STATE_ERR, /**< Failed due to state error */\r
+ USBRC_ERROR, /**< General error */\r
+\r
+ USBRC_SW_NOT_SUPPORTED = 0xFD, /**< Failed due to SW not supported */\r
+ USBRC_HW_NOT_SUPPORTED = 0xFE /**< Failed due to HW not supported */\r
+} USBRC;\r
+ \r
+#endif /* #define USBLIB_TYPES_H */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/** \file\r
+ * \section Purpose\r
+ * \r
+ * Definitions and methods for USB request structures described by the\r
+ * USB specification.\r
+ * \r
+ * \section Usage\r
+ * \r
+ */\r
+\r
+#ifndef _USBREQUESTS_H_\r
+#define _USBREQUESTS_H_\r
+/** \addtogroup usb_general\r
+ * @{\r
+ * \addtogroup usb_request USB Requests\r
+ * @{\r
+ */\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Headers\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* These headers were introduced in C99 by working group\r
+ * ISO/IEC JTC1/SC22/WG14.\r
+ */\r
+#include <stdint.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Definitions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/*----------- Generic Request ------------*/\r
+\r
+/** \addtogroup usb_request_define USB Generic Request definitions\r
+ * @{\r
+ * This section lists the codes of USB generic request.\r
+ * \r
+ * - \ref usb_request_code USB Request codes\r
+ * - \ref USBGenericRequest_GETSTATUS\r
+ * - \ref USBGenericRequest_CLEARFEATURE\r
+ * - \ref USBGenericRequest_SETFEATURE\r
+ * - \ref USBGenericRequest_SETADDRESS\r
+ * - \ref USBGenericRequest_GETDESCRIPTOR\r
+ * - \ref USBGenericRequest_SETDESCRIPTOR\r
+ * - \ref USBGenericRequest_GETCONFIGURATION\r
+ * - \ref USBGenericRequest_SETCONFIGURATION\r
+ * - \ref USBGenericRequest_GETINTERFACE\r
+ * - \ref USBGenericRequest_SETINTERFACE\r
+ * - \ref USBGenericRequest_SYNCHFRAME\r
+ * \r
+ * - \ref usb_request_recipient USB Request Recipients\r
+ * - \ref USBGenericRequest_DEVICE\r
+ * - \ref USBGenericRequest_INTERFACE\r
+ * - \ref USBGenericRequest_ENDPOINT\r
+ * - \ref USBGenericRequest_OTHER\r
+ * \r
+ * - \ref usb_request_type USB Request Types\r
+ * - \ref USBGenericRequest_STANDARD\r
+ * - \ref USBGenericRequest_CLASS\r
+ * - \ref USBGenericRequest_VENDOR\r
+ * \r
+ * - \ref usb_request_dir USB Request Directions\r
+ * - \ref USBGenericRequest_IN\r
+ * - \ref USBGenericRequest_OUT\r
+ */\r
+\r
+/** \addtogroup usb_request_code USB Request codes\r
+ * @{\r
+ * This section lists the USB generic request codes.\r
+ * - \ref USBGenericRequest_GETSTATUS\r
+ * - \ref USBGenericRequest_CLEARFEATURE\r
+ * - \ref USBGenericRequest_SETFEATURE\r
+ * - \ref USBGenericRequest_SETADDRESS\r
+ * - \ref USBGenericRequest_GETDESCRIPTOR\r
+ * - \ref USBGenericRequest_SETDESCRIPTOR\r
+ * - \ref USBGenericRequest_GETCONFIGURATION\r
+ * - \ref USBGenericRequest_SETCONFIGURATION\r
+ * - \ref USBGenericRequest_GETINTERFACE\r
+ * - \ref USBGenericRequest_SETINTERFACE\r
+ * - \ref USBGenericRequest_SYNCHFRAME\r
+ */\r
+/** GET_STATUS request code. */\r
+#define USBGenericRequest_GETSTATUS 0\r
+/** CLEAR_FEATURE request code. */\r
+#define USBGenericRequest_CLEARFEATURE 1\r
+/** SET_FEATURE request code. */\r
+#define USBGenericRequest_SETFEATURE 3\r
+/** SET_ADDRESS request code. */\r
+#define USBGenericRequest_SETADDRESS 5\r
+/** GET_DESCRIPTOR request code. */\r
+#define USBGenericRequest_GETDESCRIPTOR 6\r
+/** SET_DESCRIPTOR request code. */\r
+#define USBGenericRequest_SETDESCRIPTOR 7\r
+/** GET_CONFIGURATION request code. */\r
+#define USBGenericRequest_GETCONFIGURATION 8\r
+/** SET_CONFIGURATION request code. */\r
+#define USBGenericRequest_SETCONFIGURATION 9\r
+/** GET_INTERFACE request code. */\r
+#define USBGenericRequest_GETINTERFACE 10\r
+/** SET_INTERFACE request code. */\r
+#define USBGenericRequest_SETINTERFACE 11\r
+/** SYNCH_FRAME request code. */\r
+#define USBGenericRequest_SYNCHFRAME 12\r
+/** @}*/\r
+\r
+/** \addtogroup usb_request_recipient USB Request Recipients\r
+ * @{\r
+ * This section lists codes of USB request recipients.\r
+ * - \ref USBGenericRequest_DEVICE\r
+ * - \ref USBGenericRequest_INTERFACE\r
+ * - \ref USBGenericRequest_ENDPOINT\r
+ * - \ref USBGenericRequest_OTHER\r
+ */\r
+/** Recipient is the whole device. */\r
+#define USBGenericRequest_DEVICE 0\r
+/** Recipient is an interface. */\r
+#define USBGenericRequest_INTERFACE 1\r
+/** Recipient is an endpoint. */\r
+#define USBGenericRequest_ENDPOINT 2\r
+/** Recipient is another entity. */\r
+#define USBGenericRequest_OTHER 3\r
+/** @}*/\r
+\r
+/** \addtogroup usb_request_type USB Request Types\r
+ * @{\r
+ * This section lists codes of USB request types.\r
+ * - \ref USBGenericRequest_STANDARD\r
+ * - \ref USBGenericRequest_CLASS\r
+ * - \ref USBGenericRequest_VENDOR\r
+ */\r
+/** Request is standard. */\r
+#define USBGenericRequest_STANDARD 0\r
+/** Request is class-specific. */\r
+#define USBGenericRequest_CLASS 1\r
+/** Request is vendor-specific. */\r
+#define USBGenericRequest_VENDOR 2\r
+/** @}*/\r
+\r
+/** \addtogroup usb_request_dir USB Request Directions\r
+ * @{\r
+ * This section lists codes of USB request directions.\r
+ * - \ref USBGenericRequest_IN\r
+ * - \ref USBGenericRequest_OUT\r
+ */\r
+/** Transfer occurs from device to the host. */\r
+#define USBGenericRequest_OUT 0\r
+/** Transfer occurs from the host to the device. */\r
+#define USBGenericRequest_IN 1\r
+/** @}*/\r
+/** @}*/\r
+\r
+\r
+/*----------- Feature Request ------------*/\r
+\r
+/** \addtogroup usb_feature_def USB Feature Request Definitions\r
+ * @{\r
+ * This section lists codes of USB Feature Request\r
+ *\r
+ * - \ref usb_feature_sel USB Feature selectors\r
+ * - \ref USBFeatureRequest_ENDPOINTHALT\r
+ * - \ref USBFeatureRequest_DEVICEREMOTEWAKEUP\r
+ * - \ref USBFeatureRequest_TESTMODE\r
+ *\r
+ * - \ref usb_test_sel USB Test mode selectors\r
+ * - \ref USBFeatureRequest_TESTJ\r
+ * - \ref USBFeatureRequest_TESTK\r
+ * - \ref USBFeatureRequest_TESTSE0NAK\r
+ * - \ref USBFeatureRequest_TESTPACKET\r
+ * - \ref USBFeatureRequest_TESTFORCEENABLE\r
+ * - \ref USBFeatureRequest_TESTSENDZLP\r
+ */\r
+\r
+/** \addtogroup usb_feature_sel USB Feature selectors\r
+ * @{\r
+ * This section lists codes of USB feature selectors.\r
+ * - \ref USBFeatureRequest_ENDPOINTHALT\r
+ * - \ref USBFeatureRequest_DEVICEREMOTEWAKEUP\r
+ * - \ref USBFeatureRequest_TESTMODE\r
+ */\r
+/** Halt feature of an endpoint. */\r
+#define USBFeatureRequest_ENDPOINTHALT 0\r
+/** Remote wake-up feature of the device. */\r
+#define USBFeatureRequest_DEVICEREMOTEWAKEUP 1\r
+/** Test mode of the device. */\r
+#define USBFeatureRequest_TESTMODE 2\r
+/** OTG set feature */\r
+#define USBFeatureRequest_OTG 0x0B\r
+/** OTG b_hnp_enable */\r
+#define USBFeatureRequest_OTG_B_HNP_ENABLE 3\r
+/** OTG a_hnp_support */\r
+#define USBFeatureRequest_OTG_A_HNP_SUPPORT 4\r
+/** OTG a_alt_hnp_support */\r
+#define USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT 5\r
+/** @}*/\r
+\r
+/** \addtogroup usb_test_sel USB Test mode selectors\r
+ * @{\r
+ * This section lists codes of USB high speed test mode selectors.\r
+ * - \ref USBFeatureRequest_TESTJ\r
+ * - \ref USBFeatureRequest_TESTK\r
+ * - \ref USBFeatureRequest_TESTSE0NAK\r
+ * - \ref USBFeatureRequest_TESTPACKET\r
+ * - \ref USBFeatureRequest_TESTFORCEENABLE\r
+ * - \ref USBFeatureRequest_TESTSENDZLP\r
+ */\r
+\r
+/** Tests the high-output drive level on the D+ line. */\r
+#define USBFeatureRequest_TESTJ 1\r
+/** Tests the high-output drive level on the D- line. */\r
+#define USBFeatureRequest_TESTK 2\r
+/** Tests the output impedance, low-level output voltage and loading\r
+ characteristics. */\r
+#define USBFeatureRequest_TESTSE0NAK 3\r
+/** Tests rise and fall times, eye patterns and jitter. */\r
+#define USBFeatureRequest_TESTPACKET 4\r
+/** Tests the hub disconnect detection. */\r
+#define USBFeatureRequest_TESTFORCEENABLE 5\r
+/** Send a ZLP in Test Mode. */\r
+#define USBFeatureRequest_TESTSENDZLP 6\r
+/** @}*/\r
+/** @}*/\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Types\r
+ *---------------------------------------------------------------------------*/\r
+\r
+/* \r
+ * Function types\r
+ */\r
+\r
+/* \r
+ * Descriptor structs types\r
+ */\r
+#pragma pack(1)\r
+#if defined ( __CC_ARM ) /* Keil ¦ÌVision 4 */\r
+#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */\r
+#define __attribute__(...)\r
+#elif defined ( __GNUC__ ) /* GCC CS3 2009q3-68 */\r
+#endif\r
+\r
+/**\r
+ * Generic USB SETUP request sent over Control endpoints.\r
+ */\r
+typedef struct {\r
+\r
+ /** Type of request\r
+ * \sa usb_request_recipient "USB Request Recipients"\r
+ * \sa usb_request_type "USB Request Types"\r
+ * \sa usb_request_dir "USB Request Directions" */\r
+ uint8_t bmRequestType:8;\r
+ /** Request code\r
+ * \sa usb_request_code "USB Request Codes" */\r
+ uint8_t bRequest:8;\r
+ /** Request-specific value parameter. */\r
+ uint16_t wValue:16;\r
+ /** Request-specific index parameter. */\r
+ uint16_t wIndex:16;\r
+ /** Expected length (in bytes) of the data phase. */\r
+ uint16_t wLength:16;\r
+\r
+} USBGenericRequest;\r
+\r
+#pragma pack()\r
+\r
+/*---------------------------------------------------------------------------\r
+ * Exported Functions\r
+ *---------------------------------------------------------------------------*/\r
+\r
+extern uint8_t USBGenericRequest_GetType(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBGenericRequest_GetRequest(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint16_t USBGenericRequest_GetValue(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint16_t USBGenericRequest_GetIndex(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint16_t USBGenericRequest_GetLength(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBGenericRequest_GetEndpointNumber(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBGenericRequest_GetRecipient(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBGenericRequest_GetDirection(\r
+ const USBGenericRequest *request);\r
+\r
+\r
+extern uint8_t USBGetDescriptorRequest_GetDescriptorType(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBGetDescriptorRequest_GetDescriptorIndex(\r
+ const USBGenericRequest *request);\r
+\r
+\r
+extern uint8_t USBSetAddressRequest_GetAddress(\r
+ const USBGenericRequest *request);\r
+\r
+\r
+extern uint8_t USBSetConfigurationRequest_GetConfiguration(\r
+ const USBGenericRequest *request);\r
+\r
+\r
+extern uint8_t USBInterfaceRequest_GetInterface(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBInterfaceRequest_GetAlternateSetting(\r
+ const USBGenericRequest *request);\r
+\r
+\r
+extern uint8_t USBFeatureRequest_GetFeatureSelector(\r
+ const USBGenericRequest *request);\r
+\r
+extern uint8_t USBFeatureRequest_GetTestSelector(\r
+ const USBGenericRequest *request);\r
+\r
+/** @}*/\r
+/**@}*/\r
+#endif /* #ifndef _USBREQUESTS_H_ */\r
+\r
--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file usb.h\r
+ *\r
+ * Definition of SAM9XX5-EK usb library\r
+ *\r
+ */\r
+\r
+#ifndef _usb_\r
+#define _usb_\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+#include "board.h"\r
+\r
+#include "include/USBD.h"\r
+#include "include/USBD_HAL.h"\r
+\r
+#include "include/USBDescriptors.h"\r
+\r
+#include "include/USBDDriver.h"\r
+\r
+#include "include/AUDDescriptors.h"\r
+#include "include/AUDDFunction.h"\r
+#include "include/AUDDSpeakerDriver.h"\r
+#include "include/AUDDSpeakerPhone.h"\r
+#include "include/AUDDSpeakerPhoneDriver.h"\r
+#include "include/AUDDStream.h"\r
+#include "include/AUDRequests.h"\r
+\r
+#include "include/CDCAUDDDriver.h"\r
+#include "include/CDCDescriptors.h"\r
+#include "include/CDCDSerial.h"\r
+#include "include/CDCDSerialDriver.h"\r
+#include "include/CDCDSerialPort.h"\r
+#include "include/CDCHIDDDriver.h"\r
+#include "include/CDCMSDDriver.h"\r
+#include "include/CDCNotifications.h"\r
+#include "include/CDCRequests.h"\r
+\r
+#include "include/DUALCDCDDriver.h"\r
+\r
+#include "include/HIDAUDDDriver.h"\r
+#include "include/HIDDescriptors.h"\r
+#include "include/HIDDFunction.h"\r
+#include "include/HIDDKeyboard.h"\r
+#include "include/HIDDKeyboardDriver.h"\r
+#include "include/HIDDMouseDriver.h"\r
+#include "include/HIDDTransferDriver.h"\r
+#include "include/HIDMSDDriver.h"\r
+#include "include/HIDReports.h"\r
+#include "include/HIDRequests.h"\r
+#include "include/HIDUsages.h"\r
+\r
+#include "include/MSD.h"\r
+#include "include/MSDDriver.h"\r
+#include "include/MSDDStateMachine.h"\r
+#include "include/MSDescriptors.h"\r
+#include "include/MSDFunction.h"\r
+#include "include/MSDIOFifo.h"\r
+#include "include/MSDLun.h"\r
+\r
+#include "include/SBC.h"\r
+#include "include/SBCMethods.h"\r
+\r
+#include "include/USBVideo.h"\r
+\r
+#include "include/USBLib_Types.h"\r
+#include "include/USBRequests.h"\r
+\r
+#endif /* #ifndef _usb_ */\r
* Handler installed on the VBUS pin to detect connect() and disconnect()\r
* events.\r
*/\r
-static void prvVBusISRHandler( const Pin *pxPin );\r
+static void prvVBusISRHandler( void );\r
\r
/*\r
* USB handler defined by the driver, installed after the CDC driver has been\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvVBusISRHandler( const Pin *pxPin )\r
+static void prvVBusISRHandler( void )\r
{\r
- /* NOTE: As this was written for the XPlained board, which is powered\r
- through the USB and cannot be on without the USB connected, this function\r
- has not been exercised. */\r
+const Pin xVBusPin = PIN_USB_VBUS;\r
\r
/* Check current level on VBus to detect a connect/disconnect. */\r
- if( PIO_Get( pxPin ) != 0 )\r
+ if( PIO_Get( &xVBusPin ) != 0 )\r
{\r
USBD_Connect();\r
}\r
static void prvConfigureVBus( void )\r
{\r
const Pin xVBusPin = PIN_USB_VBUS;\r
+const uint32_t ulPriority = 7; /* Highest. */\r
\r
/* Configure PIO to generate an interrupt on status change. */\r
- PIO_Configure( &xVBusPin, 1 );\r
- PIO_ConfigureIt( &xVBusPin, prvVBusISRHandler );\r
+ PIO_Configure( &xVBusPin, 1 );\r
+ PIO_ConfigureIt( &xVBusPin );\r
+\r
+ /* Ensure interrupt is disabled before setting the mode and installing the\r
+ handler. The priority of the tick interrupt should always be set to the\r
+ lowest possible. */\r
+ AIC->AIC_SSR = ID_PIOE;\r
+ AIC->AIC_IDCR = AIC_IDCR_INTD;\r
+ AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | ulPriority;\r
+ AIC->AIC_SVR = ( uint32_t ) prvVBusISRHandler;\r
+\r
+ /* Start with the interrupt clear. */\r
+ AIC->AIC_ICCR = AIC_ICCR_INTCLR;\r
PIO_EnableIt( &xVBusPin );\r
+ AIC_EnableIT( ID_PIOE );\r
\r
/* Check current level on VBus */\r
if( PIO_Get( &xVBusPin ) != pdFALSE )\r
{\r
- /* if VBUS present, force the connect */\r
+ /* If VBUS present, force the connect */\r
USBD_Connect();\r
}\r
else\r
the USB driver has been initialised. By default, configures the UDP/UDPHS\r
interrupt. The interrupt priority is set to the highest to ensure the\r
interrupt nesting tests interfer as little as possible with the USB. */\r
- IRQ_ConfigureIT( ID_UDPHS, 7, USBD_IrqHandler );\r
- IRQ_EnableIT( ID_UDPHS );\r
+ AIC_EnableIT( ID_UDPHS );\r
}\r
/*-----------------------------------------------------------*/\r
\r
#define configUSE_IDLE_HOOK 1\r
#define configUSE_TICK_HOOK 1\r
#define configMAX_PRIORITIES ( 5 )\r
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 100 )\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 42 * 1024 ) )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 120 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 38 * 1024 ) )\r
#define configMAX_TASK_NAME_LEN ( 10 )\r
#define configUSE_TRACE_FACILITY 1\r
#define configUSE_16_BIT_TICKS 0\r
FreeRTOS/Source/tasks.c for limitations. */\r
#define configUSE_STATS_FORMATTING_FUNCTIONS 1\r
\r
-/* Cortex-A specific setting: FPU has 16 (rather than 32) d registers. See:\r
+/* Cortex-A specific setting: FPU has 32 (rather than 16) d registers. See:\r
http://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-MPUs-without-a-GIC.html */\r
-#define configFPU_D32 0\r
+#define configFPU_D32 1\r
\r
/* Cortex-A specific setting: The address of the register within the interrupt\r
controller from which the address of the current interrupt's handling function\r
the need to use a separate timer for that purpose. The 20KHz timer\r
increments ulHighFrequencyTimerCounts, which is used as the time base.\r
Therefore the following macro is not implemented. */\r
- #define configGENERATE_RUN_TIME_STATS 0\r
-//_RB_ extern volatile uint32_t ulHighFrequencyTimerCounts;\r
-//_RB_ #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\r
-//_RB_ #define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTimerCounts\r
+ #define configGENERATE_RUN_TIME_STATS 1\r
+ extern volatile uint32_t ulHighFrequencyTimerCounts;\r
+ #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\r
+ #define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTimerCounts\r
\r
/* The size of the global output buffer that is available for use when there\r
are multiple command interpreters running at once (for example, one on a UART\r
* in FreeRTOSConfig.h to call the function. This file contains a function\r
* that is suitable for use on the Atmel SAMA5.\r
*/\r
-\r
-/*_RB_*/\r
-uint32_t IRQ_ConfigureIT(uint32_t source,\r
- uint32_t mode,\r
- void( *handler )( void ));\r
-\r
-uint32_t IRQ_ConfigureIT(uint32_t source,\r
- uint32_t mode,\r
- void( *handler )( void ))\r
-{\r
- uint32_t prevHandler;\r
- PMC->PMC_PCER1 = (1 << ( ID_IRQ - 32));\r
- AIC->AIC_SSR = source;\r
- prevHandler = AIC->AIC_SVR;\r
- /* Disable the interrupt first */\r
- AIC->AIC_IDCR = AIC_IDCR_INTD;\r
- /* Configure mode and handler */\r
- AIC->AIC_SMR = mode;\r
- AIC->AIC_SVR = (uint32_t) handler;\r
- /* Clear interrupt */\r
- AIC->AIC_ICCR = AIC_ICCR_INTCLR;\r
- return prevHandler;\r
-}\r
-\r
-\r
void vConfigureTickInterrupt( void )\r
{\r
/* NOTE: The PIT interrupt is cleared by the configCLEAR_TICK_INTERRUPT()\r
/* Initialize the PIT to the desired frequency - specified in uS. */\r
PIT_Init( 1000000UL / configTICK_RATE_HZ, ( BOARD_MCK / 2 ) / 1000000 );\r
\r
- /* Configure interrupt on PIT. Note this is on the system interrupt, which\r
- is shared with other system peripherals, so System_Handler() must be\r
- installed in place of FreeRTOS_Tick_Handler() if other system handlers are\r
- required. The tick must be given the lowest priority (0 in the SAMA5 AIC) */\r
- IRQ_ConfigureIT( ID_PIT, 0, FreeRTOS_Tick_Handler );\r
- /* See commend directly above IRQ_ConfigureIT( ID_PIT, 0, System_Handler ); */\r
-//_RB_ IRQ_EnableIT( ID_PIT );\r
-AIC_EnableIT( ID_PIT );\r
+ /* Enable IRQ / select PIT interrupt. */\r
+ PMC->PMC_PCER1 = ( 1 << ( ID_IRQ - 32 ) );\r
+ AIC->AIC_SSR = ID_PIT;\r
+\r
+ /* Ensure interrupt is disabled before setting the mode and installing the\r
+ handler. The priority of the tick interrupt should always be set to the\r
+ lowest possible. */\r
+ AIC->AIC_IDCR = AIC_IDCR_INTD;\r
+ AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE;\r
+ AIC->AIC_SVR = ( uint32_t ) FreeRTOS_Tick_Handler;\r
+\r
+ /* Start with the interrupt clear. */\r
+ AIC->AIC_ICCR = AIC_ICCR_INTCLR;\r
\r
+ /* Enable the interrupt in the AIC and peripheral. */\r
+ AIC_EnableIT( ID_PIT );\r
PIT_EnableIT();\r
\r
- /* Enable the pit. */\r
+ /* Enable the peripheral. */\r
PIT_Enable();\r
\r
/* Prevent compiler warnings in the case where System_Handler() is not used\r
\r
/* The high frequency interrupt given the highest priority or all. The priority\r
of the lower frequency timers must still be above the tick interrupt priority. */\r
-#define tmrLOWER_PRIORITY 1\r
+#define tmrLOWER_PRIORITY 3\r
#define tmrHIGHER_PRIORITY 5\r
/*-----------------------------------------------------------*/\r
\r
const uint32_t ulDivider = 128UL, ulTCCLKS = 3UL;\r
\r
/* Enable the TC clocks. */\r
- PMC->PMC_PCER0 = 1 << ID_TC0;\r
- PMC->PMC_PCER0 = 1 << ID_TC1;\r
+ PMC_EnablePeripheral( ID_TC0 );\r
+ PMC_EnablePeripheral( ID_TC1 );\r
\r
/* Configure TC0 channel 0 for a tmrTIMER_0_FREQUENCY frequency and trigger\r
- on RC compare. */\r
+ on RC compare. This is part of the IntQTimer test. */\r
TC_Configure( TC0, tmrTC0_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );\r
- TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC = BOARD_MCK / ( tmrTIMER_0_FREQUENCY * ulDivider );\r
+ TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC = ( BOARD_MCK / 2 ) / ( tmrTIMER_0_FREQUENCY * ulDivider );\r
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_IER = TC_IER_CPCS;\r
\r
/* Configure TC0 channel 1 for a tmrTIMER_1_FREQUENCY frequency and trigger\r
- on RC compare. */\r
+ on RC compare. This is part of the IntQTimer test. */\r
TC_Configure( TC0, tmrTC0_CHANNEL_1, ulTCCLKS | TC_CMR_CPCTRG );\r
- TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_RC = BOARD_MCK / ( tmrTIMER_1_FREQUENCY * ulDivider );\r
+ TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_RC = ( BOARD_MCK / 2 ) / ( tmrTIMER_1_FREQUENCY * ulDivider );\r
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_IER = TC_IER_CPCS;\r
\r
/* Configure TC1 channel 0 tmrTIMER_2_FREQUENCY frequency and trigger on\r
- RC compare. */\r
+ RC compare. This is the very high frequency timer. */\r
TC_Configure( TC1, tmrTC1_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );\r
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_RC = BOARD_MCK / ( tmrTIMER_2_FREQUENCY * ulDivider );\r
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_IER = TC_IER_CPCS;\r
\r
- /* Enable interrupts and start the timers. */\r
- IRQ_ConfigureIT( ID_TC0, tmrLOWER_PRIORITY, prvTC0_Handler );\r
- IRQ_ConfigureIT( ID_TC1, tmrHIGHER_PRIORITY, prvTC1_Handler );\r
- IRQ_EnableIT( ID_TC0 );\r
- IRQ_EnableIT( ID_TC1 );\r
+ /* First setup TC0 interrupt, in which two channels are used. */\r
+ AIC->AIC_SSR = ID_TC0;\r
+\r
+ /* Ensure the interrupt is disabled before setting mode and handler. */\r
+ AIC->AIC_IDCR = AIC_IDCR_INTD;\r
+ AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | tmrLOWER_PRIORITY;\r
+ AIC->AIC_SVR = ( uint32_t ) prvTC0_Handler;\r
+\r
+ /* Start with the interrupt clear. */\r
+ AIC->AIC_ICCR = AIC_ICCR_INTCLR;\r
+\r
+ /* Do the same for TC1 - which is the high frequency timer. */\r
+ AIC->AIC_SSR = ID_TC1;\r
+ AIC->AIC_IDCR = AIC_IDCR_INTD;\r
+ AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | tmrHIGHER_PRIORITY;\r
+ AIC->AIC_SVR = ( uint32_t ) prvTC1_Handler;\r
+ AIC->AIC_ICCR = AIC_ICCR_INTCLR;\r
+\r
+ /* Finally enable the interrupts and start the timers. */\r
+ AIC_EnableIT( ID_TC0 );\r
+ AIC_EnableIT( ID_TC1 );\r
TC_Start( TC0, tmrTC0_CHANNEL_0 );\r
TC_Start( TC0, tmrTC0_CHANNEL_1 );\r
TC_Start( TC1, tmrTC1_CHANNEL_0 );\r
\r
static void prvTC0_Handler( void )\r
{\r
- /* Read will clear the status bit. */\r
- if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )\r
- {\r
- portYIELD_FROM_ISR( xFirstTimerHandler() );\r
- }\r
+uint32_t ulDidSomething;\r
\r
- if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )\r
+ do\r
{\r
- portYIELD_FROM_ISR( xSecondTimerHandler() );\r
- }\r
+ ulDidSomething = pdFALSE;\r
+\r
+ /* Read will clear the status bit. */\r
+ if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )\r
+ {\r
+ /* Call the IntQ test function for this channel. */\r
+ portYIELD_FROM_ISR( xFirstTimerHandler() );\r
+ ulDidSomething = pdTRUE;\r
+ }\r
+\r
+ if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )\r
+ {\r
+ /* Call the IntQ test function for this channel. */\r
+ portYIELD_FROM_ISR( xSecondTimerHandler() );\r
+ ulDidSomething = pdTRUE;\r
+ }\r
+\r
+ } while( ulDidSomething == pdTRUE );\r
}\r
/*-----------------------------------------------------------*/\r
\r
*\r
* "FreeRTOS+CLI command console" - The command console is access using the USB\r
* CDC driver provided by Atmel. It is accessed through the USB connector\r
- * marked J6 SAMA5D3 Xplained board. Type "help" to see a list of registered\r
+ * marked J1 SAMA5D4 Xplained board. Type "help" to see a list of registered\r
* commands. The FreeRTOS+CLI license is different to the FreeRTOS license, see\r
* http://www.FreeRTOS.org/cli for license and usage details. The default baud\r
* rate is 115200.\r
; mission critical applications that require provable dependability.\r
;*/\r
\r
+#include "FreeRTOSConfig.h"\r
+\r
EXPORT vRegTest1Implementation\r
EXPORT vRegTest2Implementation\r
\r
vmov d14, r4, r5\r
vmov d15, r6, r7\r
\r
+ vmov d16, r0, r1\r
+ vmov d17, r2, r3\r
+ vmov d18, r4, r5\r
+ vmov d19, r6, r7\r
+ vmov d20, r8, r9\r
+ vmov d21, r10, r11\r
+ vmov d22, r0, r1\r
+ vmov d23, r2, r3\r
+ vmov d24, r4, r5\r
+ vmov d25, r6, r7\r
+ vmov d26, r8, r9\r
+ vmov d27, r10, r11\r
+ vmov d28, r0, r1\r
+ vmov d29, r2, r3\r
+ vmov d30, r4, r5\r
+ vmov d31, r6, r7\r
+\r
; Loop, checking each itteration that each register still contains the\r
; expected value.\r
reg1_loop\r
cmp r1, #0x77\r
bne reg1_error_loopf\r
\r
+ vmov r0, r1, d16\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d17\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d18\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d19\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d20\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d21\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d22\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d23\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d24\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d25\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d26\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d27\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d28\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d29\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d30\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d31\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+\r
; Restore the registers that were clobbered by the test.\r
pop {r0-r1}\r
\r
vmov d14, r4, r5\r
vmov d15, r6, r7\r
\r
+ vmov d16, r0, r1\r
+ vmov d17, r2, r3\r
+ vmov d18, r4, r5\r
+ vmov d19, r6, r7\r
+ vmov d20, r8, r9\r
+ vmov d21, r10, r11\r
+ vmov d22, r0, r1\r
+ vmov d23, r2, r3\r
+ vmov d24, r4, r5\r
+ vmov d25, r6, r7\r
+ vmov d26, r8, r9\r
+ vmov d27, r10, r11\r
+ vmov d28, r0, r1\r
+ vmov d29, r2, r3\r
+ vmov d30, r4, r5\r
+ vmov d31, r6, r7\r
+\r
; Loop, checking each itteration that each register still contains the\r
; expected value.\r
reg2_loop\r
cmp r1, #0x77000000\r
bne reg2_error_loopf\r
\r
+ vmov r0, r1, d16\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d17\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d18\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d19\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d20\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d21\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d22\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d23\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d24\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d25\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d26\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d27\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d28\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d29\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d30\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d31\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+\r
; Restore the registers that were clobbered by the test.\r
pop {r0-r1}\r
\r
b reg2_error_loop\r
nop\r
\r
-\r
END\r
</option>\r
<option>\r
<name>RunToEnable</name>\r
- <state>1</state>\r
+ <state>0</state>\r
</option>\r
<option>\r
<name>RunToName</name>\r
<debug>1</debug>\r
<option>\r
<name>FlashLoadersV3</name>\r
- <state></state>\r
+ <state>$TOOLKIT_DIR$\config\flashloader\</state>\r
</option>\r
<option>\r
<name>CInput</name>\r
</option>\r
<option>\r
<name>MacFile</name>\r
- <state>$PROJ_DIR$\..\..\..\..\libraries\libboard_sama5d4x-ek\resources\ewarm\sama5d4x-ek-ddram.mac</state>\r
+ <state>$PROJ_DIR$\AtmelFiles\libboard_sama5d4x-ek\resources\ewarm\sama5d4x-ek-ddram.mac</state>\r
</option>\r
<option>\r
<name>MemOverride</name>\r
</option>\r
<option>\r
<name>MemFile</name>\r
- <state>$TOOLKIT_DIR$\CONFIG\debugger\Atmel\iosama5d4x.ddf</state>\r
+ <state></state>\r
</option>\r
<option>\r
<name>RunToEnable</name>\r
- <state>0</state>\r
+ <state>1</state>\r
</option>\r
<option>\r
<name>RunToName</name>\r
</option>\r
<option>\r
<name>OCLastSavedByProductVersion</name>\r
- <state>6.30.1.53141</state>\r
+ <state>7.20.2.7418</state>\r
</option>\r
<option>\r
<name>OCDownloadAttachToProgram</name>\r
</option>\r
<option>\r
<name>CCDiagSuppress</name>\r
- <state></state>\r
+ <state>Pa131, Pa039</state>\r
</option>\r
<option>\r
<name>CCDiagRemark</name>\r
<option>\r
<name>CCAllowList</name>\r
<version>1</version>\r
- <state>00000000</state>\r
+ <state>11111110</state>\r
</option>\r
<option>\r
<name>CCDebugInfo</name>\r
<state>$PROJ_DIR$/AtmelFiles/libboard_sama5d4x-ek</state>\r
<state>$PROJ_DIR$/AtmelFiles/libchip_sama5d4x</state>\r
<state>$PROJ_DIR$/AtmelFiles/libchip_sama5d4x/include</state>\r
+ <state>$PROJ_DIR$\AtmelFiles\usb\device</state>\r
+ <state>$PROJ_DIR$\AtmelFiles\usb\include</state>\r
<state>$PROJ_DIR$/.</state>\r
<state>$PROJ_DIR$\..\..\Source\include</state>\r
<state>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC</state>\r
<state>$PROJ_DIR$\..\Common\include</state>\r
<state>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-CLI</state>\r
+ <state>$PROJ_DIR$\Full_Demo</state>\r
</option>\r
<option>\r
<name>CCStdIncCheck</name>\r
</option>\r
<option>\r
<name>CCOptLevel</name>\r
- <state>0</state>\r
+ <state>3</state>\r
</option>\r
<option>\r
<name>CCOptStrategy</name>\r
</option>\r
<option>\r
<name>CCOptLevelSlave</name>\r
- <state>0</state>\r
+ <state>3</state>\r
</option>\r
<option>\r
<name>CompilerMisraRules98</name>\r
<name>ADefines</name>\r
<state>sama5d4x</state>\r
<state>sram</state>\r
- <state>__ASSEMBLY__</state>\r
</option>\r
<option>\r
<name>AList</name>\r
<option>\r
<name>Variant</name>\r
<version>20</version>\r
- <state>0</state>\r
+ <state>48</state>\r
</option>\r
<option>\r
<name>ExePath</name>\r
<option>\r
<name>FPU</name>\r
<version>2</version>\r
- <state>5</state>\r
+ <state>6</state>\r
</option>\r
<option>\r
<name>OGCoreOrChip</name>\r
- <state>1</state>\r
+ <state>0</state>\r
</option>\r
<option>\r
<name>GRuntimeLibSelect</name>\r
</option>\r
<option>\r
<name>OGLastSavedByProductVersion</name>\r
- <state>6.30.1.53141</state>\r
+ <state>7.20.2.7418</state>\r
</option>\r
<option>\r
<name>GeneralEnableMisra</name>\r
</option>\r
<option>\r
<name>OGChipSelectEditMenu</name>\r
- <state>sama5d4x Atmel sama5d4x</state>\r
+ <state>Default None</state>\r
</option>\r
<option>\r
<name>GenLowLevelInterface</name>\r
<option>\r
<name>GFPUCoreSlave</name>\r
<version>20</version>\r
- <state>47</state>\r
+ <state>48</state>\r
</option>\r
<option>\r
<name>GBECoreSlave</name>\r
<version>20</version>\r
- <state>47</state>\r
+ <state>48</state>\r
</option>\r
<option>\r
<name>OGUseCmsis</name>\r
</option>\r
<option>\r
<name>CCDiagSuppress</name>\r
- <state></state>\r
+ <state>Pa131, Pa039</state>\r
</option>\r
<option>\r
<name>CCDiagRemark</name>\r
<option>\r
<name>CCAllowList</name>\r
<version>1</version>\r
- <state>11111110</state>\r
+ <state>00000000</state>\r
</option>\r
<option>\r
<name>CCDebugInfo</name>\r
</option>\r
<option>\r
<name>CCIncludePath2</name>\r
- <state>$PROJ_DIR$/../../../../libraries</state>\r
- <state>$PROJ_DIR$/../../../../libraries/libboard_sama5d4x-ek</state>\r
- <state>$PROJ_DIR$/../../../../libraries/libchip_sama5d4x</state>\r
+ <state>$PROJ_DIR$/AtmelFiles/libboard_sama5d4x-ek</state>\r
+ <state>$PROJ_DIR$/AtmelFiles/libchip_sama5d4x</state>\r
+ <state>$PROJ_DIR$/AtmelFiles/libchip_sama5d4x/include</state>\r
+ <state>$PROJ_DIR$\AtmelFiles\usb\device</state>\r
+ <state>$PROJ_DIR$\AtmelFiles\usb\include</state>\r
+ <state>$PROJ_DIR$/.</state>\r
+ <state>$PROJ_DIR$\..\..\Source\include</state>\r
+ <state>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC</state>\r
+ <state>$PROJ_DIR$\..\Common\include</state>\r
+ <state>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-CLI</state>\r
+ <state>$PROJ_DIR$\Full_Demo</state>\r
</option>\r
<option>\r
<name>CCStdIncCheck</name>\r
</option>\r
<option>\r
<name>CCOptLevel</name>\r
- <state>3</state>\r
+ <state>0</state>\r
</option>\r
<option>\r
<name>CCOptStrategy</name>\r
</option>\r
<option>\r
<name>CCOptLevelSlave</name>\r
- <state>3</state>\r
+ <state>0</state>\r
</option>\r
<option>\r
<name>CompilerMisraRules98</name>\r
<name>ADefines</name>\r
<state>sama5d4x</state>\r
<state>ddram</state>\r
- <state>__ASSEMBLY__</state>\r
</option>\r
<option>\r
<name>AList</name>\r
<option>\r
<name>AUserIncludes</name>\r
<state>$PROJ_DIR$\..\..\..\libraries</state>\r
+ <state>$PROJ_DIR$/.</state>\r
</option>\r
<option>\r
<name>AExtraOptionsCheckV2</name>\r
</option>\r
<option>\r
<name>IlinkIcfFile</name>\r
- <state>$PROJ_DIR$/../../../../libraries/libboard_sama5d4x-ek/resources/ewarm/sama5d4x/ddram.icf</state>\r
+ <state>$PROJ_DIR$/AtmelFiles\libboard_sama5d4x-ek\resources\ewarm\sama5d4x\ddram.icf</state>\r
</option>\r
<option>\r
<name>IlinkIcfFileSlave</name>\r
<name>$PROJ_DIR$\AtmelFiles\libboard_sama5d4x-ek\source\board_cstartup_iar.s</name>\r
<excluded>\r
<configuration>sram</configuration>\r
+ <configuration>ddram</configuration>\r
</excluded>\r
</file>\r
<file>\r
<file>\r
<name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\aic.c</name>\r
</file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\cp15\cp15.c</name>\r
+ </file>\r
<file>\r
<name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\cp15\cp15_asm_iar.s</name>\r
</file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\mmu.c</name>\r
+ </file>\r
<file>\r
<name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\pio.c</name>\r
</file>\r
<file>\r
<name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\tc.c</name>\r
</file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\USBD_HAL.c</name>\r
+ </file>\r
<file>\r
<name>$PROJ_DIR$\AtmelFiles\libchip_sama5d4x\source\wdt.c</name>\r
</file>\r
</group>\r
+ <group>\r
+ <name>USB</name>\r
+ <group>\r
+ <name>common</name>\r
+ <group>\r
+ <name>cdc</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\common\cdc\CDCLineCoding.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\common\cdc\CDCSetControlLineStateRequest.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>core</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\common\core\USBDescriptors.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\common\core\USBRequests.c</name>\r
+ </file>\r
+ </group>\r
+ </group>\r
+ <group>\r
+ <name>device</name>\r
+ <group>\r
+ <name>cdc-serial</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\cdc-serial\CDCDSerial.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\cdc-serial\CDCDSerial_Callbacks.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\cdc-serial\CDCDSerialDriver.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\cdc-serial\CDCDSerialPort.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>core</name>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\core\USBD.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\core\USBDCallbacks.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\core\USBDDriver.c</name>\r
+ </file>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\device\core\USBDDriverCallbacks.c</name>\r
+ </file>\r
+ </group>\r
+ </group>\r
+ <file>\r
+ <name>$PROJ_DIR$\AtmelFiles\usb\USBDDriverDescriptors.c</name>\r
+ </file>\r
+ </group>\r
</group>\r
<group>\r
<name>Blinky Demo</name>\r
</file>\r
<file>\r
<name>$PROJ_DIR$\..\Common\Minimal\IntQueue.c</name>\r
- <excluded>\r
- <configuration>sram</configuration>\r
- </excluded>\r
</file>\r
<file>\r
<name>$PROJ_DIR$\..\Common\Minimal\QueueOverwrite.c</name>\r
</group>\r
<file>\r
<name>$PROJ_DIR$\CDCCommandConsole.c</name>\r
- <excluded>\r
- <configuration>sram</configuration>\r
- </excluded>\r
</file>\r
<file>\r
<name>$PROJ_DIR$\Full_Demo\IntQueueTimer.c</name>\r
- <excluded>\r
- <configuration>sram</configuration>\r
- </excluded>\r
</file>\r
<file>\r
<name>$PROJ_DIR$\Full_Demo\main_full.c</name>\r
<name>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Demo\Common\FreeRTOS_Plus_CLI_Demos\Sample-CLI-commands.c</name>\r
</file>\r
</group>\r
- <file>\r
- <name>$PROJ_DIR$\atmel_main.c</name>\r
- </file>\r
<file>\r
<name>$PROJ_DIR$\cstartup_with_FreeRTOS_vectors.s</name>\r
</file>\r
// Headers\r
//------------------------------------------------------------------------------\r
\r
-#define __ASSEMBLY__\r
\r
//------------------------------------------------------------------------------\r
// Definitions\r
SECTION .vectors:CODE:NOROOT(2)\r
\r
PUBLIC resetVector\r
- PUBLIC IRQ_Handler\r
EXTERN FreeRTOS_IRQ_Handler\r
EXTERN Undefined_C_Handler\r
EXTERN FreeRTOS_SWI_Handler\r
SWI_Addr: DCD FreeRTOS_SWI_Handler\r
Abort_Addr: DCD Abort_C_Handler\r
Prefetch_Addr: DCD Prefetch_C_Handler\r
-;IRQ_Addr: DCD IRQ_Handler\r
FIQ_Addr: DCD FIQ_Handler\r
-/*\r
- Handles incoming interrupt requests by branching to the corresponding\r
- handler, as defined in the AIC. Supports interrupt nesting.\r
- */\r
-IRQ_Handler:\r
- /* Save interrupt context on the stack to allow nesting */\r
- SUB lr, lr, #4\r
- STMFD sp!, {lr}\r
- MRS lr, SPSR\r
- STMFD sp!, {r0, lr}\r
-\r
- /* Write in the IVR to support Protect Mode */\r
- LDR lr, =AIC\r
- LDR r0, [r14, #AIC_IVR]\r
- STR lr, [r14, #AIC_IVR]\r
-\r
- /* Branch to interrupt handler in Supervisor mode */\r
- MSR CPSR_c, #ARM_MODE_SVC\r
- STMFD sp!, {r1-r3, r4, r12, lr}\r
-\r
- /* Check for 8-byte alignment and save lr plus a */\r
- /* word to indicate the stack adjustment used (0 or 4) */\r
- AND r1, sp, #4\r
- SUB sp, sp, r1\r
- STMFD sp!, {r1, lr}\r
-\r
- BLX r0\r
-\r
- LDMIA sp!, {r1, lr}\r
- ADD sp, sp, r1\r
-\r
- LDMIA sp!, {r1-r3, r4, r12, lr}\r
- MSR CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT\r
-\r
- /* Acknowledge interrupt */\r
- LDR lr, =AIC\r
- STR lr, [r14, #AIC_EOICR]\r
-\r
- /* Restore interrupt context and branch back to calling code */\r
- LDMIA sp!, {r0, lr}\r
- MSR SPSR_cxsf, lr\r
- LDMIA sp!, {pc}^\r
\r
\r
/*\r
void vApplicationTickHook( void );\r
\r
/* Prototype for the IRQ handler called by the generic Cortex-A5 RTOS port\r
-layer. The address of the ISR is passed into this function as a parameter.\r
-Note this level of indirection could be removed by creating a SAMA5 specific\r
-port layer that calls the IRQ directly from the port layer rather than via this\r
-application callback. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress );\r
+layer. */\r
+void vApplicationIRQHandler( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
int main( void )\r
{\r
-//extern int atmel_main( void );\r
-//atmel_main();\r
-\r
/* Configure the hardware ready to run the demo. */\r
prvSetupHardware();\r
\r
/* Disable watchdog */\r
WDT_Disable( WDT );\r
\r
- /* Set protect mode in the AIC for easier debugging. */\r
-// AIC->AIC_DCR |= AIC_DCR_PROT;\r
+ /* Set protect mode in the AIC for easier debugging. THIS IS COMMENTED OUT\r
+ AS IT RESULTS IN SPURIOUS INTERRUPTS.\r
+ AIC->AIC_DCR |= AIC_DCR_PROT; */\r
\r
/* Configure ports used by LEDs. */\r
vParTestInitialise();\r
\r
-//_RB_ CP15_EnableIcache();\r
+ #if defined (ddram)\r
+ {\r
+ MMU_Initialize( ( uint32_t * ) 0x20C000 );\r
+ CP15_EnableMMU();\r
+ CP15_EnableDcache();\r
+ CP15_EnableIcache();\r
+ }\r
+ #endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
internally by FreeRTOS API functions that create tasks, queues, software\r
timers, and semaphores. The size of the FreeRTOS heap is set by the\r
configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */\r
- taskDISABLE_INTERRUPTS();\r
- for( ;; );\r
+\r
+ /* Force an assert. */\r
+ configASSERT( ( volatile void * ) NULL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Run time stack overflow checking is performed if\r
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
function is called if a stack overflow is detected. */\r
- taskDISABLE_INTERRUPTS();\r
- for( ;; );\r
+\r
+ /* Force an assert. */\r
+ configASSERT( ( volatile void * ) NULL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* The function called by the RTOS port layer after it has managed interrupt\r
entry. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress )\r
+void vApplicationIRQHandler( void )\r
{\r
typedef void (*ISRFunction_t)( void );\r
ISRFunction_t pxISRFunction;\r
volatile uint32_t * pulAIC_IVR = ( uint32_t * ) configINTERRUPT_VECTOR_ADDRESS;\r
\r
- /* On the SAMA5 the parameter is a pointer to the ISR handling function. */\r
- pxISRFunction = ( ISRFunction_t ) ulInterruptVectorAddress;\r
+ /* Obtain the address of the interrupt handler from the AIR. */\r
+ pxISRFunction = ( ISRFunction_t ) *pulAIC_IVR;\r
\r
/* Write back to the SAMA5's interrupt controller's IVR register in case the\r
CPU is in protect mode. If the interrupt controller is not in protect mode\r
then this write is not necessary. */\r
- *pulAIC_IVR = 0;\r
+ *pulAIC_IVR = ( uint32_t ) pxISRFunction;\r
\r
/* Ensure the write takes before re-enabling interrupts. */\r
__DSB();\r
pxISRFunction();\r
}\r
\r
-\r
\r
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1622</ColumnWidth1></Debug-Log>\r
<Build>\r
- <ColumnWidth0>20</ColumnWidth0>\r
- <ColumnWidth1>1216</ColumnWidth1>\r
- <ColumnWidth2>324</ColumnWidth2>\r
- <ColumnWidth3>81</ColumnWidth3>\r
- </Build>\r
+ \r
+ \r
+ \r
+ \r
+ <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1216</ColumnWidth1><ColumnWidth2>324</ColumnWidth2><ColumnWidth3>81</ColumnWidth3></Build>\r
<Workspace>\r
<ColumnWidths>\r
\r
\r
\r
<PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ShowCodeCoverage>1</ShowCodeCoverage><ShowInstrProfiling>1</ShowInstrProfiling></Disassembly>\r
- <Breakpoints><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><col-names><item>Breakpoint</item><item>_I0</item></col-names><col-widths><item>500</item><item>35</item></col-widths></Breakpoints><STACK_1><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><stack>CSTACK</stack><width>4</width><vars>1</vars><offset>0</offset><col-names><item>Data</item><item>Frame</item><item>Location</item><item>Type</item><item>Value</item><item>Variable</item></col-names><col-widths><item>100</item><item>100</item><item>100</item><item>100</item><item>100</item><item>100</item></col-widths></STACK_1><CallStack><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><col-names><item>Frame</item><item>_I0</item></col-names><col-widths><item>400</item><item>20</item></col-widths></CallStack><WATCH_1><expressions><item>ulx</item><item></item></expressions><col-names><item>Expression</item><item>Location</item><item>Type</item><item>Value</item></col-names><col-widths><item>100</item><item>150</item><item>100</item><item>100</item></col-widths></WATCH_1><Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register></Static>\r
+ <Breakpoints><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><col-names><item>Breakpoint</item><item>_I0</item></col-names><col-widths><item>500</item><item>35</item></col-widths></Breakpoints><STACK_1><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><stack>CSTACK</stack><width>4</width><vars>1</vars><offset>0</offset><col-names><item>Data</item><item>Frame</item><item>Location</item><item>Type</item><item>Value</item><item>Variable</item></col-names><col-widths><item>100</item><item>100</item><item>100</item><item>100</item><item>100</item><item>100</item></col-widths></STACK_1><CallStack><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><col-names><item>Frame</item><item>_I0</item></col-names><col-widths><item>400</item><item>20</item></col-widths></CallStack><WATCH_1><expressions><item>xTickCount</item><item/></expressions><col-names><item>Expression</item><item>Location</item><item>Type</item><item>Value</item></col-names><col-widths><item>100</item><item>150</item><item>100</item><item>100</item></col-widths><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></WATCH_1><Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><Locals><col-names><item>Location</item><item>Type</item><item>Value</item><item>Variable</item></col-names><col-widths><item>150</item><item>100</item><item>100</item><item>185</item></col-widths><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Locals></Static>\r
<Windows>\r
\r
\r
<Factory>Workspace</Factory>\r
<Session>\r
\r
- <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Atmel Files</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source/portable</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source/portable/MemMang</ExpandedNode><ExpandedNode>RTOSDemo/Output</ExpandedNode></NodeDict></Session>\r
+ <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source/portable</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS Source/portable/MemMang</ExpandedNode><ExpandedNode>RTOSDemo/Full Demo</ExpandedNode><ExpandedNode>RTOSDemo/Output</ExpandedNode></NodeDict></Session>\r
</Tab>\r
</Tabs>\r
\r
- <SelectedTab>0</SelectedTab></Wnd2><Wnd6><Tabs><Tab><Identity>TabID-19127-2470</Identity><TabName>Watch 1</TabName><Factory>WATCH_1</Factory></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd6><Wnd7><Tabs><Tab><Identity>TabID-26530-4583</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd7></Windows>\r
+ <SelectedTab>0</SelectedTab></Wnd2><Wnd5><Tabs><Tab><Identity>TabID-4869-5115</Identity><TabName>Register</TabName><Factory>Register</Factory><Session><REG1>0</REG1><REG2>0</REG2><Group>0</Group><States>0</States></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>\r
<Editor>\r
\r
\r
\r
\r
- <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\
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\r
Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0\r
CStepIntDis=_ 0\r
[DebugChecksum]\r
-Checksum=-1721229099\r
+Checksum=591356453\r
[Exceptions]\r
StopOnUncaught=_ 0\r
StopOnThrow=_ 0\r
ShowArgs=0\r
[Disassembly]\r
MixedMode=1\r
+[watch_formats]\r
+Fmt0={W}1:ulAPSR 4 0\r
[Log file]\r
LoggingEnabled=_ 0\r
LogFile=_ ""\r
[Disassemble mode]\r
mode=0\r
[Breakpoints2]\r
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Count=2\r
[Aliases]\r
Count=0\r
<Workspace>\r
<ConfigDictionary>\r
\r
- <CurrentConfigs><Project>RTOSDemo/sram</Project></CurrentConfigs></ConfigDictionary>\r
+ <CurrentConfigs><Project>RTOSDemo/ddram</Project></CurrentConfigs></ConfigDictionary>\r
<Desktop>\r
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\r
* style project, a more comprehensive test and demo application, and an\r
* lwIP example. The mainSELECTED_APPLICATION setting in main.c is used to\r
* select between the three. See the notes on using mainSELECTED_APPLICATION\r
- * in main.c. This file implements the simply blinky style version.\r
+ * in main.c. This file implements the comprehensive version.\r
*\r
* NOTE 2: This file only contains the source code that is specific to the\r
* full demo. Generic functions, such FreeRTOS hook functions, and functions\r
/*lint -e537 This headers are only multiply included if the application code\r
happens to also be including task.h. */\r
#include "task.h"\r
-/*lint +e956 */\r
+/*lint +e537 */\r
\r
#ifdef __cplusplus\r
extern "C" {\r
1 tab == 4 spaces!\r
*/\r
\r
-/* Standard includes. */\r
-#include <stdlib.h>\r
-\r
/* IAR includes. */\r
#include <intrinsics.h>\r
\r
#endif\r
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
\r
+#ifndef configSETUP_TICK_INTERRUPT\r
+ #error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt. A default that uses the PIT is provided in the official demo application.\r
+#endif\r
+\r
+#ifndef configCLEAR_TICK_INTERRUPT\r
+ #error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt. A default that uses the PIT is provided in the official demo application.\r
+#endif\r
+\r
/* A critical section is exited when the critical section nesting count reaches\r
this value. */\r
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
{\r
/* Start the timer that generates the tick ISR. */\r
configSETUP_TICK_INTERRUPT();\r
- __enable_irq();\r
vPortRestoreTaskContext();\r
}\r
\r
AND r2, r2, #4\r
SUB sp, sp, r2\r
\r
- ; Obtain the address of the interrupt handler, then pass it into the ISR\r
- ; callback.\r
PUSH {r0-r3, lr}\r
- LDR r1, =configINTERRUPT_VECTOR_ADDRESS\r
- LDR r0, [r1]\r
- LDR r1, =vApplicationIRQHandler\r
- BLX r1\r
+\r
+ ; Call the port part specific handler.\r
+ LDR r0, =vApplicationIRQHandler\r
+ BLX r0\r
POP {r0-r3, lr}\r
ADD sp, sp, r2\r
\r
CPSID i\r
\r
- ; Write to the EOI register\r
+ ; Write to the EOI register.\r
LDR r4, =configEOI_ADDRESS\r
STR r0, [r4]\r
\r
; Restore the old nesting count\r
STR r1, [r3]\r
\r
- ; A context switch is never performed if the nesting count is not 0\r
+ ; A context switch is never performed if the nesting count is not 0.\r
CMP r1, #0\r
BNE exit_without_switch\r
\r
; Restore the context of, and branch to, the task selected to execute next.\r
portRESTORE_CONTEXT\r
\r
-\r
END\r
\r
\r
/* Just to prevent compiler warnings. */\r
( void ) lpParameter;\r
\r
- for(;;)\r
+ for( ;; )\r
{\r
/* Wait until the timer expires and we can access the simulated interrupt\r
variables. *NOTE* this is not a 'real time' way of generating tick\r
privileged Vs unprivileged linkage and placement. */\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */\r
\r
+/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting\r
+functions but without including stdio.h here. */\r
#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )\r
/* At the bottom of this file are two optional functions that can be used\r
to generate human readable text from the raw data generated by the\r
#endif /* portCRITICAL_NESTING_IN_TCB */\r
/*-----------------------------------------------------------*/\r
\r
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) )\r
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
\r
void vTaskList( char * pcWriteBuffer )\r
{\r
}\r
}\r
\r
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) ) */\r
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */\r
/*----------------------------------------------------------*/\r
\r
-#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) )\r
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
\r
void vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
}\r
}\r
\r
-#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) ) */\r
+#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */\r
/*-----------------------------------------------------------*/\r
\r
TickType_t uxTaskResetEventItemValue( void )\r
projects / freertos / commitdiff
