ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is on

The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 2606e53eb91428323246a149551ef9bb999a38e4..9ee125fb702592f0deed8793e8164a1249e7c3e1 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -25,7 +25,11 @@
 /* #define CONFIG_SYS_ICACHE_OFF */
 /* #define CONFIG_SYS_DCACHE_OFF */
 
+#ifdef CONFIG_CACHE_UNIPHIER
+#define CONFIG_SYS_CACHELINE_SIZE      128
+#else
 #define CONFIG_SYS_CACHELINE_SIZE      32
+#endif
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO