]> git.sur5r.net Git - u-boot/commitdiff
ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is on
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 10 Aug 2016 07:08:46 +0000 (16:08 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Thu, 11 Aug 2016 08:49:44 +0000 (17:49 +0900)
The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
include/configs/uniphier.h

index 2606e53eb91428323246a149551ef9bb999a38e4..9ee125fb702592f0deed8793e8164a1249e7c3e1 100644 (file)
 /* #define CONFIG_SYS_ICACHE_OFF */
 /* #define CONFIG_SYS_DCACHE_OFF */
 
+#ifdef CONFIG_CACHE_UNIPHIER
+#define CONFIG_SYS_CACHELINE_SIZE      128
+#else
 #define CONFIG_SYS_CACHELINE_SIZE      32
+#endif
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO