CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).
Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.
After the implemention, moveconfig was run. The issues are:
-
edb9315a - CONFIG_PHYLIB is not enabled. Entry is
deleted.
- ds414 - CONFIG_PHYLIB is in incompatible format:
{ 0x1, 0x0 }. This entry is also deleted.
- devkit3250 - The PHY_ADDR is in hex format (0x1F).
Manually CONFIG_PHY_ADDR=31 is added in
the defconfig.
After the changes the suspicious defconfigs passes building.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
be at least 4MB.
- MII/PHY support:
- CONFIG_PHY_ADDR
-
- The address of PHY on MII bus.
-
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
CONFIG_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_LPC32XX_SSP=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
if PHYLIB
+config PHY_ADDR
+ int "PHY address"
+ default 1 if ARCH_SUNXI
+ default 0
+ help
+ The address of PHY on MII bus. Usually in range of 0 to 31.
+
config B53_SWITCH
bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
help
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
/* I2C configuration */
#endif
/* Network. */
-#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#define CONFIG_MII
#define CONFIG_PHY_ATHEROS
#define CONFIG_RMII
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
-#define CONFIG_PHY_ADDR 0x1F
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
-#define CONFIG_PHY_ADDR { 0x1, 0x0 }
#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_DRIVER_EP93XX_MAC
#define CONFIG_MII_SUPPRESS_PREAMBLE
#define CONFIG_MII
-#define CONFIG_PHY_ADDR 1
#undef CONFIG_NETCONSOLE
/* SDRAM configuration */
#define CONFIG_MISC_INIT_R
-#define CONFIG_PHY_ADDR 8
-
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
#include <configs/meson-gxbb-common.h>
#define CONFIG_MISC_INIT_R
-#define CONFIG_PHY_ADDR 8
-
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
#include <configs/meson-gxbb-common.h>
#define CONFIG_MISC_INIT_R
-#define CONFIG_PHY_ADDR 8
-
/* Serial setup */
#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_NS16550_COM1 0x44e09000
/* Ethernet support */
-#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_RESET_DELAY 1000
/* SPL */
/* Ethernet support */
#ifdef CONFIG_SUN4I_EMAC
-#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#endif
#ifdef CONFIG_SUN7I_GMAC
-#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_REALTEK
#endif
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
-#define CONFIG_PHY_ADDR 0
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
/* Ethernet config options */
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
-#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_SPEAR_GPIO
CONFIG_PERIF3_FREQ
CONFIG_PERIF4_FREQ
CONFIG_PHYSMEM
-CONFIG_PHY_ADDR
CONFIG_PHY_BASE_ADR
CONFIG_PHY_BCM5421S
CONFIG_PHY_ET1011C_TX_CLK_FIX