]> git.sur5r.net Git - u-boot/commitdiff
Move CONFIG_PHY_ADDR to Kconfig
authorStefan Mavrodiev <stefan@olimex.com>
Fri, 2 Feb 2018 13:53:38 +0000 (15:53 +0200)
committerJagan Teki <jagan@amarulasolutions.com>
Tue, 13 Mar 2018 17:06:33 +0000 (22:36 +0530)
CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
edb9315a - CONFIG_PHYLIB is not enabled. Entry is
  deleted.

- ds414 - CONFIG_PHYLIB is in incompatible format:
  { 0x1, 0x0 }. This entry is also deleted.

- devkit3250 - The PHY_ADDR is in hex format (0x1F).
  Manually CONFIG_PHY_ADDR=31 is added in
  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
19 files changed:
README
configs/devkit3250_defconfig
configs/khadas-vim_defconfig
configs/libretech-cc_defconfig
configs/p212_defconfig
drivers/net/phy/Kconfig
include/configs/am335x_shc.h
include/configs/baltos.h
include/configs/devkit3250.h
include/configs/ds414.h
include/configs/edb93xx.h
include/configs/khadas-vim.h
include/configs/libretech-cc.h
include/configs/p212.h
include/configs/pepper.h
include/configs/sunxi-common.h
include/configs/work_92105.h
include/configs/x600.h
scripts/config_whitelist.txt

diff --git a/README b/README
index 5cf90a482a8f2056e1fc69b75aa825bffe5ae19f..5fd6428c5cdc462d0f8d5b9c7c370b4e337a746a 100644 (file)
--- a/README
+++ b/README
@@ -1420,10 +1420,6 @@ The following options need to be configured:
                be at least 4MB.
 
 - MII/PHY support:
-               CONFIG_PHY_ADDR
-
-               The address of PHY on MII bus.
-
                CONFIG_PHY_CLOCK_FREQ (ppc4xx)
 
                The clock frequency of the MII bus
index fcc80b2027bf823a920c8a267d5b2b5ba7d6c8b6..e1a9b4982a9edc993f36633102fcaf8fafb1f14d 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_LPC32XX_SSP=y
index a0b3f8d1612d02729e63a86851d065f716e65cbc..f4674efb6891ddd094116e07d2d383aa7cd6c1f5 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
 CONFIG_PHY_MESON_GXL=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
index a7177b924846d4b229ec720fa9583624d608e570..18ddb45d956f578af2ceaafb2b9d1b6faee46f50 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
 CONFIG_PHY_MESON_GXL=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
index d276e061542d6c20d35dfa69f91e398157b79675..b6923f3a673239f45e1bea579d6dbeefb036bef5 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_ADDR=8
 CONFIG_PHY_MESON_GXL=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
index 7fd4a8d2616748de39a84a22afdfd1421afdf78c..25de3fb2266586bd2b234f81dda702fd68e95a2d 100644 (file)
@@ -13,6 +13,13 @@ menuconfig PHYLIB
 
 if PHYLIB
 
+config PHY_ADDR
+       int "PHY address"
+       default 1 if ARCH_SUNXI
+       default 0
+       help
+         The address of PHY on MII bus. Usually in range of 0 to 31.
+
 config B53_SWITCH
        bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
        help
index 55e803bc9f28dd1a779c60f90fd7a286a372c026..efa4c997ee700461df2d9711cb8f53699fcf9b40 100644 (file)
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
 /* I2C configuration */
index 5766a36f91083c1abcc932c27e2d00360309f0f3..943a6f819dcb06809fcd4411d57d8182fdc543da 100644 (file)
 #endif
 
 /* Network. */
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 #define CONFIG_MII
 #define CONFIG_PHY_ATHEROS
index 40dee673871cbe2924f3e53e30c1aa1ad08b11b5..23841e0cadb4d993e34e5199126f861e9d668847 100644 (file)
@@ -71,7 +71,6 @@
 #define CONFIG_RMII
 #define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHY_ADDR                        0x1F
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 
 /*
index 69217143f982f8686fd278b759d46a89ead7f8f0..ce520b23deac933dc5e222edfd5642c753e9f934 100644 (file)
@@ -40,7 +40,6 @@
 #define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64KiB sectors */
 
 #define CONFIG_PHY_MARVELL             /* there is a marvell phy */
-#define CONFIG_PHY_ADDR                        { 0x1, 0x0 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
 
 #define CONFIG_SYS_ALT_MEMTEST
index 18ec6cb7583399499209050c978b666c749e8da6..0d4ec5c10126e2b24b1d32a70634d1b4498026b9 100644 (file)
@@ -95,7 +95,6 @@
 #define CONFIG_DRIVER_EP93XX_MAC
 #define CONFIG_MII_SUPPRESS_PREAMBLE
 #define CONFIG_MII
-#define CONFIG_PHY_ADDR                1
 #undef CONFIG_NETCONSOLE
 
 /* SDRAM configuration */
index 9d99bc5dc7cfafa0227246e92d1db6a7e6e44ef7..f44b388b323631f0297b959f4bc5092c8ba0b350 100644 (file)
@@ -12,8 +12,6 @@
 
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_PHY_ADDR                8
-
 #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
 
 #include <configs/meson-gxbb-common.h>
index ffaca2648b879f300dfe2ae45aee0be4814aaa0f..08dfb30de07221acf39ce448b42cc7d1682789b0 100644 (file)
@@ -12,8 +12,6 @@
 
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_PHY_ADDR                8
-
 #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
 
 #include <configs/meson-gxbb-common.h>
index 793b556800375c65858f2601d5a18e3be70be51d..04773843e40a7af2aa256874c5b28489a9970cde 100644 (file)
@@ -12,8 +12,6 @@
 
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_PHY_ADDR                8
-
 /* Serial setup */
 #define CONFIG_CONS_INDEX              0
 
index 7ef25294c115ccc247e28206f0fc7bb1bc736e32..960afa0b3ad6eb60a20024eddf11c1922da83fb4 100644 (file)
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_NS16550_COM1                0x44e09000
 
 /* Ethernet support */
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_RESET_DELAY 1000
 
 /* SPL */
index e4e7c2277843df21c95514b95da2506caff94869..9d9e9ce1734c995ab465d98cb5f9ff45bd85aba8 100644 (file)
@@ -288,12 +288,10 @@ extern int soft_i2c_gpio_scl;
 
 /* Ethernet support */
 #ifdef CONFIG_SUN4I_EMAC
-#define CONFIG_PHY_ADDR                1
 #define CONFIG_MII                     /* MII PHY management           */
 #endif
 
 #ifdef CONFIG_SUN7I_GMAC
-#define CONFIG_PHY_ADDR                1
 #define CONFIG_MII                     /* MII PHY management           */
 #define CONFIG_PHY_REALTEK
 #endif
index cabd8156fa14ad65be90f2cedec9edbc4a720631..1374370187b4cc4bdce002a5834a22a45cb0bbde 100644 (file)
@@ -56,7 +56,6 @@
 
 #define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHY_ADDR 0
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
 
index bfa6f5e3fb85f42ee415f6a7bdbb4dc5103d3885..d80db6a9142fd5ab93c12603d51385897e289241 100644 (file)
@@ -70,7 +70,6 @@
 /* Ethernet config options */
 #define CONFIG_MII
 #define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
-#define CONFIG_PHY_ADDR                0       /* PHY address */
 
 #define CONFIG_SPEAR_GPIO
 
index 3606585c05c3c6845b6b3ace4771a7d9ea690fcb..b0958d7a802eee9186abb6aec18253fb2472b819 100644 (file)
@@ -1541,7 +1541,6 @@ CONFIG_PERIF2_FREQ
 CONFIG_PERIF3_FREQ
 CONFIG_PERIF4_FREQ
 CONFIG_PHYSMEM
-CONFIG_PHY_ADDR
 CONFIG_PHY_BASE_ADR
 CONFIG_PHY_BCM5421S
 CONFIG_PHY_ET1011C_TX_CLK_FIX