arm: socfpga: Enable build for Arria 10

Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index f6e5773272d64ae81f3274414f0ca136191f3cc7..2563e7926d1d80a2fc4770e7cf10f2aa60c978db 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -37,6 +37,9 @@ config TARGET_SOCFPGA_ARRIA5
        bool
        select TARGET_SOCFPGA_GEN5
 
+config TARGET_SOCFPGA_ARRIA10
+       bool
+
 config TARGET_SOCFPGA_CYCLONE5
        bool
        select TARGET_SOCFPGA_GEN5
@@ -49,6 +52,10 @@ choice
        prompt "Altera SOCFPGA board select"
        optional
 
+config TARGET_SOCFPGA_ARRIA10_SOCDK
+       bool "Altera SOCFPGA SoCDK (Arria 10)"
+       select TARGET_SOCFPGA_ARRIA10
+
 config TARGET_SOCFPGA_ARRIA5_SOCDK
        bool "Altera SOCFPGA SoCDK (Arria V)"
        select TARGET_SOCFPGA_ARRIA5
@@ -98,6 +105,7 @@ endchoice
 
 config SYS_BOARD
        default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
        default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
@@ -111,6 +119,7 @@ config SYS_BOARD
 
 config SYS_VENDOR
        default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
        default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
@@ -125,6 +134,7 @@ config SYS_SOC
 
 config SYS_CONFIG_NAME
        default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
        default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 4ce8eaca6c2d832c4c078c0eb07f259e36d1c290..41b779c5ca9ba44d74f0ae0c015d426dc490e8ef 100644 (file)
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -2,28 +2,48 @@
 # (C) Copyright 2000-2003
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
-# Copyright (C) 2012 Altera Corporation <www.altera.com>
+# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
 #
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y  += misc.o timer.o reset_manager.o clock_manager.o \
-          fpga_manager.o board.o
+obj-y  += board.o
+obj-y  += clock_manager.o
+obj-y  += fpga_manager.o
+obj-y  += misc.o
+obj-y  += reset_manager.o
+obj-y  += timer.o
 
-obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clock_manager_arria10.o \
-                                       pinmux_arria10.o        \
-                                       misc_arria10.o          \
-                                       reset_manager_arria10.o
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
+obj-y  += clock_manager_gen5.o
+obj-y  += misc_gen5.o
+obj-y  += reset_manager_gen5.o
+obj-y  += scan_manager.o
+obj-y  += system_manager_gen5.o
+obj-y  += wrap_pll_config.o
+endif
 
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+obj-y  += clock_manager_arria10.o
+obj-y  += misc_arria10.o
+obj-y  += pinmux_arria10.o
+obj-y  += reset_manager_arria10.o
+endif
 
+ifdef CONFIG_SPL_BUILD
+obj-y  += spl.o
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
+obj-y  += freeze_controller.o
+obj-y  += wrap_iocsr_config.o
+obj-y  += wrap_pinmux_config.o
+obj-y  += wrap_sdram_config.o
+endif
+endif
+
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
 # QTS-generated config file wrappers
-obj-$(CONFIG_TARGET_SOCFPGA_GEN5)      += scan_manager.o wrap_pll_config.o \
-                                          clock_manager_gen5.o reset_manager_gen5.o \
-                                          misc_gen5.o system_manager_gen5.o
-obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o    \
-                          wrap_sdram_config.o
 CFLAGS_wrap_iocsr_config.o     += -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_pinmux_config.o    += -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_pll_config.o       += -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_sdram_config.o     += -I$(srctree)/board/$(BOARDDIR)
+endif