git.sur5r.net Git - u-boot/blob - arch/arm/mach-socfpga/Makefile

   1 #
   2 # (C) Copyright 2000-2003
   3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 #
   5 # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
   6 #
   7 # SPDX-License-Identifier:      GPL-2.0+
   8 #
   9
  10 obj-y   += board.o
  11 obj-y   += clock_manager.o
  12 obj-y   += fpga_manager.o
  13 obj-y   += misc.o
  14 obj-y   += reset_manager.o
  15 obj-y   += timer.o
  16
  17 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  18 obj-y   += clock_manager_gen5.o
  19 obj-y   += misc_gen5.o
  20 obj-y   += reset_manager_gen5.o
  21 obj-y   += scan_manager.o
  22 obj-y   += system_manager_gen5.o
  23 obj-y   += wrap_pll_config.o
  24 endif
  25
  26 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
  27 obj-y   += clock_manager_arria10.o
  28 obj-y   += misc_arria10.o
  29 obj-y   += pinmux_arria10.o
  30 obj-y   += reset_manager_arria10.o
  31 endif
  32
  33 ifdef CONFIG_SPL_BUILD
  34 obj-y   += spl.o
  35 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  36 obj-y   += freeze_controller.o
  37 obj-y   += wrap_iocsr_config.o
  38 obj-y   += wrap_pinmux_config.o
  39 obj-y   += wrap_sdram_config.o
  40 endif
  41 endif
  42
  43 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  44 # QTS-generated config file wrappers
  45 CFLAGS_wrap_iocsr_config.o      += -I$(srctree)/board/$(BOARDDIR)
  46 CFLAGS_wrap_pinmux_config.o     += -I$(srctree)/board/$(BOARDDIR)
  47 CFLAGS_wrap_pll_config.o        += -I$(srctree)/board/$(BOARDDIR)
  48 CFLAGS_wrap_sdram_config.o      += -I$(srctree)/board/$(BOARDDIR)
  49 endif