Alamy Liu [Wed, 12 Aug 2015 00:03:57 +0000 (17:03 -0700)]
adi_v5: Fix wrong ap value
Problem
dap->ap_current is register value, not field value.
it restores invalid ap when it calls dap_ap_select(dap, ap_old) later.
* assume the current ap is 1, dap->ap_current value would be (1 << 24).
ap_old = dap->ap_current; <-- ap_old = 1<<24 = 0x1000000.
...
dap_ap_select(dap, ap_old); <-- select 0x1000000, not 1.
* All AP registers accessing fail afterwards.
One of the reproducible case(s): CORE residents in AP >= 1
dap_lookup_cs_component() being used to find PE(*).
In most cases, PE would be found in AP==0, hence the problem is hidden.
When AP number is 1, dap->ap_current would have the value of 1<<24.
Anyone get the AP value with dap->ap_current and resotre it later would
select the wrong AP and all accessing later would fail.
The ARM Versatile and/or FPGA would have better chance to provide this
kind of environment that PE residents in AP>=1. As they have an 'umbrella'
system at AP0, and main system at AP>=1.
* PE: Processing Element. AKA Core. See ARM Glossary at
http://infocenter.arm.com/help/topic/com.arm.doc.aeg0014g/ABCDEFGH.html
Fix
Use dap_ap_get_select() to get ap value.
a. Retrieve current ap value by calling dap_ap_get_select();
src/flash/nor/kinetis.c
src/target/arm_adi_v5.c
b. The code is correct (dap->ap_current >> 24), but it's better to use
dap_ap_get_select() so everything could be synchronized.
src/flash/nor/sim3x.c
Change-Id: I97b5a13a3fc5506cf287e299c6c35699374de74f Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2935 Reviewed-by: Andreas Färber <afaerber@suse.de> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Marc Schink [Mon, 20 Oct 2014 17:18:38 +0000 (13:18 -0400)]
Improve J-Link driver and introduce libjaylink.
This patch uses libjaylink which is a library to access J-Link
devices. As other tools which are not in the scope of OpenOCD also
need to access J-Link devices a library is used. A firmware upgrade
tool and an advanced configuration tool for J-Link devices are under
development.
Further versions of libjaylink will support additional features
OpenOCD could benefit from. This includes TCP/IP as additional
possibility to connect to J-Link devices as well as power tracing and
device internal communication. The latter is used to access
peripherals on some development boards (e.g EFM32 STK and DVK).
Integration of libjaylink is realized with a git submodule like
jimtcl. As libjaylink depends on libusb-1.0 only, no additional
dependency is introduced for OpenOCD.
All low-level JTAG and SWD implementations of the current driver are
left untouched and therefore no incompabilities are to be expected.
Improvements of this patch:
* Support for more USB Product IDs, including those with the new
scheme (0x10xx). The corresponding udev rules are also updated.
* Device selection with serial number and USB address.
* Adaptive clocking is now correctly implemented and only usable for
devices with the corresponding capability.
* The target power supply can now be switched without the need for
changing configuration and power cycling the device.
* Device configuration is more restrictive and only allowed if the
required capabilities are available.
* Device configuration now shows the changes between the current
configuration of the device and the values that will be applied.
* Device configuration is verified after it is written to the device
exactly as the vendor software does.
* Connection registration is now handled properly and checks if the
maximum number of connections on a device is reached. This is also
necessary for devices which are attached via USB to OpenOCD as
some device models also support connections on TCP/IP.
* Serial Wire Output (SWO) can now be captured. This feature is not
documented by SEGGER however it is completely supported by
libjaylink.
This patch and libjaylink were tested on Ubuntu 14.04 (i386),
Debian 7 (amd64), FreeBSD 10.0 (amd64) and Windows XP SP3 (32-bit)
with the following device and target configurations:
* JTAG: J-Link v8.0, v9.0 and v9.3 with AT91SAM7S256
* SWD: SiLabs EFM32 STK 3700 (EFM32GG990F1024)
* SWD: J-Link v8.0, v9.0 and v9.3 with EFM32GG990F1024
* SWD: XMC 2Go (XMC1100)
* SWD: XMC1100 Boot Kit (XMC1100)
* SWD: IAR Systems / Olimex Eval Board (LPC1343F)
* SWD: Nordic Semiconductor nRF51 Dongle (nRF51422)
* SWD: SiLabs EZR32 WSTK 6220A (EZR32WG330FG60G)
Except for Windows XP all builds are tested with Clang in addition to
GCC. This patch and libjaylink are not tested on OSX yet.
Change-Id: I8476c57d37c6091c4b892b183da682c548ca1786 Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2598 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Jakub Kubiak [Wed, 27 May 2015 19:52:41 +0000 (21:52 +0200)]
flash/nor/lpc2000: add alternative part ID for LPC1343
http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip
> Note that once you have recovered debug access to your MCU, then in most cases you should then modify your Debug Configuration to turn vector catch off again. If this is not done, then this can cause problems in some circumstances with some versions of the Code Red IDE. For example with NXP LPC13xx parts, connecting more than once to the MCU with vector catch enabled can lead to the part ID being incorrectly read - which can again cause debug connections to fail
This patch adds an alternative part ID for LPC1343. With this patch "program" command works fine for flashing.
Change-Id: I8632e898a4c33102455925d25715b4f4edfa1d97 Signed-off-by: Jakub Kubiak <jakub@kubiak.es>
Reviewed-on: http://openocd.zylin.com/2782 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Felipe Balbi [Thu, 9 Apr 2015 18:31:17 +0000 (13:31 -0500)]
jtag: commands: save a pointer to list tail
By saving a pointer to the tail of the list,
we don't need to traverse the entire command
queue before we're able to append an item to
it.
With this patch, I see a 10% improvement when
using the embedded XDS100v2 on AM437x IDK board
to load a 4MiB binary (linux zImage) to DDR
with load_image.
Paul Fertser [Fri, 20 Nov 2015 10:08:20 +0000 (13:08 +0300)]
svf: fix progress reporting switch behaviour
The svf_progress_enabled variable is global, hence its lifetime is not
limited and it retains the value from the previous run. Fix this by
explicit assignment.
Tomas Vanek [Wed, 7 Oct 2015 14:09:21 +0000 (16:09 +0200)]
Kinetis: suppress false alarms "MCU is secured"
Kinetis driver checks MDM STAT register to detect secured state of MCU.
An unsecured clean device typically triggered a huge fat alarm message.
Now when driver detects secured state it tries to halt MCU and then
re-reads status register.
Command "mdm mass_erase" used to deassert reset when finished
and MCU started looping in hard fault - WDOG reset cycle.
Now "reset halt" is issued. Clean flash is not run after mass_erase.
Change-Id: I23f393509fbd8751d44ffc744ff2d67f1074f74e Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3010 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Jonathan Larmour [Mon, 16 Nov 2015 12:18:19 +0000 (12:18 +0000)]
tcl/board: Remove pflash.0 bank from twr-k60n512.cfg
The pflash.0 bank should not be present as it overlaps with
the flash bank created by target/kx.cfg, triggering an error.
This is also in line with the existing twr-k60f120m.cfg.
Change-Id: I5f620e01319d967f12e029fb6865ccdd031713b3 Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3108 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Tue, 27 Oct 2015 11:49:17 +0000 (12:49 +0100)]
flash: at91samd: flash write code cleaning
SAMD driver suffered from following problems:
1) Flash was erased as an integral part of flash write.
It was not documented so with usual workflow it resulted
in erasing flash twice (and reducing flash lifespan)
and in almost double flashing time.
2) Sector erase was silently skipped if "is_erased" flag was set.
"is_erased" logic was not reliable, e.g. when a row write
was aborted after successful write of some pages, sector was
still considered as erased. "is_erased" flag could not
cope with flash writes from a user program.
3) Writing of a block with start address unaligned to a flash page
resulted in failed assert and OpenOCD abort.
4) Disabling cache in bit 18 of 16-bit halfword never worked.
MCU implements cache invalidate in hardware so there is no need
to take care about. This bug was reported by Tony DiCola.
New code does not erase flash in write operation.
Instead it traditionally relies on erasing flash beforehand.
"is_erased" logic and cache disabling is completely removed.
It simplifies write procedure a lot and flash write is now faster.
Andreas Loehre [Thu, 6 Aug 2015 17:41:10 +0000 (19:41 +0200)]
flash: at91samd: Add SAML21 variant B device support and fix SAMC20/SAMC21
This adds support for the Atmel SAML21 variant B parts.
There is minimal change between the two variants, but in
variant B the automatic page write which the at91samd flash
driver relies on to be enabled is disabled by default.
With this patch the write row function will now issue a page write
command after each of the four pages in the row if the MANW (manual
write) bit is set. This also fixes flash write for the SAMC20/SAMC21
devices which have the MANW bit set by default as well.
I have also moved the device ID (DID) register bitfield extraction
from the find_part into helper macros. These can be used in the future
if there are more workarounds for specific devices.
Tested (programming) on:
ATSAML21-XPRO
ATSAML21-XPRO-B
SAMC21 Xplained Pro
SAMD21 Xplained Pro
SAMD20 Xplained Pro
Change-Id: I401a8aa1efd64730840c0d62cf49a1e880ea5900 Signed-off-by: Andreas Loehre <alohre@gmail.com>
Reviewed-on: http://openocd.zylin.com/2903 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Thu, 5 Nov 2015 20:05:43 +0000 (21:05 +0100)]
jtag: cmsis-dap: Issue disconnect before reconnecting
cmsis-dap protocol has both DAP_Connect and DAP_Disconnect commands.
Logically if cmsis_dap_swd_switch_seq() calls DAP_Connect in connected
state it should call DAP_Disconnect first.
Doing so surprisingly solves problems on Atmel EDBG with target SAMD/R/L/C.
Without this change SWD communication breaks after reset run/halt
in config "reset_config srst_only" and reconnect trials repeatedly
fail with "SWD ack not OK: 0 JUNK"
Change-Id: Ie951098d5e0c83f388e2df414608aaabec2135c9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3098 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tomas Vanek [Fri, 15 May 2015 09:14:11 +0000 (11:14 +0200)]
at91samd: handle reset run/halt in DSU
Atmel introduced a "Device Service Unit" (DSU) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Function is similar to SMAP in ATSAM4L, see http://openocd.zylin.com/2604
Atmel's EDBG adapter handles DSU reset correctly without this change.
An ordinary SWD adapter leaves TCK in its default state, low.
So without this change any use of sysresetreq or srst
locks the chip in reset state until power is cycled.
A new function dsu_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and DSU reset is released then.
Additionally SWD clock comment is fixed in at91samdXX.cfg and clock is
lowered a bit to ensure a margin for RC oscillator frequency deviation.
adapter_nsrst_delay 100 is commented out because is no more necessary after
http://openocd.zylin.com/2601
Change-Id: I42e99b1b245f766616c0a0d939f60612c29bd16c Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2778 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Ragnar Sundblad [Sat, 17 Oct 2015 22:48:12 +0000 (00:48 +0200)]
topic: Interface config file for FTDI UM232H module
Added interface config file for the FTDI FT232H based UM232H module.
This should work with UM232H-B too, an even cheaper module, but
that has not been tested.
Jeff Ciesielski [Thu, 22 Jan 2015 02:57:59 +0000 (18:57 -0800)]
flash: New driver for XMC4xxx microcontroller family
This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.
Note:
* Flash protect only partly tested. These parts only allow the flash
protection registers (UCB) to be written 4 times total, and my devkits
have run out of uses (more on the way)
Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)
Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Morgan Quigley [Sun, 6 Sep 2015 18:31:09 +0000 (11:31 -0700)]
flash: driver for Atmel SAMV, SAMS, and SAME
This is a driver for the Atmel Cortex-M7 SAMV, SAMS, and SAME.
I started with the at91sam4.c driver and then restructured it
significantly to try to simplify it and limit the functionality
to just a flash driver, as well as to comply with the style guide.
Change-Id: I5340bf61f067265b8ebabd3adad45be45324b707 Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/2952 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Paul Fertser [Fri, 6 Nov 2015 17:26:46 +0000 (20:26 +0300)]
target: cortex_a: do not create new register cache every reset
Commit 68101e67ac16bdead3bd6d48cbe0a2bfd63aac02 introduced a
regression which resulted for ever-growing registers list (as output
by "reg" command), its contents were doubled every reset (actually,
every examination).
If ttbcr is changed after the debugger has examined a target for the
first time, address translations may fail. This problem does not show up
with Linux because it doesn't use ttbr1, but it shows with other OS that
use this feature. If the debugger connects to the target while it's in
u-boot, all address translations will fail after the OS has booted and
the target can not be debugged.
This patch reads the ttbcr in armv7a_mmu_translate_va() and compares it
a cached value. If a difference is detected, armv7a_read_ttbcr() is called
to re-parse the ttb configuration and update the cache.
Tomas Vanek [Fri, 2 Oct 2015 12:31:30 +0000 (14:31 +0200)]
Kinetis: properly pad flash section writes
kinetis_write() with byte count not divisible by prog_section_chunk_bytes
computed wrong wc and therefore paded section chunk by some
random data instead of 0xff
Change-Id: Ic7c66d8a3ceacda9e611e98b9fbf943b8001774b Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2994 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Thomas Schmid [Wed, 30 Sep 2015 15:40:10 +0000 (09:40 -0600)]
Kinetis: Disable watchdog on Kx devices when programming.
Kx devices with FTFA flash need the watchdog disabled when programming.
I tried to keep overhead as small as possible and re-use registers that
were already inquired (e.g. sim_sdid).
Change-Id: Ibc29a26ec34102d78a6c3920dd16f63e134a8f6f Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2986 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The change concerns the "Black" variant of the TI BeagleBone, while the
configuration file is for the original BeagleBone board, which actually
embeds a debug interface on the PCB.
This makes it easier to relocate the install tree of OpenOCD from where
it was originally built (for example, if put onto a different machine),
without having to change scripts or add something to the command line
every time.
Change-Id: Ia5edf0eba166f7a999f267bd6a92402dab9b399e Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3004 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If we work on smp system, the output of step command will depend
on Id of default target.
This patch adds additional information to help find what on which
core is happening.
Example of LOG after this patch.
imx6.cpu.1: target state: halted
^^^^^^^^^^
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x60000093 pc: 0x80076c0c
MMU: enabled, D-Cache: enabled, I-Cache: enabled
imx6.cpu.0: target state: halted
^^^^^^^^^^
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x20000193 pc: 0x802ccb6c
MMU: enabled, D-Cache: enabled, I-Cache: enabled
Tomas Vanek [Thu, 1 Oct 2015 17:17:41 +0000 (19:17 +0200)]
cortex_m: dwt_num_comp should be set to zero in cortex_m_dwt_free()
A segmentation fault in cortex_m_endreset_event() is sometimes raised
with very broken target like Kinetis Kx with erased flash and active WDOG.
Debugging revealed that cortex_m->dwt_num_comp is 4 and
dwt_list is NULL at cortex_m:290
Change-Id: I229c59d6da13d816df513d1dbb19968e4b5951e2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2989 Reviewed-by: Thomas Schmid <thomas@rfranging.com> Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
daniel-k [Wed, 14 Oct 2015 15:30:57 +0000 (17:30 +0200)]
rtos/mqx: Fix uninitialized parts of symbol table
Memory for the symbol table was allocated by malloc but not initialized other
than with the symbol name. Therefore `address` and `optional` members were
having arbitrary values leading to every symbol being optional most of the
time which messes up RTOS auto-detection. Memory will now be zero-initialized
as in other RTOS implementations.
Andrew Ruder [Mon, 5 Oct 2015 18:52:43 +0000 (13:52 -0500)]
rtos: handle STKALIGN adjustments on cortex m
In the case that the STKALIGN bit is set on Cortex M processors, on
entry to an exception - the processor can store an additional 4 bytes
of padding before regular stacking to achieve 8-byte alignment on
exception entry. In the case that this padding is present, the
processor will set bit (1 << 9) in the stacked xPSR register. Use the
new calculate_process_stack callback to take into account the xPSR
register and use it on the standard Cortex_M3 stacking.
Note: Change #2301 had some misinformation regarding the padding. On
Cortex-M the padding is stored BEFORE stacking so xPSR is always
available at a fixed offset.
Tested on a Cortex-M0+ (Atmel SAMR21) board which has STKALIGN fixed
to a '1' such that this alignment always occurs on non-aligned stacks.
Behavior of xPSR verified via the (bad-sorry) assembly program below by
setting a breakpoint on the SVC_Handler symbol. The first time
SVC_Handler is triggered the stack was 0x20000ff8, the second time
SVC_Handler is triggered the stack was 0x20000ffc. Note that in both
cases the interrupt handler gets 0x20000fd8 for a stack pointer.
GDB exerpt:
Breakpoint 1, 0x000040b6 in Reset_Handler ()
(gdb) hbreak SVC_Handler
Hardware assisted breakpoint 2 at 0x40f8
(gdb) cont
Continuing.
@ first call - 0x2000fff8 -- should already be aligned
@ second call - 0x2000fffc -- should hit the alignment code
.global SVC_Handler
SVC_Handler:
bx lr
Change-Id: Id0940e6bbd6a59adee1378c0e86fe86830f0c8fc Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3003 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Andrew Ruder [Mon, 5 Oct 2015 18:51:10 +0000 (13:51 -0500)]
rtos: turn stack alignment into a function pointer
Some targets (Cortex M) require more complicated calculations for
turning the stored stack pointer back into a process stack pointer.
For example, the Cortex M stores a bit in the auto-stacked xPSR
indicating that alignment had to be performed and an additional 4
byte padding is present before the exception stacking. This change
only sets up the framework for Cortex-M unstacking and does not
add Cortex-M support.
Note: this also fixes the alignment calculation nearly addressed by
change #2301 entitled rtos/rtos.c: fix stack alignment calculation.
Updated calculation is in rtos_generic_stack_align.
Change-Id: I0f662cad0df81cbe5866219ad0fef980dcb3e44f Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3002 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
Ivan De Cesaris [Mon, 26 Oct 2015 15:50:34 +0000 (16:50 +0100)]
quark: updating license to GPLv2+
Intel is relicensing our contributions to OpenOCD under GPL
version 2 or any later version. We previously contributed code
under GPL version 2 only. It was not our intention to differ
from the standard OpenOCD license. We're correcting that here.
This also applies retroactively to previous versions of our
contributions to OpenOCD.
Change-Id: I5e831ed95d03d2044d8e5a8375b21c6e52c933d7 Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3044 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andreas Färber [Sun, 10 May 2015 12:45:32 +0000 (14:45 +0200)]
tcl/target: Add config for XMOS XS1-XAU8A-10's ARM core
The XS1-XAU8A-10 has 8 xCORE cores and one ARM core.
This config represents the ARM Cortex-M3 core, which is apparently
Silicon Labs EFM32 Giant Gecko IP.
Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146 Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2762 Tested-by: jenkins Reviewed-by: Oleksij Rempel Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
tcl: Support for reading "Device DNA" from Spartan 6 devices.
Most Xilinx FPGA devices contain an embedded, unique device identifier
called the "Device DNA". The identifier is nonvolatile, permanently
programmed into the FPGA, and is unchangeable providing a great serial
/ tracking number.
Debugging was done in https://github.com/timvideos/HDMI2USB/issues/36
Change-Id: Iad03eafb40887f0321a4dc22858a7c3bf37a12b3 Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2960 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Peter A. Bigot [Thu, 13 Aug 2015 14:20:25 +0000 (09:20 -0500)]
nrf51: recognize hwid 0084
Chip markings: N51822 / QFACA1 / 1513AN
Change-Id: Idb7fc723850ea08b60b9f5c97a53f1ae8dfc8eb2 Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/2936 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tomas Vanek [Tue, 14 Jul 2015 20:10:55 +0000 (22:10 +0200)]
Kinetis: new devices K02, K26, K63, K64, K66, correct K21 and K22 variants
K22FN1M0 and K22FX512 has FTFE flash and old style SDID.
K22FN128, 256 and 512 has FTFA flash and new style SDID
K63 and K64 detects as K61 and K62, see Errata 1N83J e7534
Change-Id: I2aca6f1f18819bb2b2ec4982036510de444ad2ac Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2867 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
Tomas Vanek [Thu, 24 Sep 2015 08:29:12 +0000 (10:29 +0200)]
Kinetis: give a reasonable default for max_flash_prog_size
max_flash_prog_size euals to pflash_sector_size_bytes for most of devices.
There is no point setting max_flash_prog_size for devices without
FS_PROGRAM_SECTOR capability.
Check for zero sector_size to avoid div by zero exception in case of
device has FlexNVM but the driver does not define nvm_sector_size_bytes
Change-Id: Iaf4e007fb1ec3d24c373350410e4bebe504a4c3e Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2958 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
Patrick Stewart [Fri, 10 Jul 2015 13:01:35 +0000 (14:01 +0100)]
Kinetis: Add K24 support and tidy up
The K24 uses the KL-style SDID register and has some flashing quirks, so the kinetis driver does not support it properly.
Extend the chip detection routine to support the new SDID format. Add a parameter for the maximum flash size, as the K24 only supports 1k flashing blocks but has 4k sector size. Remove global 'granularity' array, as it's only really needed in one function. Replace 'klxx' with an enum showing which flash commands are actually supported on a given chip.
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Change-Id: Ie244fab564d58c5cfe4fa36a025f0b2674ffad69
Reviewed-on: http://openocd.zylin.com/2864 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Jim Paris [Fri, 11 Sep 2015 17:00:54 +0000 (13:00 -0400)]
stlink_usb: fix typo
Change-Id: I3cf5ced568319878b8bf40743e4c07718f630c68 Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2953 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
projects / openocd / log