Stefan Roese [Fri, 17 Mar 2006 09:28:24 +0000 (10:28 +0100)]
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Wolfgang Denk [Mon, 13 Mar 2006 11:37:35 +0000 (12:37 +0100)]
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
Stefan Roese [Mon, 13 Mar 2006 10:16:36 +0000 (11:16 +0100)]
Change max size of uncompressed uImage's to 8MByte and add
CFG_BOOTM_LEN to adjust this setting.
As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
uImages was restricted to 4MBytes. This default size is now
increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
in the board config file.
Wolfgang Denk [Sun, 12 Mar 2006 23:50:48 +0000 (00:50 +0100)]
Change the sequence of events in soft_i2c.c:send_ack() to keep from
incorrectly generating start/stop conditions on the bus.
Patch by Andrew Dyer, 26 Jul 2005
Wolfgang Denk [Sun, 12 Mar 2006 23:46:05 +0000 (00:46 +0100)]
Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
Wolfgang Denk [Sun, 12 Mar 2006 01:10:00 +0000 (02:10 +0100)]
Add ADI Blackfin support
- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:
Wolfgang Denk [Sun, 12 Mar 2006 00:48:55 +0000 (01:48 +0100)]
RPXlite configuration fixes
- Use correct flash sector size
- Use correct memory test end address
- Add support for bzip2 compression
- Various small fixes
Patch by Yuli Barcohen, 05 Jun 2005
Wolfgang Denk [Sun, 12 Mar 2006 00:45:44 +0000 (01:45 +0100)]
Memory configuration changes for ZPC.1900 board
- Fix SDRAM timing on both local bus and 60x bus
- Add support for second flash bank (SIMM)
- Change boot flash base
Patch by Yuli Barcohen, 05 Jun 2005
NAND finally working. Two bugs fixed:
* For READ_STATUS and READID commands always 8 bytes need to be read from
NDDB. Otherwise they stay there and get send to flash as the first data
word when writing.
* In nand_base.c the oob variable is not reset so this->oob_buf is
overwritten what eventually screws up the bad block descriptor table.
Wolfgang Denk [Mon, 6 Mar 2006 10:25:22 +0000 (11:25 +0100)]
Merge the new NAND code (testing-NAND brach); see doc/README.nand
Rewrite of NAND code based on what is in 2.6.12 Linux kernel
Patch by Ladislav Michl, 29 Jun 2005
Re-factoring the legacy NAND code (legacy NAND now only in board-specific
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.
Lots of new stuff:
* Debug message can be turned on and off.
* Waiting for events now times out.
* Implemented RESET command.
* Added appropriate nand_bbt_descriptor and nand_oobinfo.
Remaining Problems:
* Read Status still behaves weird an returns invalid stuff sometimes.
* ECC Placement does not respect our scheme in nand_oobinfo.
Moved the waiting loop for "Read Data Request" RDDREQ into the
delta_cmdfunc function, because this bit is only set once after a command
is sent and this allows read functions to be called multiple times.