Michal Simek [Fri, 8 Jun 2018 07:36:12 +0000 (09:36 +0200)]
arm: zynq: Drop #address-cells and #size-cells from gpio-keys
dtc is showing some warnings and this change was also done in
the Linux kernel as "Input: gpio-keys - clean up device tree binding
example"
with this fragment in commit message
"Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices."
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jun 2018 08:33:49 +0000 (10:33 +0200)]
net: zynq_gem: Initialize phyreg variable
In case of phyread()/phy_setup_op() timeout code is working with
uninitialized phyreg variable. Initialize this variable to make sure
that code it not working with random value.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Mon, 4 Jun 2018 10:17:33 +0000 (12:17 +0200)]
net: designware: set the PS bit when resetting DMA bus in MII configuration
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block,
the DMA reset never succeeds when a MII PHY is used (no problem with a
GMII PHY). The designware_eth_init() function sets the
DMAMAC_SRST bit in the DMA_BUS_MODE register, and then
polls until this bit clears. When a MII PHY is used, with the current
driver, this bit never clears and the driver therefore doesn't work.
The reason is that the PS bit of the GMAC_CONTROL register should be
correctly configured for the DMA reset to work. When the PS bit is 0,
it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells
the MAC we have a MII PHY.
Doing a DMA reset clears all registers, so the PS bit is cleared as
well. This makes the DMA reset work fine with a GMII PHY. However,
with MII PHY, the PS bit should be set.
We have identified this issue thanks to two SPEAr600 platform:
- One equipped with a GMII PHY, with which the existing driver was
working fine.
- One equipped with a MII PHY, where the current driver fails because
the DMA reset times out.
Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Sun, 3 Jun 2018 04:21:26 +0000 (16:21 +1200)]
net: phy: mv88e61xx: Force CPU port link up
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Kunihiko Hayashi [Thu, 24 May 2018 10:24:37 +0000 (19:24 +0900)]
net: add Socionext AVE ethernet driver support
Add driver for Socionext AVE ethernet controller that includes MAC and
MDIO bus supporting RGMII/RMII modes.
The driver behaves the ethernet driver model (DM_ETH) with devicetree.
Radu Bulie [Mon, 21 May 2018 15:02:09 +0000 (10:02 -0500)]
drivers/net/vsc9953: Initialize action RAM in VCAP complex
VCAP tables must be initialized even if no advanced classification
is used. If no initialization is performed, then ECC error will
be observed by the user when the first packet enters the l2switch.
The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM
multi-bit ECC error.
This patch fixes the aforementioned ECC error by performing the
initialization of VCAP tables.
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROP
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Sat, 12 May 2018 07:30:02 +0000 (07:30 +0000)]
net: cpsw: ti: Reap completed packets before stopping interface
If you send a final packet just before stopping the interface (e.g. a final
ACK as part of the UDP fastboot protocol), then that packet isn't reliably
delivered onto the wire.
Reap packets prior to stopping the interface to ensure any which are
in-flight make it out. Also remove buffer and len from the call to
cpdma_process() as we weren't using them on their return.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Global variable "net_state" is used in net_loop() state-machine.
But it happens that some times the net_loop() can be called
multiple times in the same call stack. For example when the
netconsole is enabled and we print the message while some other
net protocol is in action. Netconsole will overwrite the "net_state"
and that will break the logic for earlier started protocol.
To protect the state save and restore "net_state" variable each
time when we enter and exit net_loop().
Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add support for Cortina CS4223 10G PHY
- As per the CS4223 specs, an EEPROM module is
connected to the PHY. At startup the PHY reads
the firmware line and tries to load the firmware
into the internal memory.
- This driver reads the EEPROM status
and checks if firmware has been loaded
Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Fri, 27 Apr 2018 12:52:57 +0000 (14:52 +0200)]
tsec: Fix reading phy registers from DT
Bus translations should be applied when reading the address of the sgmii
phy registers from the DT. Use ofnode_get_addr_index instead of the
plain ofnode_read_u32_default to fix this.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Fri, 27 Apr 2018 12:52:56 +0000 (14:52 +0200)]
net: Initialize as many ethernet devices as possible
On devices that have their first network interface provided by a FPGA,
the initialization of further interfaces will fail if the FPGA is not
yet programmed. This leads to problems during factory setup when the
data is supposed to be loaded over secondary netowork interfaces.
To avoid this, use the uclass_{first,next}_device_check functions to
initialize as many ethernet devices as possible.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Thu, 7 Jun 2018 12:20:05 +0000 (12:20 +0000)]
tools: env: Use getline rather than fgets when reading config/script
When reading the config file, or a script file, use getline rather than
fgets so line lengths aren't limited by the size of a compiled in buffer
(128 characters for config, 1024 for scripts).
Rename 'dump' to 'line' so it's clear we're working with a line of text.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Adam Ford [Wed, 6 Jun 2018 19:39:50 +0000 (14:39 -0500)]
AM3517_EVM: Fix Environmental location
The am3517-evm boards stores the environment in NAND, but after merging
various configs, the board was trying to load environment variables from
FAT which would ultimately fail and cause some chatter.
This patch removes the ENV_IS_IN_FAT flag to eliminate the noise.
Alexey Brodkin [Tue, 5 Jun 2018 14:17:57 +0000 (17:17 +0300)]
lib: Add hexdump
Often during debugging session it's very interesting to see
what data we were dealing with. For example what we write or read
to/from memory or peripherals.
This change introduces functions that allow to dump binary
data with one simple function invocation like:
------------------->8----------------
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
------------------->8----------------
Source of hexdump.c was copied from Linux kernel v4.7-rc2.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Stefan Roese <sr@denx.de>
fs: btrfs: Fix not all CHUNK_ITEMs being read from CHUNK_TREE
This causes errors when translating logical addresses to physical:
btrfs_map_logical_to_physical: Cannot map logical address <addr> to physical
btrfs_file_read: Error reading extent
The behavior of btrfs_map_logical_to_physical() is to stop traversing
CHUNK_TREE when it encounters first non-CHUNK_ITEM, which makes
only some portion of CHUNK_ITEMs being read.
Change it to skip over non-chunk items.
Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Sergey Struzh <sergeys@pointgrab.com> Reviewed-by: Marek Behun <marek.behun@nic.cz>
Seung-Woo Kim [Mon, 4 Jun 2018 11:45:54 +0000 (20:45 +0900)]
fs: fat: fix wrong casting to unsigned value of sect_to_cluster()
After the commit 265edc03d5a1 ("fs/fat: Clean up open-coded sector
<-> cluster conversions"), it is hung up writing new file to FAT16
disk with more than 19 files in armv7. It is because result value
of sect_to_cluster() is not proper by casting from signed value to
unsigned value. Fix the wrong casting of sect_to_cluster().
Bin Meng [Tue, 12 Jun 2018 08:26:46 +0000 (01:26 -0700)]
x86: irq: Support discrete PIRQ routing registers via device tree
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not always
the case on some platforms. Introduce a new device tree property
intel,pirq-regmap to describe how the PIRQ routing register offset
is mapped to the link number and adjust the irq router driver to
utilize the mapping.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 12 Jun 2018 08:26:45 +0000 (01:26 -0700)]
x86: irq: Parse number of PIRQ links from device tree
The "intel,pirq-link" property in Intel IRQ router's dt bindings
has two cells, where the second one represents the number of PIRQ
links on the platform. However current driver does not parse this
information from device tree. This adds the codes to do the parse
and save it for future use.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 10 Jun 2018 13:25:09 +0000 (06:25 -0700)]
x86: efi: payload: Minor clean up on error message output
If GetMemoryMap() fails, we really want to know EFI_BITS_PER_LONG
instead of BITS_PER_LONG. A space and LF are added in places where
error message is output to improve readability.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
dm: pci: Use a 1:1 mapping for bus <-> phy addresses
If U-Boot gets used as coreboot payload all pci resources got
assigned by coreboot. If a dts without any pci ranges gets used
the dm is not able to access pci device memory. To get things
working make use of a 1:1 mapping for bus <-> phy addresses.
This change makes it possible to get the e1000 U-Boot driver
working on a sandybridge device where U-Boot is used as coreboot
payload.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
If we use U-Boot as coreboot payload with a generic dts without
any ranges specified we fail in pci pre_probe and our pci bus
is not usable.
So convert decode_regions(..) into a void function and do the simple
error handling there.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message and checkpatch warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Attempting to use a toolchain that is preconfigured to generate code
for the 32-bit architecture (i386), for example, the i386-linux-gcc
toolchain on kernel.org, to compile the 64-bit EFI payload does not
build. This updates the makefile fragments to ensure '-m64' is passed
to toolchain when building the 64-bit EFI payload stub codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 10 Jun 2018 13:25:02 +0000 (06:25 -0700)]
x86: efi: app: Fix broken EFI application
The EFI application does not boot currently. It's due to the call
to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
CONFIG_SYSCON is not included in the configuration.
EFI application is built as a shared library, so GCC won't complain
during the build process if some symbols are not found. GCC will
simply put these symbols into the .plt section and expect dynamic
loader to fix these up.
While we are here, remove some commands and drivers that are not
needed at present.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 4 Jun 2018 02:04:22 +0000 (19:04 -0700)]
x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.
Now we remove these specific drivers and make all x86 boards use
the common one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 4 Jun 2018 02:04:17 +0000 (19:04 -0700)]
x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.
This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 4 Jun 2018 02:04:16 +0000 (19:04 -0700)]
x86: cougarcanyon2: Update dts for SPI lock down
It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:
"ICH SPI: Opcode 9f not found"
Update the SPI node property to indicate this fact.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Shevchenko [Wed, 23 May 2018 09:38:02 +0000 (12:38 +0300)]
x86: acpi: Adopt new version of iASL compiler
The commit
f9a88a4c1cd0 ("iASL: Enhance the -tc option (create AML hex file in C)")
in ACPICA project changed a template of the variable that is used
in the generated C-file. Now, instead of hard coded "AmlCode" the
"%s_aml_code" is in use, where the prefix is a lowered case base
name of the output file. In our case it will be "dsdt" producing
a name as "dsdt_aml_code".
The quick solution is to call sed which replaces new name by the
old one to keep compatibility with old version of iASL.
The long term solution would be to modify code to use the new name
because it is more scalable.
Cc: Robert Moore <robert.moore@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Evan Lloyd <evan.lloyd@arm.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed two sentences in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
x86: tsc: add support for reading CPU freq from cpuid
Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.
This fixes booting on a skylake based system.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed wrong indention of labels] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dennis Gilmore [Tue, 12 Jun 2018 00:39:53 +0000 (19:39 -0500)]
arm: mvebu: Add Helios4 Armada 38x initial support
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell
Signed-off-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
Bhaskar Upadhaya [Wed, 23 May 2018 05:33:30 +0000 (11:03 +0530)]
board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
Ramon Fried [Wed, 30 May 2018 20:09:58 +0000 (23:09 +0300)]
iotrace: add IO region limit
When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Tue, 5 Jun 2018 21:38:59 +0000 (00:38 +0300)]
bug.h: introduce WARN_ONCE
Add WARN_ONCE definition to allow single time notification
of warnings to the user.
Taken from Linux kernel (4.17) with slight changes
(Removed __section(.data.once))
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
[trini: Drop the musb and dwc3 compat versions] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 1 Jun 2018 15:38:21 +0000 (09:38 -0600)]
binman: Add support for adding a name prefix to entries
Sometimes we have several sections which repeat the same entries (e.g. for
a read-only and read-write version of the same section). It is useful to
be able to tell these entries apart by name.
Add a new 'name-prefix' property for sections, which causes all entries
within that section to have a given name prefix.
Simon Glass [Fri, 1 Jun 2018 15:38:20 +0000 (09:38 -0600)]
binman: Add support for outputing a map file
It is useful to be able to see a list of regions in each image produced by
binman. Add a -m option to output this information in a '.map' file
alongside the image file.
Simon Glass [Fri, 1 Jun 2018 15:38:16 +0000 (09:38 -0600)]
binman: Add support for sections
It is useful to be able to split an image into multiple sections,
each with its own size and position, for cases where a flash device has
read-only and read-write portions.
Simon Glass [Fri, 1 Jun 2018 15:38:15 +0000 (09:38 -0600)]
binman: Avoid setting sys.path globally
At present we set the Python path at the start of binman so we can read
modules in the 'etype' directory. This is a bit messy since it affects
'import' statements through binman.
Adjust the code to set the path locally, just where it is needed. Move
the 'entry' module in with the other base modules to help with this. It
makes more sense here anyway since it does not implement an entry type.
Simon Glass [Fri, 1 Jun 2018 15:38:12 +0000 (09:38 -0600)]
binman: Refactor much of the image code into 'section'
We want to support multiple sections within a single image. To do this,
move most of the Image class implementation into a new Section class. An
Image contains only a single Section, but at some point we will support
a new 'section' entry, thus allowing Sections within Sections.
Use the name 'bsection' for the module so we can use 'section' for the
etype module.
Tom Rini [Tue, 22 May 2018 16:24:16 +0000 (12:24 -0400)]
block: Have BLOCK_CACHE default to y in some cases
When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled. The code paths are valid in other cases when we have BLK
set and may provide wins in raw reads in some use cases, so have this be
default when BLK is enabled.
projects / u-boot / log