Maxime Ripard [Tue, 23 Jan 2018 20:16:57 +0000 (21:16 +0100)]
env: common: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make the common code play a little nicer by removing all the extra output
in the standard case.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:54 +0000 (21:16 +0100)]
env: Make it explicit where we're loading our environment from
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:53 +0000 (21:16 +0100)]
env: Make the env save message a bit more explicit
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.
That might confuse the user, so let's make it explicit if the operation
failed or not.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:52 +0000 (21:16 +0100)]
env: Pass additional parameters to the env lookup function
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.
The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.
The priority is a number passed to identify the environment priority you
want to retrieve. The lowest priority parameter (0) will be the primary
source.
Combining the two parameters allow you to support multiple environments
through different priorities, and to change those priorities between read
and writes operations.
This is especially useful to implement migration mechanisms where you want
to always use the same environment first, be it to read or write, while the
common case is more likely to use the same environment it has read from to
write it to.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:50 +0000 (21:16 +0100)]
cmd: nvedit: Get rid of the env lookup
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.
As we're about to rework the environment to be able to handle multiple
environment sources, we might not have an idea of what environment backend
is going to be used before trying (and possibly failing for some).
Therefore, it makes sense to remove that message and move it to the
env_save function itself. As a side effect, we also can get rid of the call
to env_driver_lookup_default that is also about to get refactored.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tom Rini [Fri, 26 Jan 2018 16:24:04 +0000 (11:24 -0500)]
ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.
Fixes: 48263504c8d5 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit") Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Chris Blake [Mon, 15 Jan 2018 22:28:18 +0000 (16:28 -0600)]
gpio: sunxi: Add compatible string for H5 PIO
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards.
Signed-off-by: Chris Blake <chrisrblake93@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: remove external link and format commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:24 +0000 (09:44 +0100)]
sunxi: Add limit with the MMC environment
The MMC environment offset is getting very close to the end of the U-Boot
binary now. Since we want to make sure this will not overflow, add a size
limit in the board for arm64. arm32 has already that limit enforced in our
custom image generation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Heider [Tue, 16 Jan 2018 08:44:22 +0000 (09:44 +0100)]
sunxi: imply CONFIG_OF_LIBFDT_OVERLAY
fdt overlay support is useful for all sunxi boards, enable per default
and remove it from sunxi defconfigs.
Signed-off-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:21 +0000 (09:44 +0100)]
net: regex: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this option that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:20 +0000 (09:44 +0100)]
video: bpp16: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:19 +0000 (09:44 +0100)]
video: bpp8: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:18 +0000 (09:44 +0100)]
cmd: misc: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:17 +0000 (09:44 +0100)]
cmd: loads: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:16 +0000 (09:44 +0100)]
cmd: loadb: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:15 +0000 (09:44 +0100)]
cmd: unzip: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:14 +0000 (09:44 +0100)]
cmd: crc32: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Eugeniy Paltsev [Thu, 28 Dec 2017 12:09:03 +0000 (15:09 +0300)]
DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Paul Burton [Thu, 18 Jan 2018 22:36:41 +0000 (14:36 -0800)]
boston: Pad binary in .mcs to a multiple of 16 bytes
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:
Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.
Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Jaehoon Chung [Tue, 23 Jan 2018 05:04:30 +0000 (14:04 +0900)]
mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.
Jaehoon Chung [Tue, 16 Jan 2018 06:33:50 +0000 (15:33 +0900)]
power: regulator: s2mps11: add a regulator driver for s2mps11
exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.
Vignesh R [Wed, 24 Jan 2018 05:14:07 +0000 (10:44 +0530)]
spi: cadence_qspi_apb: Make flash writes 32 bit aligned
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.
Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Jason Rush [Tue, 23 Jan 2018 23:13:12 +0000 (17:13 -0600)]
dts: cadence_spi: Update documentation for DT bindings
Update documentation to reflect adopting the Linux DT bindings.
Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:11 +0000 (17:13 -0600)]
config: cadence_spi: Remove defines read from DT
Cleanup unused #define values that are read from the DT.
Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:10 +0000 (17:13 -0600)]
dts: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings and clean-up duplicate
and unused values.
Fix indentation of the QSPI node in the keystone k2g
device tree.
Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:09 +0000 (17:13 -0600)]
spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
Chris Packham [Mon, 22 Jan 2018 09:44:20 +0000 (22:44 +1300)]
spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz. However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.
Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
Mario Six [Mon, 15 Jan 2018 10:08:38 +0000 (11:08 +0100)]
spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:37 +0000 (11:08 +0100)]
spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:36 +0000 (11:08 +0100)]
spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.
But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.
Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:35 +0000 (11:08 +0100)]
spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Jagan Teki <jagan@openedev.com>
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
wait_bit: add 8/16/32 BE/LE versions of wait_for_bit
Add 8/16/32 bits and BE/LE versions of wait_for_bit.
This is needed for reading registers that are not aligned to 32 bits, and for
Big Endian platforms.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
common/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFO
Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO.
Signed-off-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes for v2:
- update common/Kconfig to add M68K to the default y list
Ashish Kumar [Wed, 17 Jan 2018 06:46:36 +0000 (12:16 +0530)]
fsl: common: qixis: Add ifc and emmc switching via qixis
Currently only SD, NAND can be secondary boot sources controlled
by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR
can be secondary boot source, while QSPI-NOR is the primary.
Add options in qixis to switch to other boot sources including
ifc and emmc.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Pankaj Bansal [Thu, 18 Jan 2018 04:13:33 +0000 (09:43 +0530)]
ARM: dts: Freescale: re-license device tree files under GPLv2+/X11
The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.
To make it easier to reuse them, re-license the the device trees for
Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license.
Same trend is followed in linux.
Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:09 +0000 (16:13 +0530)]
ls1088a: Add VID support for QDS and RDB platforms
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.
This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:03 +0000 (16:13 +0530)]
board: common: vid: Move IR chip specific code in flag
Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Adam Ford [Thu, 11 Jan 2018 14:20:27 +0000 (08:20 -0600)]
Convert CONFIG_SOC_DA8XX et al to Kconfig
This converts the following to Kconfig:
CONFIG_SOC_DA8XX
CONFIG_SOC_DA850
CONFIG_DA850_LOWLEVEL
CONFIG_MACH_DAVINCI_DA850_EVM
CONFIG_SYS_DA850_PLL_INIT
CONFIG_SYS_DA850_DDR_INIT
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: David Lechner <david@lechnology.com>
[trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX] Signed-off-by: Tom Rini <trini@konsulko.com>
efi_loader: allow creation of more device part nodes
Create device path nodes for UCLASS_ETH udevices.
Create device path nodes of block device children of UCLASS_MMC udevices.
Consistently use debug for unsupported nodes.
Set the log level to error.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Fix build failure by adding #ifdef CONFIG_DM_ETH] Signed-off-by: Alexander Graf <agraf@suse.de>
This test checks the driver for block IO devices.
A disk image is created in memory.
A handle is created for the new block IO device.
The block I/O protocol is installed on the handle.
ConnectController is used to setup partitions and to install the simple
file protocol.
A known file is read from the file system and verified.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices
For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol
The uclass provides the bind, start, and stop entry points for the driver
binding protocol.
In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.
The EFI block driver binds to controllers implementing the block io
protocol.
When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.
The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.
A usage example is as following:
U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.
Now the EFI block driver installs the partitions with the simple file
protocol.
iPXE uses the simple file protocol to load Grub or the Linux Kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: add comment on calloc len] Signed-off-by: Alexander Graf <agraf@suse.de>
projects / u-boot / log