]> git.sur5r.net Git - u-boot/log
u-boot
8 years agoRevert "rockchip: Add max spl size & spl header configs"
Jeffy Chen [Fri, 27 Nov 2015 04:07:16 +0000 (12:07 +0800)]
Revert "rockchip: Add max spl size & spl header configs"

This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Fri, 11 Dec 2015 20:07:44 +0000 (15:07 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

8 years agospi: xilinx: Add new compatible strings
Michal Simek [Fri, 11 Dec 2015 11:41:14 +0000 (12:41 +0100)]
spi: xilinx: Add new compatible strings

Add xlnx,xps-spi-2.00.a/b which is compatible string
listed in the Linux kernel.
Remove origin one which has no real background.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agomailmap: Update Jagan Teki's name and email address
Jagan Teki [Sun, 6 Dec 2015 19:56:13 +0000 (01:26 +0530)]
mailmap: Update Jagan Teki's name and email address

Used quite different name's and e-mail address, all of
them mapped to standard name and e-mail address.

Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Rename sf_ops.c to spi-flash.c
Jagan Teki [Sun, 6 Dec 2015 17:59:02 +0000 (23:29 +0530)]
sf: Rename sf_ops.c to spi-flash.c

Since all spi-flash core operations are moved into
sf_ops.c then it's better to renamed as spi-flash.c

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Use static for file-scope functions
Jagan Teki [Sun, 6 Dec 2015 16:14:12 +0000 (21:44 +0530)]
sf: Use static for file-scope functions

Used static for file-scope functions in sf_probe.c

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: sf_probe: Remove spi_slave pointer argument
Jagan Teki [Sun, 6 Dec 2015 16:03:32 +0000 (21:33 +0530)]
sf: sf_probe: Remove spi_slave pointer argument

Since spi_slave is a spi pointer in spi_flash{} then assign
spi_slave{} pointer to flash->spi and remove spi_slave
pointer argument to
- spi_flash_probe_slave
- spi_flash_scan

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: ops: Fix missing break on spansion read_bar
Jagan Teki [Fri, 20 Nov 2015 07:30:15 +0000 (13:00 +0530)]
sf: ops: Fix missing break on spansion read_bar

For assigning read_bar commands in spansion case, break
is missing this patch add that break.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Remove unneeded SST_BP and SST_WP
Jagan Teki [Wed, 25 Nov 2015 19:33:33 +0000 (01:03 +0530)]
sf: Remove unneeded SST_BP and SST_WP

SST parts added on sf_params.c supports both SST_WR which consits
of both BP and WP and there is a spi controller ich which supports
only BP so the relevent _write hook set based on "slave->op_mode_tx"
hence there is no respective change required from flash side hance
removed these.

Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Remove unneeded header includes
Jagan Teki [Tue, 3 Nov 2015 19:10:32 +0000 (00:40 +0530)]
sf: Remove unneeded header includes

Removed unneeded header includes in sf_ops and sf_probe

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Flash power up read-only based on idcode0
Jagan Teki [Tue, 29 Sep 2015 20:31:23 +0000 (02:01 +0530)]
sf: Flash power up read-only based on idcode0

Using macro's for flash power up read-only access code
leads wrong behaviour hence use idcode0 for runtime
detection, hence the flash which require this functionality
gets detected at runtime.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Use simple name for register access functions
Jagan Teki [Tue, 29 Sep 2015 16:59:33 +0000 (22:29 +0530)]
sf: Use simple name for register access functions

Most of the register access function are static,
so used simple name to represent each.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Fix Makefile
Jagan Teki [Tue, 29 Sep 2015 13:46:29 +0000 (19:16 +0530)]
sf: Fix Makefile

This patch removes unneeded ifdef and fixed accordingly.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Use static for file-scope functions
Jagan Teki [Tue, 29 Sep 2015 12:56:08 +0000 (18:26 +0530)]
sf: Use static for file-scope functions

Use static for file-scope functions and removed
them from header files.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: probe: Code cleanup
Jagan Teki [Tue, 3 Nov 2015 18:57:35 +0000 (00:27 +0530)]
sf: probe: Code cleanup

- Move bar read code below the bar write hance both
  at once place, hence it easy for #ifdef macro only
  once and readable.
- Move read_cmd_array at top

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Move read_id code to sf_ops
Jagan Teki [Tue, 29 Sep 2015 12:36:04 +0000 (18:06 +0530)]
sf: Move read_id code to sf_ops

read_id code is related to spi_flash stuff
hence moved to sf_ops.

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: Move spi_flash_scan code to sf_ops
Jagan Teki [Fri, 11 Dec 2015 16:06:34 +0000 (21:36 +0530)]
sf: Move spi_flash_scan code to sf_ops

Intension is that sf_ops should deals all spi_flash
related stuff and sf_probe (which should renamed future)
should be an interface layer for spi_flash versus spi drivers.

sf_ops => spi_flash interface
sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agosf: spi_flash_validate_params => spi_flash_scan
Jagan Teki [Tue, 29 Sep 2015 11:58:20 +0000 (17:28 +0530)]
sf: spi_flash_validate_params => spi_flash_scan

Rename spi_flash_validate_params to spi_flash_scan
as this code not only deals with params setup but
also configure all spi_flash attributes.

And also moved all flash related code into
spi_flash_scan for future functionality addition.

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agospi: Kconfig: Fix correct target name for ZynqMP
Michal Simek [Mon, 7 Dec 2015 10:33:58 +0000 (11:33 +0100)]
spi: Kconfig: Fix correct target name for ZynqMP

ZynqMP is using different symbol.
Use correct one.

Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agospi: zynq_spi: Add cadence compatible string
Michal Simek [Mon, 7 Dec 2015 12:06:54 +0000 (13:06 +0100)]
spi: zynq_spi: Add cadence compatible string

Extend compatible list table for cdns,spi-r1p6 compatible string.

Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoimx: mx7dsabresd: Add QSPI support
Peng Fan [Mon, 30 Nov 2015 09:45:02 +0000 (17:45 +0800)]
imx: mx7dsabresd: Add QSPI support

Support qspi flashes for mx7dsabresd
1. introduce pin mux settings
2. enable qspi clock
3. introduce related macro definitions

Default QSPI is not enabled, since we need hardware rework to use QSPI,
see SPF-28590, page 9:
"
QSPI signals are muxed with EPDC_D[7:0]
When using QSPI: de-populate R388-R391, R396-R399
populate R392-R395, R299, R300
"

After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi
flashes can be deteced and read/erase/write. Log info:
"
=> sf probe
SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB
=> sf read 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Read: OK
=> sf erase 0 0x4000000
SF: 67108864 bytes @ 0x0 Erased: OK
=> sf write 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Written: OK
"

Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
8 years agospi: ti_qspi: Fix SPI_3WIRE checking using mode
Jagan Teki [Thu, 3 Dec 2015 16:55:20 +0000 (22:25 +0530)]
spi: ti_qspi: Fix SPI_3WIRE checking using mode

SPI_3WIRE is spi mode not spi flags, so this patch fixed
the spi-3wire checking throgh mode instead of flags.

Cc: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agospi: Get spi-3wire from dts
Jagan Teki [Thu, 3 Dec 2015 16:49:05 +0000 (22:19 +0530)]
spi: Get spi-3wire from dts

spi-3wire is used when SI/SO signals shared so get
the same from dts node and assign to mode on slave
plat->mode.

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Fri, 11 Dec 2015 15:29:28 +0000 (10:29 -0500)]
Merge git://git.denx.de/u-boot-dm

8 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 11 Dec 2015 14:06:51 +0000 (09:06 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-sunxi

8 years agoKconfig: i2c: Fix indentation
Michal Simek [Tue, 8 Dec 2015 10:18:54 +0000 (11:18 +0100)]
Kconfig: i2c: Fix indentation

Use tabs instead of space for indentation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoKconfig: i2c: Fix typo Suport -> Support
Michal Simek [Tue, 8 Dec 2015 10:18:53 +0000 (11:18 +0100)]
Kconfig: i2c: Fix typo Suport -> Support

Fix typo in command description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agodm: serial: Minor coding style cleanup of some comments
Stefan Roese [Thu, 26 Nov 2015 12:38:43 +0000 (13:38 +0100)]
dm: serial: Minor coding style cleanup of some comments

Fix incorrect comment alignments.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agodm: core: Fix Kconfig text to mention SPL in SPL_OF_TRANSLATE
Stefan Roese [Thu, 26 Nov 2015 12:38:01 +0000 (13:38 +0100)]
dm: core: Fix Kconfig text to mention SPL in SPL_OF_TRANSLATE

Add a remark about SPL to this Kconfig option. Otherwise its identitcal
to the non-SPL version, which is confusing.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
8 years agobuildman: README: add links for toolchains not available on kernel.org
Thomas Chou [Thu, 12 Nov 2015 01:29:09 +0000 (09:29 +0800)]
buildman: README: add links for toolchains not available on kernel.org

Add links for toolchains not available on kernel.org.

The sh4 toolchains from kernel.org dose not work for some boards,
so use the sh from Sourcery.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agosunxi: Fix H3 DRAM DQ read delay configuration
Jens Kuske [Thu, 10 Dec 2015 10:41:02 +0000 (11:41 +0100)]
sunxi: Fix H3 DRAM DQ read delay configuration

The read delays were set incorrectly, leading to reliability
issues at higher DRAM clock speeds. This commit adjusts this
to match the vendor boot0 behaviour.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosun4i: clock: Cleanup some whitespace errors
Olliver Schinagl [Thu, 3 Dec 2015 16:49:29 +0000 (17:49 +0100)]
sun4i: clock: Cleanup some whitespace errors

Add some spaces around operators.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: twi: Enable clocks on sun7i
Olliver Schinagl [Thu, 3 Dec 2015 16:49:28 +0000 (17:49 +0100)]
sunxi: twi: Enable clocks on sun7i

Commit 6c739c5d added code to enable i2c bus 4 and 5 on the sun7i SoC
but forgot to extend the range check in clock_twi_onoff, resulting in
the clock not getting enabled.

The range-check is not needed at all, since clock_twi_onoff only gets
called with such high indexes when CONFIG_I2C3_ENABLE / CONFIG_I2C4_ENABLE
is set and Kconfig already only allows these on sun6i / sun7i.

This commit removes the range-check all together fixing i2c bus 4 and 5
not working on sun7i.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
[hdegoede@redhat.com] Remove range check instead of extending it
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: select SYS_NS16550 from Kconfig
Hans de Goede [Thu, 10 Dec 2015 10:10:17 +0000 (11:10 +0100)]
sunxi: select SYS_NS16550 from Kconfig

Select SYS_NS16550 from Kconfig instead of setting it in all our
defconfig files.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add suport for A83T HomletV2 Board by Allwinner
vishnupatekar [Sat, 28 Nov 2015 17:07:27 +0000 (01:07 +0800)]
sunxi: Add suport for A83T HomletV2 Board by Allwinner

Add dts and defconfig for h8homletv2 board.

H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: dts: sun8i: Add Allwinner A83T dtsi
vishnupatekar [Sat, 28 Nov 2015 17:07:26 +0000 (01:07 +0800)]
sunxi: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.

This is not yet included in kernel.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add support for Allwinner A83T DRAM
vishnupatekar [Sat, 28 Nov 2015 17:07:25 +0000 (01:07 +0800)]
sunxi: Add support for Allwinner A83T DRAM

Add support for A83T dram. Register are different from sun8i A33.
init code is similar to A33 dram init.
hope we'll shift duplicate code in dram_sun8i_*
to dram helper in future.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: clk: add basic clocks for A83T
vishnupatekar [Sat, 28 Nov 2015 17:07:24 +0000 (01:07 +0800)]
sunxi: clk: add basic clocks for A83T

Add basic clocks pll1, pll5, and some default values from allwinner u-boot.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
[hdegoede@redhat.com] Fix PLL6 init to run at 600 MHz instead of 288 MHz,
fixing the mmc support not working
[hdegoede@redhat.com] Fix PLL init code to properly wait for the PLL-s to
stabilize, fixing cold-booting directly from sdcard not working
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: power: enabled support for axp818
vishnupatekar [Sat, 28 Nov 2015 17:07:22 +0000 (01:07 +0800)]
sunxi: power: enabled support for axp818

Enabled support for AXP818 in SPL and u-boot.
DCDC1, DCDC2, DCDC3 and DCSC5 are enabled.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: power: axp818: add support for axp818 driver
vishnupatekar [Sat, 28 Nov 2015 17:07:21 +0000 (01:07 +0800)]
sunxi: power: axp818: add support for axp818 driver

AXP818 is rsb based PMIC and used on Allwinner A83T H8 Homlet dev board.
It's registers are different and calculating reg config is different than
that of earlier axp power ICs.

DCDC1, DCDC2, DCDC3 and DCDC5 is implemented at the moment.
all other voltages can be added subsequently.
AXP datasheet is uploaded to wiki:
http://linux-sunxi.org/File:AXP818_datasheet_Revision1.0.pdf

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add support for UART0 in PB pin group on A83T
vishnupatekar [Sat, 28 Nov 2015 17:07:20 +0000 (01:07 +0800)]
sunxi: Add support for UART0 in PB pin group on A83T

On A83T, PB9,PB10 are UART0 pins.
On allwinner A83T Dev board(h8homlet), this uart0 serial connector
is exposed.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Add Machine Support for A83T SOC
vishnupatekar [Sat, 28 Nov 2015 17:07:19 +0000 (01:07 +0800)]
sunxi: Add Machine Support for A83T SOC

Allwinner A83T is octa-core cortex-a7 SOC.
This enables support for A83T.

SMP is not yet supported.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs
Hans de Goede [Fri, 20 Nov 2015 18:29:49 +0000 (19:29 +0100)]
sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs

According to the datasheets the max speed of AHB1 is 276 MHz, so
setting it to PLL6 / 3 which gives us 200MHz everywhere is fine,
and gives us a nice speed-up in certain workloads.

Suggested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tested-by: Chen-Yu Tsai <wens@csie.org>
8 years agox86: Remove HAVE_ACPI_RESUME
Bin Meng [Thu, 26 Nov 2015 01:46:09 +0000 (17:46 -0800)]
x86: Remove HAVE_ACPI_RESUME

These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: Remove CPU_INTEL_SOCKET_RPGA989
Bin Meng [Thu, 26 Nov 2015 01:46:08 +0000 (17:46 -0800)]
x86: Remove CPU_INTEL_SOCKET_RPGA989

This Kconfig option name indicates it has something to do with cpu
socket, however it is actually not the case. Remove it and move
options inside it to NORTHBRIDGE_INTEL_IVYBRIDGE.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: Clean up ivybridge/chrome Kconfig options
Bin Meng [Thu, 26 Nov 2015 01:46:07 +0000 (17:46 -0800)]
x86: Clean up ivybridge/chrome Kconfig options

There are some options which are never used, and also some options
which are selected by others but have never been a Kconfg option.
Clean these up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE
Bin Meng [Thu, 26 Nov 2015 01:46:06 +0000 (17:46 -0800)]
x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE

NORTHBRIDGE_INTEL_SANDYBRIDGE is for sandybridge, not ivybridge.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agocommon: Remove timer_init() call for x86
Bin Meng [Wed, 9 Dec 2015 01:31:40 +0000 (17:31 -0800)]
common: Remove timer_init() call for x86

With driver model timer support, there should not be an explict
call to timer_init(). Remove this call for x86.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agox86: Move i8254_init() to x86_cpu_init_f()
Bin Meng [Wed, 9 Dec 2015 01:31:39 +0000 (17:31 -0800)]
x86: Move i8254_init() to x86_cpu_init_f()

Right now i8254_init() is called from timer_init() in the tsc timer
driver. But actually i8254 and tsc are completely different things.
Since tsc timer has been converted to driver model, we should find
a new place that is appropriate for U-Boot to call i8254_init(),
which is now x86_cpu_init_f().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agox86: Fix PCI UART compatible string for crownbay and galileo
Bin Meng [Mon, 7 Dec 2015 13:28:13 +0000 (05:28 -0800)]
x86: Fix PCI UART compatible string for crownbay and galileo

With recent ns16550 driver changes, we only changed the legacy UART
(at I/O port 0x3f8) compatible string, but forgot to change the PCI
UART compatible string. Now fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Change OF_BAD_ADDR to FDT_ADDR_T_NONE
Bin Meng [Mon, 7 Dec 2015 09:39:47 +0000 (01:39 -0800)]
fdt: Change OF_BAD_ADDR to FDT_ADDR_T_NONE

Currently OF_BAD_ADDR is always -1ULL. When using OF_BAD_ADDR as the
return value of dev_get_addr(), it creates potential size mismatch
as dev_get_addr() uses FDT_ADDR_T_NONE as the return value which can
be either -1U or -1ULL depending on CONFIG_PHYS_64BIT. Now we change
OF_BAD_ADDR to FDT_ADDR_T_NONE to avoid such case.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
8 years agoaxs10x: add support of generic EHCI USB 2.0 controller
Alexey Brodkin [Mon, 30 Nov 2015 17:53:25 +0000 (20:53 +0300)]
axs10x: add support of generic EHCI USB 2.0 controller

This commit adds support of USB 2.0 storage media on AXS10x boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
8 years agoPrepare v2016.01-rc2 v2016.01-rc2
Tom Rini [Mon, 7 Dec 2015 19:23:45 +0000 (14:23 -0500)]
Prepare v2016.01-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agomkimage: Fix warning from fix for generating multi and script images again
Marek Vasut [Mon, 7 Dec 2015 17:01:54 +0000 (18:01 +0100)]
mkimage: Fix warning from fix for generating multi and script images again

Seems 6ae6e160 broke creating images in certain cases, there
are two problems with that patch.

First is that the expression "!x == 4 || !x == 6" is ambiguous.  The
intention here was "!(x == 4) || !(x == 6)" based on reading further in
the file, where this was borrowed from.  This however is interpreted by
gcc as "(!x) == 4 || (!x) == 6" and always false.  gcc-5.x will warn
about this case.

The second problem is that we do not want to test for the case of "(NOT x
is 4) OR (NOT x is 6)" but instead "(x is not equal to 4) AND (x is not
equal to 6)".  This is because in those two cases we already execute the
code question in another part of the file.  Rewrite the expression and
add parenthesis for clarity.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Philippe De Swert <philippedeswert@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
[trini: Re-word Marek's explanation]

8 years agoCONFIG_NEEDS_MANUAL_RELOC: Fix warnings when not set
Tom Rini [Mon, 7 Dec 2015 13:23:29 +0000 (08:23 -0500)]
CONFIG_NEEDS_MANUAL_RELOC: Fix warnings when not set

Now that we may compile (but not link) code calling fixup_cmdtable when
this is not set, we need to always have the declaration available.  We
should also make sure that anyone calling the function includes
<command.h> as that's where the function declaration is.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 7 Dec 2015 13:13:02 +0000 (08:13 -0500)]
Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze

8 years agodm: core: Enable SPL_SIMPLE_BUS by default
Michal Simek [Tue, 1 Dec 2015 07:37:16 +0000 (08:37 +0100)]
dm: core: Enable SPL_SIMPLE_BUS by default

This option is needed for all SoCs which have nodes on bus. Without
enabling this drivers are not found and probed.
Issue was found on Zynq MMC probe.
Enable this option by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agodm: cmd: Relocate subcommands when MANUAL_RELOC
Michal Simek [Fri, 4 Dec 2015 10:42:01 +0000 (11:42 +0100)]
dm: cmd: Relocate subcommands when MANUAL_RELOC

Subcommands contain pointers to functions which are not updated when
MANUAL_RELOC is enabled. This patch fix it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoi2c: cmd: Relocate subcommands when MANUAL_RELOC
Michal Simek [Fri, 4 Dec 2015 15:56:57 +0000 (16:56 +0100)]
i2c: cmd: Relocate subcommands when MANUAL_RELOC

Subcommands contain pointers to functions which are not updated when
MANUAL_RELOC is enabled. This patch fix it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoserial: zynq: Remove duplicated header
Michal Simek [Wed, 2 Dec 2015 11:57:11 +0000 (12:57 +0100)]
serial: zynq: Remove duplicated header

debug_uart.h is included twice.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoserial: zynq: Fix incorrect reference to s5p driver
Michal Simek [Tue, 1 Dec 2015 13:29:34 +0000 (14:29 +0100)]
serial: zynq: Fix incorrect reference to s5p driver

Remove this c&p error from s5p driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agozynq: sdhci: Move driver to DM
Michal Simek [Mon, 30 Nov 2015 15:13:03 +0000 (16:13 +0100)]
zynq: sdhci: Move driver to DM

Move driver to DM

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agozynq: sdhci: Remove zynq_sdhci_of_init()
Michal Simek [Mon, 30 Nov 2015 15:07:07 +0000 (16:07 +0100)]
zynq: sdhci: Remove zynq_sdhci_of_init()

Prepare for using DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: sdhci: Calculate minimum frequency based on max frequency
Siva Durga Prasad Paladugu [Wed, 25 Nov 2015 06:21:37 +0000 (11:51 +0530)]
zynq: sdhci: Calculate minimum frequency based on max frequency

Calculate the minimum sd clock based on max clock. This will
be done by add_sdhci() if we pass minimum clock as zero.
It also does based on SD host contoller version.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Remove unused SERIAL macros for serial_zynq
Michal Simek [Fri, 20 Nov 2015 09:11:03 +0000 (10:11 +0100)]
ARM: zynq: Remove unused SERIAL macros for serial_zynq

Remove unused macros when driver was moved to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Extend malloc size
Michal Simek [Tue, 1 Dec 2015 08:03:43 +0000 (09:03 +0100)]
ARM: zynq: Extend malloc size

SPL DM MMC FAT requires more malloc space(3k fat buffers + dm)
that it is available now. Extend SPL malloc space.

Current OCM layout:
0xffff0000 - 0xfff2000 - Full malloc space
0xffff2000 - 0xffff300 - Stack location
0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space
0xfffffd00 - sizeof(GD) - GD
0xfffffe00 - 0xffffffff - SoC specific boot code

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix location of stack and malloc areas
Michal Simek [Mon, 23 Nov 2015 15:27:38 +0000 (16:27 +0100)]
ARM: zynq: Fix location of stack and malloc areas

The patch
"board_init: Change the logic to setup malloc_base"
(sha1: 9ac4fc82071ce346e3885118242ff45d22f69b82)
breaks SPL for Zynq because it puts early alloc area on the stack which
caused that stack was decreased by CONFIG_SYS_MALLOC_F_LEN (0x400)
and there was not enough space for regular stack.

This patch changes memory layout to better utilize the last 64k OCM
block.
0xffff0000 - 0xfff1000 - Full malloc space
0xffff1000 - 0xffff300 - Stack location
0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space
0xfffffd00 - sizeof(GD) - GD
0xfffffe00 - 0xffffffff - SoC specific boot code

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Moritz Fischer <moritz.fischer@ettus.com>
8 years agoARM: zynq: Enable debug console for zc702
Michal Simek [Tue, 1 Dec 2015 07:41:17 +0000 (08:41 +0100)]
ARM: zynq: Enable debug console for zc702

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable FIT config option via Kconfig
Michal Simek [Fri, 20 Nov 2015 09:13:25 +0000 (10:13 +0100)]
ARM64: zynqmp: Enable FIT config option via Kconfig

Remove configuration options from board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Enable CTRL+C in wait_for_bit
Michal Simek [Thu, 24 Sep 2015 18:13:45 +0000 (20:13 +0200)]
net: gem: Enable CTRL+C in wait_for_bit

Enable to break waiting loop at any time.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: gem: Move gem to Kconfig
Michal Simek [Mon, 30 Nov 2015 13:34:52 +0000 (14:34 +0100)]
net: gem: Move gem to Kconfig

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agonet: gem: Read information about interface from DT
Michal Simek [Mon, 30 Nov 2015 13:17:50 +0000 (14:17 +0100)]
net: gem: Read information about interface from DT

Do not set interface via configs. Read information from DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agonet: gem: Move driver to DM
Michal Simek [Mon, 30 Nov 2015 13:14:56 +0000 (14:14 +0100)]
net: gem: Move driver to DM

- Enable DM_ETH by default for Zynq and ZynqMP
- Remove board_eth_init code
- Change miiphy_read function to return value instead of error code
  based on DM requirement
- Do not enable EMIO DT support by default

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agonet: gem: Fix miiphy_read name
Michal Simek [Mon, 30 Nov 2015 13:14:37 +0000 (14:14 +0100)]
net: gem: Fix miiphy_read name

Sync it with write function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agonet: gem: Remove zynq_gem_of_init()
Michal Simek [Mon, 30 Nov 2015 13:00:20 +0000 (14:00 +0100)]
net: gem: Remove zynq_gem_of_init()

This function was used for OF init before DM.
Remove this function as the part of move to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agonet: gem: Enable MDIO bus earlier
Michal Simek [Mon, 30 Nov 2015 12:58:36 +0000 (13:58 +0100)]
net: gem: Enable MDIO bus earlier

Enable access to MDIO before zynq_gem_init is called.
It enables read information about phy earlier.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Check if priv->phydev is valid
Michal Simek [Mon, 30 Nov 2015 13:03:37 +0000 (14:03 +0100)]
net: gem: Check if priv->phydev is valid

Check return value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agonet: gem: Extract phy init code
Michal Simek [Mon, 30 Nov 2015 12:54:43 +0000 (13:54 +0100)]
net: gem: Extract phy init code

Move phy init code out of zynq_gem_init. DM drivers are normally calling
this code from probe function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Remove phydev variable
Michal Simek [Mon, 30 Nov 2015 12:44:49 +0000 (13:44 +0100)]
net: gem: Remove phydev variable

Resort code to use priv->phydev variable directly.
It will simplify move to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Change mii function not to use eth_device structure
Michal Simek [Mon, 30 Nov 2015 09:24:15 +0000 (10:24 +0100)]
net: gem: Change mii function not to use eth_device structure

Next step to move driver to driver model. Do not use eth_device
structure. Use private structure instead.
Add iobase to private structure to store gem iobase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Change mdio_wait prototype to pass regs
Michal Simek [Mon, 30 Nov 2015 09:09:43 +0000 (10:09 +0100)]
net: gem: Change mdio_wait prototype to pass regs

Pass regs instead of dev because this will be chagned by
driver model.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Do not continue if phy is not found
Michal Simek [Mon, 30 Nov 2015 12:38:32 +0000 (13:38 +0100)]
net: gem: Do not continue if phy is not found

Add return value for phy detection algorithm to stop init function when
phy is not found.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agoARM: zynq: Remove CONFIG_API
Michal Simek [Mon, 30 Nov 2015 14:46:12 +0000 (15:46 +0100)]
ARM: zynq: Remove CONFIG_API

CONFIG_API is causing compilation error when DM_ETH is enabled because
eth_get_dev() is not available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agoARM: zynq: Remove PHYLIB from config to defconfig
Michal Simek [Mon, 30 Nov 2015 10:23:32 +0000 (11:23 +0100)]
ARM: zynq: Remove PHYLIB from config to defconfig

Move PHYLIB from board config to defconfig

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agoMerge git://git.denx.de/u-boot-nios
Tom Rini [Mon, 7 Dec 2015 02:53:18 +0000 (21:53 -0500)]
Merge git://git.denx.de/u-boot-nios

8 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Mon, 7 Dec 2015 02:52:40 +0000 (21:52 -0500)]
Merge git://git.denx.de/u-boot-usb

8 years agoarm: socfpga: Enable CONFIG_DM_MMC
Marek Vasut [Mon, 30 Nov 2015 19:40:07 +0000 (20:40 +0100)]
arm: socfpga: Enable CONFIG_DM_MMC

Enable driver model MMC support on SoCFPGA.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
8 years agommc: dwmmc: socfpga: Convert to DM
Marek Vasut [Mon, 30 Nov 2015 19:41:04 +0000 (20:41 +0100)]
mmc: dwmmc: socfpga: Convert to DM

Convert the SoCFPGA shim for registering the DWMMC driver to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
8 years agoarm: socfpga: Remove cpu_mmc_init()
Marek Vasut [Mon, 30 Nov 2015 19:38:45 +0000 (20:38 +0100)]
arm: socfpga: Remove cpu_mmc_init()

This function triggers the registration of the dwmmc driver on SoCFPGA,
but this is not needed in case the driver is correctly probed from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
8 years agoarm: socfpga: Add SoCFPGA SR1500 board
Stefan Roese [Wed, 18 Nov 2015 10:06:09 +0000 (11:06 +0100)]
arm: socfpga: Add SoCFPGA SR1500 board

The SR1500 board is a CycloneV based board, similar to the EBV
SoCrates, equipped with the following devices:

- SPI NOR
- eMMC
- Ethernet

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
8 years agousb: xhci: zynqmp: Removing unused function usb_phy_reset
Marek Vasut [Wed, 2 Dec 2015 14:28:26 +0000 (15:28 +0100)]
usb: xhci: zynqmp: Removing unused function usb_phy_reset

This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.

Signed-off-by: Marek Vasut <marex@denx.de>
8 years agousb: xhci: fsl: Removing unused function usb_phy_reset
Rajesh Bhagat [Wed, 2 Dec 2015 06:14:28 +0000 (11:44 +0530)]
usb: xhci: fsl: Removing unused function usb_phy_reset

This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
8 years agousb: xhci: dwc3: Adding reset delay requirement as per dwc3 databook
Rajesh Bhagat [Wed, 2 Dec 2015 06:14:27 +0000 (11:44 +0530)]
usb: xhci: dwc3: Adding reset delay requirement as per dwc3 databook

As per dwc3 databook, delay is required before taking the core out of reset.
This delay is required so that the PHY are stable, and then we can take core
out of reset.

Reference is taken from linux dwc3 code, file: drivers/usb/dwc3/core.c.

Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
8 years agousb: add support for generic EHCI devices
Alexey Brodkin [Wed, 2 Dec 2015 09:32:02 +0000 (12:32 +0300)]
usb: add support for generic EHCI devices

This driver is meant to be used with any EHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
8 years agosunxi: usb: Rename the sunxi usb driver DM entry
Marek Vasut [Mon, 30 Nov 2015 17:15:33 +0000 (18:15 +0100)]
sunxi: usb: Rename the sunxi usb driver DM entry

The DM entry should be unique, otherwise it will collide with other
drivers. Fix this by assigning the driver a more unique name than
usb_ehci.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Simon Glass <sjg@chromium.org>
8 years agousb: zynqmp: Fix build warnings
Marek Vasut [Mon, 30 Nov 2015 17:10:09 +0000 (18:10 +0100)]
usb: zynqmp: Fix build warnings

The driver does "return 0" in function with void type.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agodrivers:usb:fsl: Add T4080 as affected soc for Erratum A007792 sw workaround
Rajesh Bhagat [Mon, 30 Nov 2015 07:01:34 +0000 (12:31 +0530)]
drivers:usb:fsl: Add T4080 as affected soc for Erratum A007792 sw workaround

Apply Erratum A007792 sw workaround for T4080

Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
8 years agousb: dwc3: fix build warnings
Felipe Balbi [Thu, 1 Oct 2015 19:22:18 +0000 (14:22 -0500)]
usb: dwc3: fix build warnings

fix the following build warnings:

drivers/usb/dwc3/core.c: In function ‘dwc3_uboot_init’:
drivers/usb/dwc3/core.c:625:6: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized]
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
        ^
drivers/usb/dwc3/dwc3-omap.c: In function ‘dwc3_omap_uboot_init’:
drivers/usb/dwc3/dwc3-omap.c:380:7: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized]
omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);

Signed-off-by: Felipe Balbi <balbi@ti.com>
8 years agousb: host: xhci-omap: fix build break
Felipe Balbi [Thu, 1 Oct 2015 19:22:17 +0000 (14:22 -0500)]
usb: host: xhci-omap: fix build break

Fix the following build break:

drivers/usb/host/xhci-omap.c:35:5: error: ‘board_usb_init’ aliased to external symbol ‘__board_usb_init’
 int board_usb_init(int index, enum usb_init_type init)
      ^

Signed-off-by: Felipe Balbi <balbi@ti.com>
8 years agousb: zynqmp: Enable USB XHCI support
Siva Durga Prasad Paladugu [Mon, 16 Nov 2015 11:19:24 +0000 (16:49 +0530)]
usb: zynqmp: Enable USB XHCI support

Enable USB XHCI support for ZynqMP

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>