[PCS440EP] - Show on the DIAG LEDs, if the SHA1 check failed
- now the Flash ST M29W040B is supported (not tested)
- fix the "led" command
- fix compile error, if BUILD_DIR is used
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Update header file. Include dtimer_intr_setup(). Changed timer divider to global define.
Include immap.h and timer.h. Moved dtimer interrupt setup to dtimer_intr_setup() from cpu/mcf532x/interrupts.c. Changed (CFG_CLK /1000000) -1 << 8 to CFG_TIMER_PRESCALER
Create new header file and move peripherals base address from configs file to new header file.
Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
Stefan Roese [Wed, 4 Jul 2007 08:06:30 +0000 (10:06 +0200)]
ppc4xx: Update lwmon5 board
- Add optional ECC generation routine to preserve existing
RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added
Stefan Roese [Mon, 25 Jun 2007 13:57:39 +0000 (15:57 +0200)]
ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Matthias Fuchs [Sun, 24 Jun 2007 15:23:41 +0000 (17:23 +0200)]
ppc4xx: Add pci_pre_init() for 405 boards
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.
This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.
Igor Lisitsin [Wed, 18 Apr 2007 10:55:19 +0000 (14:55 +0400)]
Adapt log buffer code to support Linux 2.6
A new environment variable, "logversion", selects the log buffer
behaviour. If it is not set or set to a value other than 2, then the
old, Linux 2.4.4, behaviour is selected.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
Heiko Schocher [Fri, 22 Jun 2007 17:11:54 +0000 (19:11 +0200)]
[PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Stefan Roese [Fri, 22 Jun 2007 14:58:40 +0000 (16:58 +0200)]
ppc4xx: Fix problem with extended program_tlb() funtion
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.
Stefan Roese [Tue, 19 Jun 2007 15:22:44 +0000 (17:22 +0200)]
ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval board
This patch adds a board command to configure the I2C bootstrap EEPROM
values. Right now 533 and 667MHz are supported for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 533 nor ;to configure the board for 533MHz NOR booting
=> bootstrap 667 nand ;to configure the board for 667MHz NNAND booting
Stefan Roese [Tue, 19 Jun 2007 14:42:31 +0000 (16:42 +0200)]
[ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.
Stefan Roese [Thu, 14 Jun 2007 09:14:32 +0000 (11:14 +0200)]
[ppc4xx] Extend program_tlb() with virtual & physical addresses
Now program_tlb() allows to program a TLB (or multiple) with
different virtual and physical addresses. With this change, now one
physical region (e.g. SDRAM) can be mapped 2 times, once with caches
diabled and once with caches enabled.
Stefan Roese [Wed, 6 Jun 2007 09:42:13 +0000 (11:42 +0200)]
ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval board
This patch adds NAND booting support for the AMCC Acadia eval board.
Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.
I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 267 nor ;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
Ed Swarthout [Tue, 5 Jun 2007 17:30:52 +0000 (12:30 -0500)]
mpc8641 image size cleanup
e600 does not have a bootpg restriction.
Move the version string to beginning of image at fff00000.
Resetvec.S is not needed.
Update flash copy instructions.
Add tftpflash env variable
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
Stefan Roese [Fri, 1 Jun 2007 13:58:19 +0000 (15:58 +0200)]
ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHz
This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
suggested by AMCC it is not recommended to dynamically change the EBC
speed after bootup. So we undo this change to be on the safe side.
Stefan Roese [Fri, 1 Jun 2007 13:27:11 +0000 (15:27 +0200)]
ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval board
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.
Stefan Roese [Fri, 1 Jun 2007 13:15:12 +0000 (15:15 +0200)]
NAND: Add hardware ECC support to the PPC4xx NAND driver ndfc.c
This patch adds hardware ECC support to the NDFC driver. It also
changes the register access from using the "simple" in32/out32
functions to the in_be32/out_be32 functions, which make sure
that the access is correctly synced. This is the only recommended
access to SoC registers in the current Linux kernel.
projects / u-boot / log