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6 years agopinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Marek Vasut [Wed, 17 Jan 2018 16:14:45 +0000 (17:14 +0100)]
pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables

Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agopinctrl: rmobile: Import R8A7790 H2 PFC tables
Marek Vasut [Wed, 17 Jan 2018 21:18:59 +0000 (22:18 +0100)]
pinctrl: rmobile: Import R8A7790 H2 PFC tables

Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Import R8A7794 E2 clock tables
Marek Vasut [Wed, 17 Jan 2018 22:39:57 +0000 (23:39 +0100)]
clk: renesas: Import R8A7794 E2 clock tables

Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Import R8A7792 V2H clock tables
Marek Vasut [Wed, 17 Jan 2018 22:39:10 +0000 (23:39 +0100)]
clk: renesas: Import R8A7792 V2H clock tables

Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Import R8A7791/R8A7793 M2 clock tables
Marek Vasut [Mon, 8 Jan 2018 15:38:51 +0000 (16:38 +0100)]
clk: renesas: Import R8A7791/R8A7793 M2 clock tables

Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Import R8A7790 H2 clock tables
Marek Vasut [Wed, 17 Jan 2018 22:14:25 +0000 (23:14 +0100)]
clk: renesas: Import R8A7790 H2 clock tables

Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Add Gen2 clock core
Marek Vasut [Mon, 8 Jan 2018 15:38:51 +0000 (16:38 +0100)]
clk: renesas: Add Gen2 clock core

Add common clock code for Renesas RCar Gen2 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Add DIV6P1 clock type
Marek Vasut [Wed, 17 Jan 2018 23:05:28 +0000 (00:05 +0100)]
clk: renesas: Add DIV6P1 clock type

Add macros for the DIV6P1 clock type, which is used on Gen2
and optionally also on Gen3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Split out code shared between Gen2 and Gen3
Marek Vasut [Mon, 15 Jan 2018 15:44:39 +0000 (16:44 +0100)]
clk: renesas: Split out code shared between Gen2 and Gen3

Pull code which is common for RCar Gen2 and RCar Gen3 into
separate source file. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Make clock tables Kconfig configurable
Marek Vasut [Mon, 8 Jan 2018 15:32:38 +0000 (16:32 +0100)]
clk: renesas: Make clock tables Kconfig configurable

Add Kconfig entries for each SoC clock table, so they can be
compiled in or out at build time. This can reduce the size of
the binary if desired.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Split SMSTPCR and RMSTPCR tables
Marek Vasut [Sun, 14 Jan 2018 23:58:35 +0000 (00:58 +0100)]
clk: renesas: Split SMSTPCR and RMSTPCR tables

The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Pull Gen3 specific bits into separate header
Marek Vasut [Mon, 8 Jan 2018 16:09:45 +0000 (17:09 +0100)]
clk: renesas: Pull Gen3 specific bits into separate header

Extract the macros specific to Gen3 clock into a separate header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Make PLL configurations per-SoC
Marek Vasut [Tue, 16 Jan 2018 18:23:17 +0000 (19:23 +0100)]
clk: renesas: Make PLL configurations per-SoC

Not all SoCs have the same PLL configuration options,
so make those PLL configuraion tables per-SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Make clk_ids per-driver
Marek Vasut [Mon, 8 Jan 2018 15:05:28 +0000 (16:05 +0100)]
clk: renesas: Make clk_ids per-driver

Not all drivers use the same IDs, so make those IDs per-driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: renesas: Split RCar Gen3 driver
Marek Vasut [Mon, 8 Jan 2018 13:01:40 +0000 (14:01 +0100)]
clk: renesas: Split RCar Gen3 driver

Split the massive driver into smaller per-SoC drivers and pull the
common code into a separate file. This would allow configuring out
unnecessary clock drivers once the Kconfig changes are in and also
allow adding more clock tables easily.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoserial: sh: Add support for R7S72100 (RZ/A1)
Chris Brandt [Wed, 17 Jan 2018 01:52:18 +0000 (20:52 -0500)]
serial: sh: Add support for R7S72100 (RZ/A1)

Add support for RZ/A1 series SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
6 years agoserial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Marek Vasut [Mon, 22 Jan 2018 00:43:25 +0000 (01:43 +0100)]
serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2

Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoserial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()
Marek Vasut [Wed, 17 Jan 2018 21:36:37 +0000 (22:36 +0100)]
serial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()

Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is
the current recommended practice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Convert CONFIG_R8A77xx to Kconfig
Marek Vasut [Sun, 7 Jan 2018 18:37:06 +0000 (19:37 +0100)]
ARM: rmobile: Convert CONFIG_R8A77xx to Kconfig

Convert these configuration options to Kconfig, update board defconfigs
and drop them from whitelist.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: dts: rmobile: Factor out U-Boot extras
Marek Vasut [Wed, 10 Jan 2018 10:47:03 +0000 (11:47 +0100)]
ARM: dts: rmobile: Factor out U-Boot extras

Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: dts: rmobile: Update DTS to match Linux 4.14
Marek Vasut [Wed, 29 Nov 2017 03:27:36 +0000 (04:27 +0100)]
ARM: dts: rmobile: Update DTS to match Linux 4.14

Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoMerge git://git.denx.de/u-boot-mmc
Tom Rini [Wed, 24 Jan 2018 16:28:44 +0000 (11:28 -0500)]
Merge git://git.denx.de/u-boot-mmc

6 years agommc: Poll for broken card detection case
Jun Nie [Tue, 2 Jan 2018 04:25:57 +0000 (12:25 +0800)]
mmc: Poll for broken card detection case

Poll for broken card detection case instead of return
no card detected.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
6 years agommc: fix to assign to correct clock value when clock is enabling
Jaehoon Chung [Tue, 23 Jan 2018 05:04:30 +0000 (14:04 +0900)]
mmc: fix to assign to correct clock value when clock is enabling

When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.

Fixes: 9546eb92cb6 ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
6 years agoconfigs: odroid-xu3: enable the configs relevant to regulator
Jaehoon Chung [Tue, 16 Jan 2018 06:33:52 +0000 (15:33 +0900)]
configs: odroid-xu3: enable the configs relevant to regulator

Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
6 years agopower: pmic: s2mps11: probe the regulator driver
Jaehoon Chung [Tue, 16 Jan 2018 06:33:51 +0000 (15:33 +0900)]
power: pmic: s2mps11: probe the regulator driver

Add the probe function to support the s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
6 years agopower: regulator: s2mps11: add a regulator driver for s2mps11
Jaehoon Chung [Tue, 16 Jan 2018 06:33:50 +0000 (15:33 +0900)]
power: regulator: s2mps11: add a regulator driver for s2mps11

exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
6 years agospi: cadence_qspi_apb: Make flash writes 32 bit aligned
Vignesh R [Wed, 24 Jan 2018 05:14:07 +0000 (10:44 +0530)]
spi: cadence_qspi_apb: Make flash writes 32 bit aligned

Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.

[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoRevert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
Vignesh R [Wed, 24 Jan 2018 05:14:06 +0000 (10:44 +0530)]
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"

This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.

Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoRevert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
Goldschmidt Simon [Wed, 24 Jan 2018 05:14:05 +0000 (10:44 +0530)]
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"

This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodts: cadence_spi: Update documentation for DT bindings
Jason Rush [Tue, 23 Jan 2018 23:13:12 +0000 (17:13 -0600)]
dts: cadence_spi: Update documentation for DT bindings

Update documentation to reflect adopting the Linux DT bindings.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agoconfig: cadence_spi: Remove defines read from DT
Jason Rush [Tue, 23 Jan 2018 23:13:11 +0000 (17:13 -0600)]
config: cadence_spi: Remove defines read from DT

Cleanup unused #define values that are read from the DT.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agodts: cadence_spi: Sync DT bindings with Linux
Jason Rush [Tue, 23 Jan 2018 23:13:10 +0000 (17:13 -0600)]
dts: cadence_spi: Sync DT bindings with Linux

Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agospi: cadence_spi: Sync DT bindings with Linux
Jason Rush [Tue, 23 Jan 2018 23:13:09 +0000 (17:13 -0600)]
spi: cadence_spi: Sync DT bindings with Linux

Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agospi: kirkwood_spi: implement workaround for FE-9144572
Chris Packham [Mon, 22 Jan 2018 09:44:20 +0000 (22:44 +1300)]
spi: kirkwood_spi: implement workaround for FE-9144572

Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz.  However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.

Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosf_probe: Merge spi_flash_probe_tail into spi_flash_probe
Mario Six [Mon, 15 Jan 2018 10:08:42 +0000 (11:08 +0100)]
sf_probe: Merge spi_flash_probe_tail into spi_flash_probe

spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: spi-uclass: Fix style violations
Mario Six [Mon, 15 Jan 2018 10:08:41 +0000 (11:08 +0100)]
spi: spi-uclass: Fix style violations

Remove a superfluous newline, and reduce the scope of a variable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: sf_probe: Fix style violations
Mario Six [Mon, 15 Jan 2018 10:08:40 +0000 (11:08 +0100)]
spi: sf_probe: Fix style violations

Fix two indention-related style violations.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: Remove CONFIG_OF_SPI_FLASH
Mario Six [Mon, 15 Jan 2018 10:08:39 +0000 (11:08 +0100)]
spi: Remove CONFIG_OF_SPI_FLASH

Previous patches removed the last usages of this config variable, so
that it is now obsolete.

This patch removes it from the whitelist.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: Remove spi_setup_slave_fdt
Mario Six [Mon, 15 Jan 2018 10:08:38 +0000 (11:08 +0100)]
spi: Remove spi_setup_slave_fdt

A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: Remove spi_flash_probe_fdt
Mario Six [Mon, 15 Jan 2018 10:08:37 +0000 (11:08 +0100)]
spi: Remove spi_flash_probe_fdt

Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: Remove obsolete spi_base_setup_slave_fdt
Mario Six [Mon, 15 Jan 2018 10:08:36 +0000 (11:08 +0100)]
spi: Remove obsolete spi_base_setup_slave_fdt

0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.

But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.

Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agospi: Fix style violation and improve code
Mario Six [Mon, 15 Jan 2018 10:08:35 +0000 (11:08 +0100)]
spi: Fix style violation and improve code

This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomips: bmips: enable the SPI flash on the Comtrend AR-5387un
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:41 +0000 (02:13 +0100)]
mips: bmips: enable the SPI flash on the Comtrend AR-5387un

It's a Macronix (mx25l12805d) 16 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomips: bmips: add bcm63xx-hsspi driver support for BCM63268
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:40 +0000 (02:13 +0100)]
mips: bmips: add bcm63xx-hsspi driver support for BCM63268

This driver manages the high speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomips: bmips: add bcm63xx-hsspi driver support for BCM6328
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:39 +0000 (02:13 +0100)]
mips: bmips: add bcm63xx-hsspi driver support for BCM6328

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodm: spi: add BCM63xx HSSPI driver
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:38 +0000 (02:13 +0100)]
dm: spi: add BCM63xx HSSPI driver

This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agomips: bmips: enable the SPI flash on the Netgear CG3100D
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:05 +0000 (17:15 +0100)]
mips: bmips: enable the SPI flash on the Netgear CG3100D

It's a Spansion (s25fl064a) 8 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: enable the SPI flash on the Sagem F@ST1704
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:04 +0000 (17:15 +0100)]
mips: bmips: enable the SPI flash on the Sagem F@ST1704

It's a Winbond (w25x32) 4 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: add bcm63xx-spi driver support for BCM63268
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:03 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM63268

This driver manages the low speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: add bcm63xx-spi driver support for BCM3380
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:02 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM3380

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: add bcm63xx-spi driver support for BCM6358
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:01 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6358

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: add bcm63xx-spi driver support for BCM6348
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:00 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6348

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomips: bmips: add bcm63xx-spi driver support for BCM6338
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:59 +0000 (17:14 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6338

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: spi: add BCM63xx SPI driver
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:58 +0000 (17:14 +0100)]
dm: spi: add BCM63xx SPI driver

This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodrivers: spi: consider command bytes when sending transfers
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:57 +0000 (17:14 +0100)]
drivers: spi: consider command bytes when sending transfers

Command bytes are part of the written bytes and they should be taken into
account when sending a spi transfer.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodrivers: spi: allow limiting reads
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:56 +0000 (17:14 +0100)]
drivers: spi: allow limiting reads

For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agowait_bit: use wait_for_bit_le32 and remove wait_for_bit
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:55 +0000 (17:14 +0100)]
wait_bit: use wait_for_bit_le32 and remove wait_for_bit

wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agowait_bit: add 8/16/32 BE/LE versions of wait_for_bit
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:54 +0000 (17:14 +0100)]
wait_bit: add 8/16/32 BE/LE versions of wait_for_bit

Add 8/16/32 bits and BE/LE versions of wait_for_bit.
This is needed for reading registers that are not aligned to 32 bits, and for
Big Endian platforms.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 24 Jan 2018 02:48:53 +0000 (21:48 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agocommon/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFO
Angelo Dureghello [Sat, 19 Aug 2017 22:01:55 +0000 (00:01 +0200)]
common/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFO

Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes for v2:
   - update common/Kconfig to add M68K to the default y list

6 years agoarmv8: ls1088a: Add IFC and eMMC as qixis boot sources
Ashish Kumar [Wed, 17 Jan 2018 06:46:37 +0000 (12:16 +0530)]
armv8: ls1088a: Add IFC and eMMC as qixis boot sources

Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC,
QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for
qixis commands.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Modify subject and add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agofsl: common: qixis: Add ifc and emmc switching via qixis
Ashish Kumar [Wed, 17 Jan 2018 06:46:36 +0000 (12:16 +0530)]
fsl: common: qixis: Add ifc and emmc switching via qixis

Currently only SD, NAND can be secondary boot sources controlled
by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR
can be secondary boot source, while QSPI-NOR is the primary.
Add options in qixis to switch to other boot sources including
ifc and emmc.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agocrypto/fsl: Fix HW accelerated hash commands
Breno Lima [Wed, 17 Jan 2018 12:03:45 +0000 (10:03 -0200)]
crypto/fsl: Fix HW accelerated hash commands

The hash command function were not flushing the dcache before passing data
to CAAM/DMA and not invalidating the dcache when getting data back.

Due the data cache incoherency, HW accelerated hash commands used to fail
with CAAM errors like "Invalid KEY Command".

Check if pbuf and pout buffers are properly aligned to the cache line size
and flush/invalidate the memory regions to address this issue.

This solution is based in a previous work from Clemens Gruber in
commit 598e9dccc75d ("crypto/fsl: fix BLOB encapsulation and
decapsulation")

Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoARM: dts: Freescale: re-license device tree files under GPLv2+/X11
Pankaj Bansal [Thu, 18 Jan 2018 04:13:33 +0000 (09:43 +0530)]
ARM: dts: Freescale: re-license device tree files under GPLv2+/X11

The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.

To make it easier to reuse them, re-license the the device trees for
Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license.

Same trend is followed in linux.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: vid: Compiling VID specific functions for SPL
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:10 +0000 (16:13 +0530)]
armv8: ls1088a: vid: Compiling VID specific functions for SPL

Enables and compiles VID specific functions for SPL.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agols1088a: Add VID support for QDS and RDB platforms
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:09 +0000 (16:13 +0530)]
ls1088a: Add VID support for QDS and RDB platforms

This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agocommon: board_f: vid: Add VID specific API to adjust core voltage
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:08 +0000 (16:13 +0530)]
common: board_f: vid: Add VID specific API to adjust core voltage

Adds a VID specific API in init_sequence_f and spl code flow
namely init_func_vid which is required to adjust core voltage.

VID specific code is required in spl, hence moving flag CONFIG_VID
out of spl flags.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agols1088a: ddr: configure DDR for 0.9v for VID support
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:07 +0000 (16:13 +0530)]
ls1088a: ddr: configure DDR for 0.9v for VID support

When VID feature is supported, check the contents of fuse register
and configure DDR operate at 0.9v.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:06 +0000 (16:13 +0530)]
ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs

Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: common: vid: Add support for LTC3882 voltage regulator chip
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:05 +0000 (16:13 +0530)]
board: common: vid: Add support for LTC3882 voltage regulator chip

Restructures common driver to support LTC3882 voltage regulator
chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoKconfig: Add LTC3882 voltage regulator config
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:04 +0000 (16:13 +0530)]
Kconfig: Add LTC3882 voltage regulator config

Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: common: vid: Move IR chip specific code in flag
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:03 +0000 (16:13 +0530)]
board: common: vid: Move IR chip specific code in flag

Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: common: vid: Add board specific vdd adjust API
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:02 +0000 (16:13 +0530)]
board: common: vid: Add board specific vdd adjust API

Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: common:vid: Add LS1088A VID Supported voltage values
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:01 +0000 (16:13 +0530)]
board: common:vid: Add LS1088A VID Supported voltage values

Adds below voltage values supported by LS1088A Soc:
1.025V(default), 0.9875V, 0.9750V, 0.9V, 1.0V, 1.0125V, 1.0250V.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: lsch3: Add serdes and DDR voltage setup
Rajesh Bhagat [Wed, 17 Jan 2018 10:43:00 +0000 (16:13 +0530)]
armv8: lsch3: Add serdes and DDR voltage setup

Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Tue, 23 Jan 2018 12:59:43 +0000 (07:59 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-01-23

This time around we have a lot of EFI patches from Heinrich.
Highlights are:

  - Allow EFI applications to register as drivers
  - Allow exposure of U-Boot block devices from an EFI payload
  - Compatibility improvements

6 years agoRevert "travis-ci: Add qemu-x86_64 target"
Tom Rini [Tue, 23 Jan 2018 02:06:41 +0000 (21:06 -0500)]
Revert "travis-ci: Add qemu-x86_64 target"

This reverts commit 998ae28799c79c6bc796aea182ae6acf13d18284.

This continues to fail in travis itself, so remove for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoConvert CONFIG_SOC_DA8XX et al to Kconfig
Adam Ford [Thu, 11 Jan 2018 14:20:27 +0000 (08:20 -0600)]
Convert CONFIG_SOC_DA8XX et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SOC_DA8XX
   CONFIG_SOC_DA850
   CONFIG_DA850_LOWLEVEL
   CONFIG_MACH_DAVINCI_DA850_EVM
   CONFIG_SYS_DA850_PLL_INIT
   CONFIG_SYS_DA850_DDR_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: David Lechner <david@lechnology.com>
[trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoefi_selftest: reduce noise in test output for device trees
Heinrich Schuchardt [Sat, 20 Jan 2018 19:44:10 +0000 (20:44 +0100)]
efi_selftest: reduce noise in test output for device trees

Some messages are only useful if an error occurs.
Fix a use after free.
Add a missing free.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: allow creation of more device part nodes
Heinrich Schuchardt [Sat, 20 Jan 2018 20:02:18 +0000 (21:02 +0100)]
efi_loader: allow creation of more device part nodes

Create device path nodes for UCLASS_ETH udevices.
Create device path nodes of block device children of UCLASS_MMC udevices.
Consistently use debug for unsupported nodes.
Set the log level to error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Fix build failure by adding #ifdef CONFIG_DM_ETH]
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_selftest: provide a test for block io
Heinrich Schuchardt [Sun, 21 Jan 2018 18:29:31 +0000 (19:29 +0100)]
efi_selftest: provide a test for block io

This test checks the driver for block IO devices.
A disk image is created in memory.
A handle is created for the new block IO device.
The block I/O protocol is installed on the handle.
ConnectController is used to setup partitions and to install the simple
file protocol.
A known file is read from the file system and verified.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_driver: EFI block driver
Heinrich Schuchardt [Sun, 21 Jan 2018 18:29:30 +0000 (19:29 +0100)]
efi_driver: EFI block driver

This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices

For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol

The uclass provides the bind, start, and stop entry points for the driver
binding protocol.

In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.

The EFI block driver binds to controllers implementing the block io
protocol.

When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.

The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.

A usage example is as following:

U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.

Now the EFI block driver installs the partitions with the simple file
protocol.

iPXE uses the simple file protocol to load Grub or the Linux Kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: add comment on calloc len]
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_selftest: add missing LF in test output
Heinrich Schuchardt [Sun, 21 Jan 2018 20:30:57 +0000 (20:30 +0000)]
efi_selftest: add missing LF in test output

The output of the minicapps lacks a line feed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: store DT in EFI_RUNTIME_SERVICES_DATA memory
Heinrich Schuchardt [Thu, 18 Jan 2018 22:21:22 +0000 (23:21 +0100)]
efi_loader: store DT in EFI_RUNTIME_SERVICES_DATA memory

The device tree is needed at runtime. So we have to store it in
EFI_RUNTIME_SERVICES_DATA memory.

The UEFI spec recommends to store all configuration tables in
EFI_RUNTIME_SERVICES_DATA memory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_selftest: test start image
Heinrich Schuchardt [Fri, 19 Jan 2018 18:01:05 +0000 (19:01 +0100)]
efi_selftest: test start image

This pair of tests checks the StartImage boot service.

Each test loads an EFI application into memory and starts it.
One returns by calling the Exit boot service. The other returns directly.

The tests are not built on x86_64 because the relocation code for the efi
binary cannot be created.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: fix ExitBootServices
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:52 +0000 (20:24 +0100)]
efi_loader: fix ExitBootServices

This patch lets the implementation of ExitBootServices conform to
the UEFI standard.

The timer events must be disabled before calling the notification
functions of the exit boot services events.

The boot services must be disabled in the system table.

The handles in the system table should be defined as efi_handle_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: add check_tpl parameter to efi_signal_event
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:51 +0000 (20:24 +0100)]
efi_loader: add check_tpl parameter to efi_signal_event

In ExitBootServices we need to signal events irrespective of the current
TPL level. A new parameter check_tpl is added to efi_signal_event().

Function efi_console_timer_notify() gets some comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: provide function to get last node of a device path
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:49 +0000 (20:24 +0100)]
efi_loader: provide function to get last node of a device path

On a block device and its partitions the same protocols can be
installed. To tell the apart we can use the type of the last
node of the device path which is not the end node.

The patch provides a utility function to find this last node.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:48 +0000 (20:24 +0100)]
efi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions

Add the revision constants.
Depending on the revision additional fields are needed in the
media descriptor.
Use efi_uintn_t for number of bytes to read or write.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: make efi_disk_create_partitions a global symbol
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:47 +0000 (20:24 +0100)]
efi_loader: make efi_disk_create_partitions a global symbol

Up to now we have been using efi_disk_create_partitions() to create
partitions for block devices that existed before starting an EFI
application.

We need to call it for block devices created by EFI
applications at run time. The EFI application will define the
handle for the block device and install a device path protocol
on it. We have to use this device path as stem for the partition
device paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: provide a function to create a partition node
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:46 +0000 (20:24 +0100)]
efi_loader: provide a function to create a partition node

Provide new function efi_dp_part_node() to create a device
node for a partition.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: make efi_block_io_guid a global symbol
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:45 +0000 (20:24 +0100)]
efi_loader: make efi_block_io_guid a global symbol

The GUID of the EFI_BLOCK_IO_PROTOCOL is needed in different code
parts. To avoid duplication make efi_block_io_guid a global symbol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: efi_disk_register: correctly determine if_type_name
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:44 +0000 (20:24 +0100)]
efi_loader: efi_disk_register: correctly determine if_type_name

The interface type name can be used to look up the interface type.
Don't confound it with the driver name which may be different.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: fix StartImage bootservice
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:43 +0000 (20:24 +0100)]
efi_loader: fix StartImage bootservice

The calling convention for the entry point of an EFI image
is always 'asmlinkage'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: check tables in helloworld.efi
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:42 +0000 (20:24 +0100)]
efi_loader: check tables in helloworld.efi

Check if the device tree and the SMBIOS table are available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: allocate correct memory type for EFI image
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:41 +0000 (20:24 +0100)]
efi_loader: allocate correct memory type for EFI image

The category of memory allocated for an EFI image should depend on
its type (application, bootime service driver, runtime service driver).

Our helloworld.efi built on arm64 has an illegal image type. Treat it
like an EFI application.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: print device path when entering efi_load_image
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:40 +0000 (20:24 +0100)]
efi_loader: print device path when entering efi_load_image

Use %pD to print the device path instead of its address when
entering efi_load_image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: correct find simple file system protocol
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:39 +0000 (20:24 +0100)]
efi_loader: correct find simple file system protocol

In contrast to the description the code did not split the device
path into device part and file part.

The code should use the installed protocol and not refer to the
internal structure of the the disk object.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: address of the simple file system protocol
Heinrich Schuchardt [Fri, 19 Jan 2018 19:24:38 +0000 (20:24 +0100)]
efi_loader: address of the simple file system protocol

When installing the the simple file system protocol we have to path
the address of the structure and not the address of a pointer to the
structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>