Nick Thompson [Tue, 22 Jun 2010 15:06:01 +0000 (11:06 -0400)]
Davinci: SPI performance enhancements
The following restructuring and optimisations increase the SPI
read performance from 1.3MiB/s (on da850) to 2.87MiB/s (on da830):
Remove continual revaluation of driver state from the core of the
copy loop. State can not change during the copy loop, so it is
possible to move these evaluations to before the copy loop.
Cost is more code space as loop variants are required for each set
of possible configurations. The loops are simpler however, so the
extra is only 128bytes on da830 with CONFIG_SPI_HALF_DUPLEX
defined.
Unrolling the first copy loop iteration allows the TX buffer to be
pre-loaded reducing SPI clock starvation.
Unrolling the last copy loop iteration removes testing for the
final loop iteration every time round the loop.
Using the RX buffer empty flag as a transfer throttle allows the
assumption that it is always safe to write to the TX buffer, so
polling of TX buffer full flag can be removed.
Signed-off-by: Nick Thompson <nick.thompson@ge.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Prakash PM [Tue, 22 Jun 2010 14:24:43 +0000 (10:24 -0400)]
DaVinci: EMAC: Get EMAC_MDIO_PHY_NUM from config files
Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h.
Because of this, EMAC does not work on EVMs which do not have phy
connected at 1. Moving the macro to board config file makes this
configurable depending on where the phy is connected on the MDIO bus.
This patch fixes the board reset issue observed during network access
on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1
but it is 0 on DM365EVM.
This patch is verified on da830/omap-l137, dm365 and dm644x evms.
Wolfgang Denk [Thu, 17 Jun 2010 19:59:57 +0000 (21:59 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ti
Conflicts:
CONFLICT (rename/add): Rename
board/davinci/da830evm/Makefile->board/ti/tnetv107xevm/Makefile
in 89b765c7f6ddfde07ba673dd4adbeb5da391a81b.
board/ti/tnetv107xevm/Makefile added in HEAD
But files were identical, so no problem.
Albert Aribaud [Thu, 17 Jun 2010 14:06:07 +0000 (19:36 +0530)]
Initial support for Marvell Orion5x SoC
This patch adds support for the Marvell Orion5x SoC.
It has no use alone, and must be followed by a patch
to add Orion5x support for serial, then support for
the ED Mini V2, an Orion5x-based product from LaCie.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
For boards using sm501/sm502 on PCI bus some driver
functions normaly defined in the board code are not
needed and empty. Provide weak default functions for
them and do not enforce board code to define empty
functions.
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.
Wolfgang Denk [Thu, 27 May 2010 21:18:36 +0000 (23:18 +0200)]
Makefile/mkconfig: read simple board configurations from boards.cfg
Instead of adding explicit build rules for each and every board to the
top level Makefile (which makes it grow and grow), we now provide a
simple default rule and extend the "mkconfig" script to read board
configurations from a plain text file (table), "boards.cfg".
For simple boards it is now sufficient to add a single line of text to
the "boards.cfg" file, no changes to the top level Makefile are needed
any more.
To make the table better readable, change the notation for unused
fields from "NULL" into "-".
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Thu, 27 May 2010 21:18:35 +0000 (23:18 +0200)]
Makefile: simplify handling of common board configurations
Many boards don't need any special handling in the Makefile. Try and
provide as generic make rules for these as possible. There are still
many areas where this does not work out really well, but the changes
show the direction we should take, and point out which boards or
architectures need further cleanup.
Wolfgang Denk [Thu, 27 May 2010 21:18:33 +0000 (23:18 +0200)]
Fix printing of make targets, simplify Makefile
Make printing the "board names" more useful. So far, we would get
output like this;
$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P1_P2_RDB board...
text data bss dec hex filename
342612 32656 265212 640480 9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
343160 32704 265212 641076 9c834 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
For all build targets the same board name would be printed, which
makes is often pretty difficult to find out which exact build target
caused problems. With this commit, the real make target name gets
printed instead, which is way more useful:
$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P2020RDB board...
text data bss dec hex filename
342612 32656 265212 640480 9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_NAND board...
text data bss dec hex filename
343160 32704 265212 641076 9c834 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SDCARD board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SPIFLASH board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Tested-by: Thomas Chou <thomas@wytron.com.tw>
Marek Vasut [Mon, 5 Apr 2010 00:28:14 +0000 (02:28 +0200)]
PXA: PXAMMC: Drop different delays for PXA27X
In case the delays were set to 10000, the MMC card on PXA27X boards (and PXA3xx
boards) didn't initialize on first try. Increasing the delays and leaving just
those for PXA25x and 26x (that is 200000) fixes this problem.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sun, 11 Apr 2010 06:53:55 +0000 (08:53 +0200)]
PXA: Align stack to 8 bytes
Part of this patch is by: Mikhail Kshevetskiy.
Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
is undefined.
The issue was observed when working with the NAND code, which was rendered
disfunctional. Also, the vsprintf() function had serious problems with printing
64bit wide long longs. After aligning the stack, this wrong behaviour is no
longer present.
DA850/OMAP-L138 is a new SoC from Texas Instruments
(http://focus.ti.com/docs/prod/folders/print/omap-l138.html).
This SoC is similar to DA830/OMAP-L137 in many aspects. Hence
rename the da830 specific files and folders to da8xx to
accommodate DA850/OMAP-L138.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Ben Gardiner <bengardiner@nanometrics.ca> Reviewed-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TI's DA850/OMAP-L138 platform is similar to DA830/OMAP-L137
in many aspects. So instead of repeating the same code in
multiple files, move the common code to a different file
and call those functions from the respective da830/da850
files.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Nick Thompson <nick.thompson@ge.com> Acked-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Pandora has a capacitor connected as backup battery, which allows
retaining RTC for some time while main battery is removed. Enable backup
battery charge function to charge that capacitor.
Delio Brignoli [Mon, 7 Jun 2010 21:16:13 +0000 (17:16 -0400)]
DaVinci: Improve DaVinci SPI speed.
I have updated this patch based on the comments [1] by Wolfgang Denk and
removed unused variables.
[1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
Remove unused variables in the spi_xfer() function.
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Delio Brignoli [Mon, 7 Jun 2010 21:16:13 +0000 (17:16 -0400)]
DaVinci: Improve DaVinci SPI speed.
I have updated this patch based on the comments [1] by Wolfgang Denk and
removed unused variables.
[1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
Remove unused variables in the spi_xfer() function.
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Add the new board PM9G45 from Ronetix GmbH.
* AT91SAM9G45 MCU at 400Mhz.
* 128MB DDR2 SDRAM
* 256MB NAND
* 10/100 MBits Ethernet DP83848
* Serial number chip DS2401
The board is made as SODIMM200 module.
For more info www.ronatix.at or info@ronetix.at.
Ron Madrid [Wed, 2 Jun 2010 00:00:49 +0000 (17:00 -0700)]
Update SICRL_USBDR to reflect 4 different settings
This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field. The four different options are '00', '01',
'10', and '11'. This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
cpu.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
George G. Davis [Tue, 11 May 2010 14:15:36 +0000 (10:15 -0400)]
ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
instruction which means "Invalidate Both Caches" when in fact the intent
is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7,
c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
Both Caches" instruction to insure that memory is consistent with any
dirty cache lines.
Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
used.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Kim Phillips [Fri, 23 Apr 2010 17:20:11 +0000 (12:20 -0500)]
fdt_support: add entry for sec3.1 and fix sec3.3
Add sec3.1 h/w geometry for fdt node fixups.
Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor
type, it lacks the ARC4 algorithm execution unit required to be able
to execute anything meaningful with it. Change the node to agree with
the documentation that declares that the sec3.3 really doesn't have such
a descriptor type.
Reported-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Thu, 20 May 2010 16:16:16 +0000 (11:16 -0500)]
fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure
The ngPIXIS is a board-specific FPGA, but the definition of the registers
is mostly consistent. On boards where it matter, register 9 is called
'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
definition.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Thomas Chou [Fri, 14 May 2010 22:00:05 +0000 (06:00 +0800)]
nios2: fix div64 issue for gcc4
This patch fixes the run-time error on div64 when built with
gcc4, which was reported by jhwu0625 on nios forum. It merges
math support from libgcc of gcc4. This patch is copied from
nios2-linux.
It works with both gcc3 and gcc4. The old mult.c, divmod.c and
math.h are removed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Thomas Chou [Fri, 21 May 2010 03:08:03 +0000 (11:08 +0800)]
nios2: fix r15 issue for gcc4
The "-ffixed-r15" option doesn't work well for gcc4. Since we
don't use gp for small data with option "-G0", we can use gp
as global data pointer. This allows compiler to use r15. It
is necessary for gcc4 to work properly.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Thomas Chou [Fri, 30 Apr 2010 03:34:15 +0000 (11:34 +0800)]
nios2: add gpio support to nios2-generic board
This patch adds gpio support of Altera PIO component to the
nios2-generic board. Though it drives only gpio_led at the
moment, it supports bidirectional port to control bit-banging
I2C, NAND flash busy status or button switches, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Thomas Chou [Fri, 30 Apr 2010 03:34:13 +0000 (11:34 +0800)]
nios2: add gpio support
This patch adds driver for a trivial gpio core, which is described
in http://nioswiki.com/GPIO. It is used for gpio led and nand flash
interface in u-boot.
When CONFIG_SYS_GPIO_BASE is not defined, board may provide
its own driver.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Wolfgang Wegner [Tue, 30 Mar 2010 18:19:50 +0000 (19:19 +0100)]
add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x
This patch adds the possibility to handle seperate PHYs to MCF5445x.
Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the
linux kernel.
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
Andrew Caldwell [Fri, 7 May 2010 19:10:07 +0000 (15:10 -0400)]
Blackfin: nand: drain the write buffer before returning
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain. On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.
So wait for the buffer to drain once we're done writing to it.
Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
config.mk: use different host compiler for OS X 10.6
Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about
wrong syntax in system includes.
In file included from /usr/include/stdio.h:444,
from ../source/u-boot/include/compiler.h:26,
from ../source/u-boot/lib/crc32.c:15:
/usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list
This can be fixed by reverting the workaround for prior OS X releases in
config.mk conditionally for OS X 10.6+.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Fri, 21 May 2010 21:14:53 +0000 (23:14 +0200)]
a320evb: fix udelay / __udelay confusion
Fix the following compiler problems:
arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay':
/home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay'
lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here
lib/libgeneric.a(time.o): In function `udelay':
time.c:(.text+0x1c): undefined reference to `__udelay'
Mahavir Jain [Fri, 21 May 2010 09:07:48 +0000 (14:37 +0530)]
bugfix: Guruplug: Use standard miiphy
call to reset PHY chip.
Current PHY Software Reset operation in guruplug does not
poll reset bit in control register to go to 0(auto clearing)
for making sure reset was successful.This patch uses standard
miiphy call miiphy_reset to make sure proper PHY reset operation.
commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c "mpc83xx:
retain POR values of non-configured ACR, SPCR, SCCR, and LCRR
bitfields" incorrectly shifted <register>_<bitfield> (e.g.
ACR_PIPE_DEP) values that were preshifted by their
definition in mpc83xx.h.
this patch removes the unnecessary shifting for the newly
utilized mask values in cpu_init.c, and prevents seemingly
unrelated symptoms such as an mpc8379erdb board from
locking up whilst performing a networking operation,
e.g. a tftp.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Stefan Roese [Mon, 17 May 2010 08:01:05 +0000 (10:01 +0200)]
UBI: Fix problem in UBI/Linux "compatibility layer"
"down_write_trylock" needs to return 1 instead of 0 for success.
Otherwise copying a block with a read error (e.g. bit-flip on read)
won't work correctly.
Stefan Roese [Mon, 17 May 2010 08:00:51 +0000 (10:00 +0200)]
UBI: Ensure that "background thread" operations are really executed
The current U-Boot UBI implementation is copied from Linux. In this
porting the UBI background thread was not handled correctly. Upon write
operations ubi_wl_flush() makes sure, that all queued operations, like
page-erase, are completed. But this is missing for read operations.
This patch now makes sure that such operations (like scrubbing upon
bit-flip errors) are not queued, but executed directly.
Wolfgang Denk [Mon, 17 May 2010 21:34:18 +0000 (23:34 +0200)]
fsl_diu_fb.c: fix build warnings
Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a
number of "passing argument 2 of 'out_be32' makes integer from pointer
without a cast" warnings; fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dave Liu <daveliu@freescale.com> Cc: Jerry Huang <Chang-Ming.Huang@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org>
Nick Thompson [Tue, 11 May 2010 10:29:52 +0000 (11:29 +0100)]
Avoid use of divides in print_size
Modification of print_size to avoid use of divides and especially
long long divides. Keep the binary scale factor in terms of bit
shifts instead. This should be faster, since the previous code
gave the compiler no clues that the divides where always powers
of two, preventing optimisation.
Signed-off-by: Nick Thompson <nick.thompson@ge.com> Acked-by: Timur Tabi <timur@freescale.com>
projects / u-boot / log