]> git.sur5r.net Git - u-boot/log
u-boot
8 years agospl: mmc: raw: Try to load u-boot if Linux image is not found
Lokesh Vutla [Mon, 11 Apr 2016 09:54:50 +0000 (15:24 +0530)]
spl: mmc: raw: Try to load u-boot if Linux image is not found

If CONFIG_SPL_OS_BOOT is enabled and Linux image is not flashed at
RAW_MODE_KERNEL_SECTOR in MMC, spl still assumes that Linux is
available and tries to boot it and hangs. In order to avoid this,
adding a check to verify if parsed image header is of type IH_OS_LINUX.
If it fails then fall back to load u-boot image.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoarm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm code
Hans de Goede [Sat, 9 Apr 2016 11:53:49 +0000 (13:53 +0200)]
arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm code

Lets be consistent and also replace v7_maint_dcache_all()
with asm code for the invalidate case.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agoarm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code
Hans de Goede [Sat, 9 Apr 2016 11:53:48 +0000 (13:53 +0200)]
arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code

v7_maint_dcache_all() does not work reliable when build with gcc6,
see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788

While debugging this I learned that v7_maint_dcache_all() is unreliable
when build with gcc5 too when it is marked as noinline.

This commit fixes the reliability issues by replacing the C-code with
the ready to use asm implementation from the kernel.

Given that this code when written as C-code clearly is quite fragile
(also see the existing comments about the C-code being the way it is
 to get optimal assembly) and that we have a proven asm alternative,
I believe that this is the best solution.

Note that we actually already had a copy of the kernel's
v7_flush_dcache_all() before this commit in
arch/arm/mach-uniphier/arm32/lowlevel_init.S.

This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames
it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper
which saves / restores the clobbered registers for use from C-code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agolib/crc8: Add crc start value
Stefan Roese [Fri, 8 Apr 2016 13:56:29 +0000 (15:56 +0200)]
lib/crc8: Add crc start value

To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.

For non-zero CRC start values to work, I've reworked the function a bit.
The new implementation is copied from the Linux version in
drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero
CRC stating values.

I've double-checked that the results for zero starting values are
identical to the results from the original version of this function.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agotest/py: README: link to example hook scripts
Stephen Warren [Wed, 6 Apr 2016 17:46:59 +0000 (11:46 -0600)]
test/py: README: link to example hook scripts

When implementing test/py hook scripts, it's helpful to read some working
examples. Provide a link to some. The link was mentioned in the commit
message which first added test/py, but not in any documentation file.

Suggested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agobootcounter_ram: Flush dcache after data is written into SDRAM
Stefan Roese [Wed, 6 Apr 2016 09:02:22 +0000 (11:02 +0200)]
bootcounter_ram: Flush dcache after data is written into SDRAM

This patch adds a call to flush_dcache_range() to bootcount_store() to
make sure, that the bootcounter data (including the patterns) is
written to memory. Without this, platforms with dcache enabled may not
have the bootcounter updated upon reset.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
8 years agodisk: part: Enable get_info pointer for CONFIG_SPL_FAT_SUPPORT
Michal Simek [Tue, 5 Apr 2016 11:34:20 +0000 (13:34 +0200)]
disk: part: Enable get_info pointer for CONFIG_SPL_FAT_SUPPORT

The patch "dm: part: Convert partition API use to linker lists"
(sha1: 96e5b03c8ab749b6547f6a3ceb4d4b9f274211aa) is adding new
dependency for enabling SPL_EXT_SUPPORT to be able to get
information about DOS partition.
get_info is also required for FAT support only which is used on Xilinx
Zynq boards.

Reported-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoam33xx changed BOOT_DEVICE_SPI to correct value
Vogt, Christof [Tue, 5 Apr 2016 08:56:57 +0000 (10:56 +0200)]
am33xx changed BOOT_DEVICE_SPI to correct value

Changed BOOT_DEVICE Code for SPI on AM33xx.
According AM335x reference manual page 4960
(SPRUH73L-October 2011-Revised February 2015)
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agorpi: remove redundant board files
Stephen Warren [Tue, 5 Apr 2016 02:00:41 +0000 (20:00 -0600)]
rpi: remove redundant board files

Now that rpi_*defconfig and Kconfig (rather than the config header file)
provide the identity of the build, we don't need to separate config
headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD
and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This
requires a tiny number of extra ifdefs in the config header.

The only disadvantage of this approach is that the $board/$board_name
environment variables aren't as descriptive as they used to be. This isn't
really an issue because those only exist to allow scripts to create DTB
filenames at runtime. However, the RPi board code already sets $fdtfile to
something more accurate based on FW-reported board ID anyway.

While at it, unify some Kconfig select options, and add a MAINTAINERS
entry for bcm283x too.

Partially-suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agostm32: stm32_flash: add memory barrier during flash write
Vikas Manocha [Mon, 4 Apr 2016 23:49:02 +0000 (16:49 -0700)]
stm32: stm32_flash: add memory barrier during flash write

After writing data to flash space, next instruction is checking if flash
controller is busy writing to the flash memory. Memory barrier is required here
to avoid transaction re-ordering for data write and busy status check.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
8 years agotest/py: Add support for loading image via tftp to specified location
Michal Simek [Mon, 4 Apr 2016 18:06:14 +0000 (20:06 +0200)]
test/py: Add support for loading image via tftp to specified location

For example this setting:

env__net_tftp_readable_file = {
    "fn": "ep108/image.ub",
    "addr": 0x10000000,
    "size": 25846296,
    "crc32": "b726f9de",
}

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agospmi: Fix sandbox spmi driver memory corruption
Mateusz Kulikowski [Mon, 4 Apr 2016 17:55:58 +0000 (19:55 +0200)]
spmi: Fix sandbox spmi driver memory corruption

There is off-by-one error in sandbox_emul_gpio that causes
segfault of certain tests.

EMUL_GPIO_REG_END is the address of last valid (emulated) register.
This patch fixed this (by adding one more element to emulated register array).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
8 years agotest/py: pass -v option when executing sandbox
Stephen Warren [Mon, 4 Apr 2016 17:04:50 +0000 (11:04 -0600)]
test/py: pass -v option when executing sandbox

This shows more output, such as the internal output generated by the unit
test ("ut") command, which makes it easier to debug issues.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoboard: ti: am57xx: Prevent init_sata() from being called twice
Roger Quadros [Mon, 4 Apr 2016 07:53:31 +0000 (10:53 +0300)]
board: ti: am57xx: Prevent init_sata() from being called twice

init_sata() is done as part of scsi_init() in
arch/arm/cpu/armv7/omap-common/sata.c so no need to duplicate
it here.

This seems to fix SATA problems in the kernel when CONFIG_TI_PIPE3 is
configured as loadable module.

Cc: Cooper Jr., Franklin <fcooper@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoREADME: Specify the full path for README.video
Fabio Estevam [Sat, 2 Apr 2016 14:53:18 +0000 (11:53 -0300)]
README: Specify the full path for README.video

It is clearer to specify the full path to access the
doc/README.video file.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agodrivers: block: fix placement of parameters
Eric Nelson [Sat, 2 Apr 2016 14:37:14 +0000 (07:37 -0700)]
drivers: block: fix placement of parameters

Signed-off-by: Eric Nelson <eric@nelint.com>
8 years agocmd: blkcache: simplify sub-command handling
Eric Nelson [Sat, 2 Apr 2016 14:37:13 +0000 (07:37 -0700)]
cmd: blkcache: simplify sub-command handling

Signed-off-by: Eric Nelson <eric@nelint.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agocmd: blkcache: remove indentation from output of 'show'
Eric Nelson [Sat, 2 Apr 2016 14:37:12 +0000 (07:37 -0700)]
cmd: blkcache: remove indentation from output of 'show'

Signed-off-by: Eric Nelson <eric@nelint.com>
8 years agoARM: rpi: add some missing Kconfig help text
Stephen Warren [Sat, 2 Apr 2016 03:38:04 +0000 (21:38 -0600)]
ARM: rpi: add some missing Kconfig help text

Add notes re: enabling the UART to the RPi 3 32-bit help text. Fully
describe the RPi 3 64-bit board option.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: add Raspberry Pi 3 64-bit config
Stephen Warren [Sat, 2 Apr 2016 03:14:15 +0000 (21:14 -0600)]
ARM: add Raspberry Pi 3 64-bit config

On all Pis so far, the VC FW provides a short stub to set up the ARM CPU
before entering the kernel (a/k/a U-Boot for us). This feature is not
currently supported by the VC FW when booting in 64-bit mode. However,
this feature will likely appear in the near future, and this U-Boot port
assumes that such a feature is in place. Without that feature, or a
temporary workaround described below, U-Boot will not boot.

Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can
be used drectly as kernel7.img, in the same way as any other RPi port. The
following config.txt is required:

    # Fix mini UART input frequency, and setup/enable up the UART.
    # Without this option, U-Boot will not boot, even if you don't care
    # about the serial console. This option will always be required for
    # all RPi3 use-cases, unless the PL011 UART is used, which is not
    # yet supported by rpi_3* builds of U-Boot.
    enable_uart=1
    # Boot in AArch64 (64-bit) mode.
    # It is possible that a future VC FW will remove the need for this
    # option, instead auto-setting 32-/64-bit mode based on the "kernel"
    # filename present on the SD card.
    arm_control=0x200

Prior to the VC FW providing the ARM boot stub, you can use the following
steps to build an equivalent stub into the U-Boot binary:

git clone https://github.com/swarren/rpi-3-aarch64-demo.git \
    ../rpi-3-aarch64-demo
(cd ../rpi-3-aarch64-demo && ./build.sh)
Build U-Boot for rpi_3 in the usual way
cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed
Use u-boot.bin.stubbed as kernel7.img on the Pi SD card.

In this case, the following additional entries are required in config.txt:

    # Tell the FW to load the kernel image at address 0, the reset vector.
    kernel_old=1

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: allow CONFIG_GICV* not to be defined
Stephen Warren [Sat, 2 Apr 2016 03:14:14 +0000 (21:14 -0600)]
ARM: allow CONFIG_GICV* not to be defined

There are ARM SoCs (such as the BCM2837) do not contain an ARM GIC. Fix
the ARMv8 CPU startup code to compile in this case.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: socfpga: sr1500: Remove USB_GADGET
Sam Protsenko [Fri, 1 Apr 2016 18:27:50 +0000 (21:27 +0300)]
arm: socfpga: sr1500: Remove USB_GADGET

"buildman" tool revealed that USB_GADGET was enabled by mistake for this
board in process of moving that option to Kconfig. Remove it to bring
things back to correct state.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Stefan Roese <sr@denx.de>
8 years agoenv_eeprom invalidates gd->env_addr by setting it to an offset value
Guy Thouret [Fri, 11 Mar 2016 13:31:39 +0000 (13:31 +0000)]
env_eeprom invalidates gd->env_addr by setting it to an offset value

Patch to fix boot hang when using env on i2c eeprom caused by invalid gd->env_addr

Signed-off-by: Guy Thouret <guy.thouret@wems.co.uk>
Cc: Heiko Schocher <hs@denx.de>
8 years agofastboot: sparse: fix sparse blocks calculation
Jeffy Chen [Wed, 3 Feb 2016 10:13:55 +0000 (18:13 +0800)]
fastboot: sparse: fix sparse blocks calculation

It may overflow in sparse_block_size_to_storage, use uint64_t instead in
the calculation.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sun, 10 Apr 2016 23:55:25 +0000 (19:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sun, 10 Apr 2016 23:55:08 +0000 (19:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

8 years agoarm: socfpga: Drop space after 'loadaddr=' in extra env
Marek Vasut [Sun, 3 Apr 2016 17:11:12 +0000 (19:11 +0200)]
arm: socfpga: Drop space after 'loadaddr=' in extra env

There is an incorrect space after loadaddr= in the extra environment,
so drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
8 years agoarm: socfpga: Nuke useless include
Marek Vasut [Sat, 19 Mar 2016 17:59:11 +0000 (18:59 +0100)]
arm: socfpga: Nuke useless include

The dwmmc.h include was forgotten during the migration of dwmmc
probing to DM. Since the shiny DM is in place now, remove this
relic of the past.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
8 years agoarm: socfpga: migration of CONFIG_SPI_FLASH_BAR
Denis Bakhvalov [Thu, 24 Mar 2016 21:39:09 +0000 (22:39 +0100)]
arm: socfpga: migration of CONFIG_SPI_FLASH_BAR

CONFIG_SPI_FLASH_BAR was deleted from socfpga_common.h
and placed in socfpga_*_defconfig because it is Kconfig symbol.

Signed-off-by: Denis Bakhvalov <dendibakh@gmail.com>
Reported-by: Denis Bakhvalov <dendibakh@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
8 years agoarm: socfpga: sockit: Use more relaxed DRAM timings
Marek Vasut [Sun, 20 Mar 2016 17:02:44 +0000 (18:02 +0100)]
arm: socfpga: sockit: Use more relaxed DRAM timings

The currently present DRAM timings generated from GHRD 14.0 did
not work on SoCkit rev. D because they were too tight. Load the
DRAM timings from GHRD 13.0 which are more relaxed and work with
SoCkit rev. D.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
8 years agoarm: socfpga: Handle phy-mode OF property for GMACs
Marek Vasut [Mon, 21 Mar 2016 12:38:11 +0000 (13:38 +0100)]
arm: socfpga: Handle phy-mode OF property for GMACs

Thus far, the socfpga init code had hard-coded the configuration
of the ethernet PHY interface to RGMII in the ethernet registers
in sysmgr space, so PHYs connected in another modes did not work.

This patch fixes support for configurations where the ethernet PHYs
are connected over MII/GMII/RMII interfaces by parsing the phy-mode
OF property of the GMACs and configuring the ethernet registers in
sysmgr space accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reported-by: Denis Bakhvalov <denis.bakhvalov@nokia.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agodm: usb: Do not reprobe usb hosts on "usb tree" command
Hans de Goede [Sat, 2 Apr 2016 22:04:39 +0000 (00:04 +0200)]
dm: usb: Do not reprobe usb hosts on "usb tree" command

Some usb hosts may have failed to probe on "usb start", i.e. an otg
host without an otg-host cable plugged in.

"usb tree" would cause the probe method of these hosts to get called
again, something which should only happen on "usb reset".

This commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agomusb: Properly call musb_stop() on probe failure
Hans de Goede [Sat, 2 Apr 2016 18:46:10 +0000 (20:46 +0200)]
musb: Properly call musb_stop() on probe failure

musb_lowlevelinit(): if no device is plugged in / detected call
musb_stop() to undo the preceding musb_start() call.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agomusb: sunxi: Do not allocate musb struct multiple times
Hans de Goede [Sat, 2 Apr 2016 18:46:09 +0000 (20:46 +0200)]
musb: sunxi: Do not allocate musb struct multiple times

The probe function of the musb host driver can be called multiple
times. The code assumes that it can save the pointer to the allocated
musb struct in the driver model priv_auto_alloc data, but this data
gets free-ed on a probe failure or on removal, so we must save the
pointer elsewhere.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agousb: bcm_udc_otg: enable clocks
Steve Rae [Mon, 4 Apr 2016 19:59:43 +0000 (12:59 -0700)]
usb: bcm_udc_otg: enable clocks

Turn on the USB OTG clocks.

Signed-off-by: Steve Rae <srae@broadcom.com>
8 years agodrivers:usb:common:fsl-dt-fixup: fix return value of fdt_usb_get_node_type
Sriram Dash [Tue, 5 Apr 2016 09:11:22 +0000 (14:41 +0530)]
drivers:usb:common:fsl-dt-fixup: fix return value of fdt_usb_get_node_type

Changes the return type of fdt_usb_get_node_type from char* to int

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
8 years agodrivers:usb:common:fsl-dt-fixup: Add device-tree fixup support for xhci controller
Sriram Dash [Tue, 5 Apr 2016 09:11:21 +0000 (14:41 +0530)]
drivers:usb:common:fsl-dt-fixup: Add device-tree fixup support for xhci controller

Enables usb device-tree fixup code to incorporate xhci controller

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
8 years agodrivers:usb:common:fsl-dt-fixup: Remove code duplication for fdt_usb_get_node_type
Sriram Dash [Tue, 5 Apr 2016 09:11:20 +0000 (14:41 +0530)]
drivers:usb:common:fsl-dt-fixup: Remove code duplication for fdt_usb_get_node_type

Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to
avoid code duplication.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agodrivers:usb:common:fsl-dt-fixup: Move device-tree fixup framework to common file
Sriram Dash [Tue, 5 Apr 2016 09:11:19 +0000 (14:41 +0530)]
drivers:usb:common:fsl-dt-fixup: Move device-tree fixup framework to common file

Move usb device-tree fixup framework from ehci-fsl.c to common place so
that it can be used by other drivers as well (xhci-fsl.c).

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agousb: kbd: Do not deregister usbkbd twice when using dm
Hans de Goede [Sun, 3 Apr 2016 07:18:53 +0000 (09:18 +0200)]
usb: kbd: Do not deregister usbkbd twice when using dm

The dm usb_kbd_remove function() will deregister the usb keyboard for
us on a "usb reset" / "usb stop" so there is no need to manually call
usb_kbd_deregister() in the dm case.

This commit removes usb_kbd_deregister() in the dm case fixing the
following "usb reset" errors:

usb_kbd_remove: warning, ret=-6
device_remove: Device 'usb_kbd' failed to remove, but children are gone

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agousb: ehci-hcd: Fix crash when no ops are provided to ehci_register()
Mateusz Kulikowski [Sun, 3 Apr 2016 11:38:26 +0000 (13:38 +0200)]
usb: ehci-hcd: Fix crash when no ops are provided to ehci_register()

This commit fixes crash on BananaPi (and possibly others)
casued by 3f9f8a5b83f8aec40c9f4ee496046a695e333c45.

Crash reason:
When no ops were passed to ehci_register(), USB host driver caused
NULL pointer dereference.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 years agoboard: pic32mzda: enable USB-host, USB-storage support.
Purna Chandra Mandal [Mon, 21 Mar 2016 07:35:43 +0000 (13:05 +0530)]
board: pic32mzda: enable USB-host, USB-storage support.

Enable MUSB host and USB storage support for Microchip
PIC32MZ[DA] Starter Kit.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
8 years agodrivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.
Purna Chandra Mandal [Mon, 21 Mar 2016 07:35:42 +0000 (13:05 +0530)]
drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.

This driver adds support of PIC32 MUSB OTG controller as dual role device.
It implements platform specific glue to reuse musb core.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
8 years agodrivers: remove writes{b,w,l,q} and reads{b,w,l,q}.
Purna Chandra Mandal [Mon, 21 Mar 2016 07:35:41 +0000 (13:05 +0530)]
drivers: remove writes{b,w,l,q} and reads{b,w,l,q}.

Definition of writes{bwlq}, reads{bwlq} are now added into arch specific
asm/io.h. So removing them from driver to fix re-definition error

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
8 years agoarm: add missing writes[bwql], reads[bwql].
Purna Chandra Mandal [Mon, 21 Mar 2016 07:35:40 +0000 (13:05 +0530)]
arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Fri, 8 Apr 2016 23:31:06 +0000 (19:31 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

8 years agopowerpc: mpc85xx: Enable pre-relocation malloc for MPC85xx
mario.six@gdsys.cc [Tue, 5 Apr 2016 13:05:37 +0000 (15:05 +0200)]
powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xx

To enable DM on MPC85xx, we need pre-relocation malloc, which is
implemented in this patch.

We also make sure that the IVORs are always 4-aligned on e500 to prevent
alignment exceptions caused by code changes in start.S.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Cc: York Sun <york.sun@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agopowerpc: Replace CONFIG_SYS_INIT_RAM_END with CONFIG_SYS_INIT_RAM_SIZE
York Sun [Wed, 6 Apr 2016 20:22:10 +0000 (13:22 -0700)]
powerpc: Replace CONFIG_SYS_INIT_RAM_END with CONFIG_SYS_INIT_RAM_SIZE

CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mario Six <mario.six@gdsys.cc>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
8 years agopowerpc: t1040qds: Use generic ethsw commands
Codrin Ciubotariu [Mon, 14 Mar 2016 11:46:51 +0000 (13:46 +0200)]
powerpc: t1040qds: Use generic ethsw commands

The commands for the VSC9953 l2 switch from T1040 became generic in
patch https://patchwork.ozlabs.org/patch/499748/ and the define
was renamed.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 6 Apr 2016 18:17:22 +0000 (14:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

8 years agoarmv8: LS2080A: Consolidate LS2080A and LS2085A
York Sun [Mon, 4 Apr 2016 18:41:26 +0000 (11:41 -0700)]
armv8: LS2080A: Consolidate LS2080A and LS2085A

LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
8 years agoarmv8: ls1043a: load Fman ucode from SD/MMC under SD boot
Qianyu Gong [Fri, 1 Apr 2016 09:52:53 +0000 (17:52 +0800)]
armv8: ls1043a: load Fman ucode from SD/MMC under SD boot

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1043a: load Fman ucode from NAND flash under NAND boot
Qianyu Gong [Fri, 1 Apr 2016 09:52:52 +0000 (17:52 +0800)]
armv8: ls1043a: load Fman ucode from NAND flash under NAND boot

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: modify CONFIG_SYS_MAX_FLASH_BANKS to 1
Wenbin Song [Fri, 1 Apr 2016 09:28:41 +0000 (17:28 +0800)]
armv8/ls1043aqds: modify CONFIG_SYS_MAX_FLASH_BANKS to 1

There is only one flash bank for ls1043aqds.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: ls102xa: Fix order of CSU indexes in ns_access.h
Vincent Siles [Tue, 29 Mar 2016 07:41:16 +0000 (09:41 +0200)]
arm: ls102xa: Fix order of CSU indexes in ns_access.h

This patch aims to fix the order of CSU slave index for the LS1021a
board.

Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: LSCH2 early and final mmu needs matching NS attribute
Ed Swarthout [Mon, 28 Mar 2016 21:16:01 +0000 (16:16 -0500)]
armv8: LSCH2 early and final mmu needs matching NS attribute

When switching between the early and final mmu tables, the stack will
get corrupted if the Non-Secure attribute is different.  For ls1043a,
this issue is currently masked because flush_dcache_all is called
before the switch when CONFIG_SYS_DPAA_FMAN is defined.

Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1043aqds: make sure fixed-link property is big endian
Shaohui Xie [Fri, 25 Mar 2016 03:36:51 +0000 (11:36 +0800)]
armv8: ls1043aqds: make sure fixed-link property is big endian

When setting fixed-link property to DTS, the values should be converted
with using cpu_to_fdt32 so that to have correct value on little endian
Soc.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodrivers: net: vsc9953: Fix bug when PVID is shown for disabled ports only
Codrin Ciubotariu [Mon, 14 Mar 2016 11:46:50 +0000 (13:46 +0200)]
drivers: net: vsc9953: Fix bug when PVID is shown for disabled ports only

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodrivers: net: vsc9953: Do not configure disabled ports
Codrin Ciubotariu [Mon, 14 Mar 2016 11:46:52 +0000 (13:46 +0200)]
drivers: net: vsc9953: Do not configure disabled ports

Some SerDes protocols might not enable all l2switch ports. In this case,
these ports should not be configured to perform Rx/Tx operations.
This also fixes an issue when flooded frames were also switched to
disabled ports and frames start to accumulate, consuming memory
and eventually causing head-of-line blocking for other frames.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl: esdhc: consolidate fsl_esdhc_cfg structure
Peng Fan [Tue, 15 Mar 2016 09:57:50 +0000 (17:57 +0800)]
fsl: esdhc: consolidate fsl_esdhc_cfg structure

We can use phys_addr_to for esdhc_base to discard
the #ifdef.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl: esdhc: support driver model
Peng Fan [Fri, 25 Mar 2016 06:16:56 +0000 (14:16 +0800)]
fsl: esdhc: support driver model

Support Driver Model for fsl esdhc driver.

1. Introduce a new structure struct fsl_esdhc_priv
2. Refactor fsl_esdhc_initialize which is originally used by board code.
   - Introduce fsl_esdhc_init to be common usage for DM and non-DM
   - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part.
   - The original API for board code is still there, but we use
     'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it.
3. All the functions are changed to use 'struct fsl_esdhc_priv', except
   fsl_esdhc_initialize.
4. Since clk driver is not implemented, use mxc_get_clock to geth
   the clk and fill 'priv->sdhc_clk'.

Has been tested on i.MX6UL 14X14 EVK board:
"
=>dm tree
....
 simple_bus  [ + ]    |   `-- aips-bus@02100000
  mmc        [ + ]    |       |-- usdhc@02190000
  mmc        [ + ]    |       |-- usdhc@02194000
....
=> mmc list
FSL_SDHC: 0 (SD)
FSL_SDHC: 1 (SD)
"

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Hector Palacios <hector.palacios@digi.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-By: Eric Nelson <eric@nelint.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agokirkwood_nand: claim MPP pins on the fly
Chris Packham [Mon, 1 Feb 2016 23:35:09 +0000 (12:35 +1300)]
kirkwood_nand: claim MPP pins on the fly

Claim the MPP pins for the NAND flash controller only when it's actually
being used. This allows the pins to be shared with the SPI interface
which already supports an equivalent on-access MPP reconfiguration.

Reviewed-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Stefan Roese <sr@denx.de>
8 years agospi: kirkwood_spi: Add support for multiple chip-selects on MVEBU
Stefan Roese [Thu, 11 Feb 2016 10:37:38 +0000 (11:37 +0100)]
spi: kirkwood_spi: Add support for multiple chip-selects on MVEBU

Currently only chip-select 0 is supported by the kirkwood SPI driver.
The Armada XP / 38x SoCs also use this driver and support multiple chip
selects. This patch adds support for multiple CS on MVEBU.

The register definitions are restructured a bit with this patch. Grouping
them to the corresponding registers.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 4 Apr 2016 18:34:09 +0000 (14:34 -0400)]
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

8 years agoARM64: zynqmp: Enable EFI partition support
Michal Simek [Thu, 24 Mar 2016 12:16:29 +0000 (13:16 +0100)]
ARM64: zynqmp: Enable EFI partition support

Enable EFI partition support for ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Add SGMII support for zynqMP
Siva Durga Prasad Paladugu [Fri, 25 Mar 2016 07:23:44 +0000 (12:53 +0530)]
net: zynq_gem: Add SGMII support for zynqMP

PCS auto negotaiation bit should be enabled
along with SGMII autonegotation enabled
in phy.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: phy: Add SGMII support for TI phy
Siva Durga Prasad Paladugu [Fri, 25 Mar 2016 07:23:43 +0000 (12:53 +0530)]
net: phy: Add SGMII support for TI phy

Add support of SGMII to TI phy dp838367
Enable the SGMII and PCS settings in phy
control, CFG2 and BIST registers

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Return error incase of invalid phy address
Siva Durga Prasad Paladugu [Wed, 30 Mar 2016 06:59:49 +0000 (12:29 +0530)]
net: zynq_gem: Return error incase of invalid phy address

Return error from probe in case of invalid phy address.
This fixes the issue of uboot crash if phy is not detected.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add uEnv.txt support
Michal Simek [Fri, 18 Mar 2016 22:43:39 +0000 (23:43 +0100)]
ARM: zynq: Add uEnv.txt support

preboot macro load the uEnv.txt from mmc 0 when bootmode is mmc. uenvcmd is
executed after load of uEnv.txt if it is defined in the uEnv.txt env text
file.

The default importbootenv macro reads the uEnv.txt from mmc.

Additional to this, usb_loadbootenv is added to support loading uEnv.txt
from usb dev 0.

Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Enable FLASH_BAR for microzed and zybo
Michal Simek [Fri, 18 Mar 2016 17:41:28 +0000 (18:41 +0100)]
ARM: zynq: Enable FLASH_BAR for microzed and zybo

Enable FLASH_BAR for these targets to be in sync with all zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoblock: Add support for Ceva sata
Michal Simek [Wed, 30 Sep 2015 15:26:55 +0000 (17:26 +0200)]
block: Add support for Ceva sata

Initial Ceva Sata init code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM64: zynqmp: Simplify MAINTAINERS file to support more boards
Michal Simek [Fri, 18 Mar 2016 22:45:02 +0000 (23:45 +0100)]
ARM64: zynqmp: Simplify MAINTAINERS file to support more boards

Handle all Xilinx ZynqMP boards with one fragment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Read RAM information from DT
Michal Simek [Mon, 8 Feb 2016 08:34:53 +0000 (09:34 +0100)]
ARM64: zynqmp: Read RAM information from DT

Read information about memory from DT. This patch simplify life with
synchronization between DT and board files.

dram_init() only needs maximum RAM size below 4GB that's why please sort
banks in memory node.
dram_init_banksize() copies memory setup to bi_dram[].
This will avoid reading information from DT twice.

Memory test start/end were changed to DDR location to let memtest still
compiled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: Move HUSH enabling from board file to defconfig
Michal Simek [Fri, 18 Mar 2016 17:47:28 +0000 (18:47 +0100)]
ARM64: Move HUSH enabling from board file to defconfig

Simplify board config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Select SYS_CONFIG_NAME via Kconfig
Michal Simek [Fri, 18 Mar 2016 17:21:36 +0000 (18:21 +0100)]
ARM64: zynqmp: Select SYS_CONFIG_NAME via Kconfig

This option enable adding new platform suport just by adding defconfig
and DTS file which will target generic configuration for SoC.
Make no sense to extend Kconfig just create a pointer between DTS and
configuration file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable FAT write and EXT4 write for USB too
Michal Simek [Fri, 18 Mar 2016 17:10:21 +0000 (18:10 +0100)]
ARM64: zynqmp: Enable FAT write and EXT4 write for USB too

Enabling writing files to FAT and EXT4 for USB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Decrease boot delay
Soren Brinkmann [Mon, 1 Feb 2016 22:56:20 +0000 (14:56 -0800)]
ARM64: zynqmp: Decrease boot delay

Synchronize it with zynq platform.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: axi_emac: Report phy-node error message permanently
Michal Simek [Mon, 8 Feb 2016 12:54:05 +0000 (13:54 +0100)]
net: axi_emac: Report phy-node error message permanently

Do not use debug() when printing error message. Use printf instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Remove !OF_CONTROL code for timer and interrupt
Michal Simek [Mon, 15 Feb 2016 12:44:19 +0000 (13:44 +0100)]
microblaze: Remove !OF_CONTROL code for timer and interrupt

OF_CONTROL is enabled by default that's why this is dead code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Read information about timer/interrupts from DT
Michal Simek [Mon, 15 Feb 2016 11:10:32 +0000 (12:10 +0100)]
microblaze: Read information about timer/interrupts from DT

Read information about timer and interrupts from DT. This is the first
small step to move timer and intc to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix default ps7_init_gpl.c/h for ZYBO
Michal Simek [Thu, 3 Mar 2016 12:25:03 +0000 (13:25 +0100)]
ARM: zynq: Fix default ps7_init_gpl.c/h for ZYBO

There is incorrect setting for USB which didn't work with origin
ps7_init_gpl.X files.
Use default setting for Digilent Zybo projects with HDMI in PL.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: zybo: Enabling reading MAC address from EEPROM
Michal Simek [Sat, 13 Feb 2016 09:18:50 +0000 (10:18 +0100)]
ARM: zynq: zybo: Enabling reading MAC address from EEPROM

Zybo has on board I2C EEPROM which contains preprogrammed MAC address.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: gem: Allow to set the MAC from an EEPROM
Joe Hershberger [Tue, 26 Jan 2016 17:57:03 +0000 (11:57 -0600)]
net: gem: Allow to set the MAC from an EEPROM

Provide board specific option how to read MAC address from ROM.
Do it in generic way to be reusable by differnet boards.
If this is not enough board specific functions can be created.

Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Enable option to overwrite default variables
Michal Simek [Sat, 13 Feb 2016 10:50:03 +0000 (11:50 +0100)]
ARM: zynq: Enable option to overwrite default variables

Enable overwriting variables out of main config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: xilinx_axi: Clear Isolate bit if found during phy setup
Siva Durga Prasad Paladugu [Sun, 21 Feb 2016 10:16:15 +0000 (15:46 +0530)]
net: xilinx_axi: Clear Isolate bit if found during phy setup

In SGMII cases the isolate bit might set after DMA and
ethernet resets and hence check and clear during
setup_phy if it was set.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: xilinx_axi: Use interface type instead of zero
Siva Durga Prasad Paladugu [Sun, 21 Feb 2016 10:16:14 +0000 (15:46 +0530)]
net: xilinx_axi: Use interface type instead of zero

Pass appropriate interface type to phy_connect
instead of zero.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq-common: Enable phy driver for Xilinx PCS/PMA core
Siva Durga Prasad Paladugu [Fri, 5 Feb 2016 07:52:12 +0000 (13:22 +0530)]
zynq-common: Enable phy driver for Xilinx PCS/PMA core

Add support of Xilinx PCS/PMA core phy for Zynq

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Add support for SGMII interface
Siva Durga Prasad Paladugu [Fri, 5 Feb 2016 07:52:11 +0000 (13:22 +0530)]
net: zynq_gem: Add support for SGMII interface

Add support of SGMII interface for zynq GEM.
Read xlnx,emio property from DT.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agophy: Add phy driver support for xilinx PCS/PMA core
Siva Durga Prasad Paladugu [Fri, 5 Feb 2016 07:52:10 +0000 (13:22 +0530)]
phy: Add phy driver support for xilinx PCS/PMA core

Add phy driver support for xilinx PCS/PMA core

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Mon, 4 Apr 2016 17:15:23 +0000 (13:15 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

8 years agocommon: cli: Fix typo CONFIG_CMDINE -> CONFIG_CMDLINE
Stefan Roese [Mon, 4 Apr 2016 14:32:15 +0000 (16:32 +0200)]
common: cli: Fix typo CONFIG_CMDINE -> CONFIG_CMDLINE

Patch f8bb6964 (Drop command-processing code when CONFIG_CMDLINE is
disabled) introduced a small typo. This patch fixes it and unbreaks
all boards again that don't have the Hush parser enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
8 years agoarm: mvebu: Don't enable d-cache on A375
Stefan Roese [Wed, 10 Feb 2016 08:18:46 +0000 (09:18 +0100)]
arm: mvebu: Don't enable d-cache on A375

Armada 375 still has some problems with d-cache enabled in the ethernet
driver (mvpp2). So lets keep the d-cache disabled until this is solved.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
8 years agoarm: mvebu: Add basic support for Armada 375 eval board db-88f6720
Stefan Roese [Fri, 29 Jan 2016 08:14:54 +0000 (09:14 +0100)]
arm: mvebu: Add basic support for Armada 375 eval board db-88f6720

This patch adds basic support for the Marvell A375 eval board. Tested
are the following interfaces:
- I2C
- SPI
- SPI NOR
- Ethernet (mvpp2), port 0 & 1

Currently the A375 SerDes and DDR3 init code is not intergrated. So
the SPL U-Boot is not fully functional.

Right now, this A375 mainline U-Boot can only be used by chainloading
it via the original Marvell U-Boot. This can be done via this
command:

=> tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
8 years agoarm: mvebu: Add basic support for the Marvell Armada 375 SoC
Stefan Roese [Wed, 10 Feb 2016 06:23:00 +0000 (07:23 +0100)]
arm: mvebu: Add basic support for the Marvell Armada 375 SoC

This patch adds basic support for the Armada 375. Please note that
currently the SerDes and DDR3 init code for the A375 is not
included / enabled. This will be done in a later, follow-up patch.

Right now, this A375 mainline U-Boot can only be used by chainloading
it via the original Marvell U-Boot. This can be done via this
command:

=> tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
8 years agodt-bindings: Add include/dt-bindings/phy/phy.h from Linux v4.4
Stefan Roese [Fri, 29 Jan 2016 08:35:37 +0000 (09:35 +0100)]
dt-bindings: Add include/dt-bindings/phy/phy.h from Linux v4.4

This will be needed by the upcoming Marvell Armada 375 dts files.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
8 years agonet: mvpp2.c: Add Marvell mvpp2 network driver for Armada 375
Stefan Roese [Wed, 10 Feb 2016 06:22:10 +0000 (07:22 +0100)]
net: mvpp2.c: Add Marvell mvpp2 network driver for Armada 375

This patch adds support for the mvpp2 ethernet controller which is integrated
in the Marvell Armada 375 SoC. This port is based on the Linux driver (v4.4),
which has been stripped of the in U-Boot unused portions.

Tested on the Marvell Armada 375 eval board db-88f6720.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
8 years agospi: kirkwood_spi.c: Add compatible match ID for Armada 375
Stefan Roese [Fri, 29 Jan 2016 09:04:15 +0000 (10:04 +0100)]
spi: kirkwood_spi.c: Add compatible match ID for Armada 375

This enables this driver for the Marvell Armada 375 SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviwer-by: Jagan Teki <jteki@openedev.com>
8 years agonet: phy: Realtek RTL8211B/C PHY ID fix
Karsten Merker [Mon, 21 Mar 2016 19:29:07 +0000 (20:29 +0100)]
net: phy: Realtek RTL8211B/C PHY ID fix

The RTL8211B_driver structure in drivers/net/phy/realtek.c contains a
wrong PHY ID (0x1cc910 instead of 0x1cc912) in the uid field.

The lowest four bits of the PHY ID encode the chip revision (B+C/D/E/F)
of the RTL8211 and the code originally applied a mask of 0xfffff0 to
the PHY ID, so that matching the PHY ID to the appropriate driver code
was only done on the chip type (RTL8211), but not on a specific
revision.

After introduction of support for the RTL8211E, which needed another
startup function than the older chip revisions, commit
42205047674d7fc9e0aa747273fbc7dcfbac3183 changed the mask to 0xffffff
to make the chip revision relevant for the match, but didn't provide
the now-relevant lower bits of the uid field for the RTL8211B/C.

Fix this by setting the full PHY ID in the RTL8211B_driver uid field.

Fixes: 42205047674d ("net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected")
Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoMAINTAINERS: Update Scott Wood's email address
Scott Wood [Fri, 1 Apr 2016 23:49:57 +0000 (18:49 -0500)]
MAINTAINERS: Update Scott Wood's email address

Freescale is now NXP.  I still work there, but I won't be using their
mail system for U-Boot development.

Signed-off-by: Scott Wood <oss@buserror.net>
8 years agosata: use block layer for sata command
Eric Nelson [Sun, 27 Mar 2016 19:00:15 +0000 (12:00 -0700)]
sata: use block layer for sata command

Call blk_dread, blk_dwrite, blk_derase to ensure that the block cache is
used if enabled and to remove build breakage when CONFIG_BLK is enabled.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Tom Rini <trini@konsulko.com>