Add support for using the Atmel MCI driver on at91sam9263ek.
This change is modeled after the existing at91sam9260ek support.
Please note that this hooks up slot1 (MCI1) for SD. Not both.
Tested with at91bootstrap and u-boot on dataflash in slot 0
and fat-formatted 8GB SDHC in slot 1 on first revision
at91sam9263ek (which must use dataflash in slot0 to boot).
CONFIG_ATMEL_MCI_PORTB not tested.
Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
[remove empty line] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
OMAP3: igep00x0: Enable required clocks for GPIO that are used.
Enable required clocks for GPIO to fix a boot issue introduced by commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for
peripherals only if they are used).
Without this patch the u-boot freezes after the following messages
To avoid this we just need enable the clocks for GPIOs that are used, but it
would be interesting implement a mechanism to protect these situations and
make sure that the clock is enabled when we request a GPIO.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
B&R boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Stephen Warren [Wed, 5 Feb 2014 16:24:59 +0000 (09:24 -0700)]
ARM: tegra: implement bootcmd_pxe
This retrieves a PXE config file over the network, and executes it. This
allows an extlinux config file to be retrieved over the network and
executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 5 Feb 2014 16:24:58 +0000 (09:24 -0700)]
ARM: tegra: rework boot scripts
Update the common Tegra boot scripts in the default environment to
a) Make use of the new "test -e" shell command to avoid some error
messages.
b) Allow booting using the sysboot command and extlinux.conf. This
allows easy creation of boot menus, and provides a simple interface
for distros to parameterize/configure the boot process.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 5 Feb 2014 16:24:57 +0000 (09:24 -0700)]
ARM: tegra: convert tegra to use distro defaults
Modify all Tegra boards to include the "distro defaults" header, so that
all the config options distros expect are enabled. Remove any #defines
that enable the same options from the Tegra files.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 10 Feb 2014 20:11:53 +0000 (13:11 -0700)]
ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
Tegra's EHCI controllers only have a single PORTSC register. Configure
U-Boot to know this. This prevents e.g. ehci_shutdown() from touching
non-existent registers.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 3 Feb 2014 21:03:27 +0000 (14:03 -0700)]
ARM: tegra: simplify halt_avp()
In order to completely halt the AVP processor, we should simply write
FLOW_MODE_STOP without any extra options that allow wakeup. Amend the
code to do this.
I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by
interrupts. We don't want this; if later SW wishes to use the AVP, it
should be reset and booted from scratch.
Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly
different definition starting with Tegra114, so the values we're
writing don't entirely make sense there anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.
Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 3 Feb 2014 21:03:24 +0000 (14:03 -0700)]
ARM: tegra: move CONFIG_TEGRAnn
<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stefan Roese [Tue, 25 Feb 2014 10:07:22 +0000 (11:07 +0100)]
arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup
Since the switch may be re-configured for VLAN usage in Linux (or any
other OS), lets reset the switch to its default register values upon
power-up. Otherwise network might not be available in U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com>
Dave Gerlach [Tue, 18 Feb 2014 12:32:01 +0000 (07:32 -0500)]
ARM: AM43xx: Change DDR3 Reset Value
The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value
of the ddr reset value for DDR3 before the EMIF takes over. We must have
this bit set high so that on exit from DeepSleep0 within the kernel the
reset line has the proper value.
Dave Gerlach [Tue, 18 Feb 2014 12:32:00 +0000 (07:32 -0500)]
ARM: AM43xx: Write sdram_config to secure_emif_sdram_config
The register secure_emif_sdram_config in control module is copied to
the EMIF sdram_config register when it is coming out of DeepSleep0 in
order to ensure that the EMIF comes up for the correct type of DDR.
Without this, resume can hang from within the kernel.
Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
desired delay in cycles that the EMIF waits without an access to enter
self-refresh, in this case 8192 cycles. With this, code desiring to
enter self refresh only has to toggle one bit to enable it.
Lokesh Vutla [Tue, 18 Feb 2014 12:31:57 +0000 (07:31 -0500)]
ARM: AM4372: Update EMIF registers for DDR3
Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD
registers.
In EMIF_PHY_CTRL:
Updating [4:0]READ_LATENCY to 8, because at higher frequencies like
400MHz the read latency expected will be CL+3 as per tests from HW
folks.
Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug
purpose. With out this resume is not working(Still waiting for PHY team
to come back for better explanation).
Mugunthan V N [Tue, 18 Feb 2014 12:31:56 +0000 (07:31 -0500)]
ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse
Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also correct the bit masking of mac id read from the efuse.
Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Tue, 18 Feb 2014 12:31:55 +0000 (07:31 -0500)]
ARM: AM335x: add support for reading cpsw 2nd mac address from efuse
Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also adding mii command support to am335x common config.
Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Tue, 18 Feb 2014 12:31:52 +0000 (07:31 -0500)]
drivers: net: cpsw: add support to have phy address from cpsw platform data
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.
Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Tue, 25 Feb 2014 15:27:01 +0000 (10:27 -0500)]
arm: Switch to -mno-unaligned-access when supported by the compiler
When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level. We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.
To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
Masahiro Yamada [Tue, 25 Feb 2014 10:26:47 +0000 (19:26 +0900)]
kbuild: Fix a false error of generic board support
Before this commit, make terminated with an error
where is shouldn't under some condition.
This bug happened when we built a board unsupporting
generic board right after building with generic board.
For example, the following sequence failed.
(harmony uses generic board but microblaze-generic does not
support it)
$ make harmony_config
Configuring for harmony board...
$ make CROSS_COMPILE=arm-linux-gnueabi-
[ Build succeed ]
$ make microblaze-generic_config
Configuring for microblaze-generic board...
$ make CROSS_COMPILE=microblaze-linux-
Makefile:488: *** Your architecture does not support generic board.
Please undefined CONFIG_SYS_GENERIC_BOARD in your board config file. Stop.
We had to do "make clean" before building the microblaze board.
This commit fixes this unconvenience.
Move generic board sanity check to "prepare1" target,
which is run after generation of include/autoconf.mk.
"help" target has been copied from Linux 3.13 and adjusted
for U-Boot.
Unlike Linux, cleaning is done on 4 levels:
clean, clobber, mrproper, distclean.
Masahiro Yamada [Mon, 24 Feb 2014 02:12:21 +0000 (11:12 +0900)]
kbuild: refactor more IMX image rules
This commit avoids generating ./SPL twice.
- Fist time descending to spl/
- Second time as a prerequisite of u-boot-with-spl.imx,
u-boot-with-nand-spl.imx.
Nikhil Badola [Mon, 17 Feb 2014 11:28:36 +0000 (16:58 +0530)]
fsl/usb: Limit phy_type comparison to first four characters
Use first four characters for phy_type comparison. Strcmp() should not
be used to check the phy_type string which maybe parsed by hwconfig_subarg().
Hwconfig_subarg() returns part of hwconfig string starting from
phy_type value till the end of the string. Since phy_type could be
either "utmi" or "ulpi", strncmp() should be used so that a comparison
of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Haijun.Zhang [Thu, 13 Feb 2014 01:03:02 +0000 (09:03 +0800)]
powerpc/mpc8536DS:Increase binary size for mpc8536DS board
u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Zhao Qiang [Mon, 23 Dec 2013 07:51:33 +0000 (15:51 +0800)]
ar8031/8033/phy:enable autonegotiation for ar8031/8033
Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before
while "if (phydev->supported & SUPPORTED_Autoneg)" now.
So assign "phydev->supported" to "phydev->drv->features" for ar8031/8033
to enable autonegotiation.
Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ying Zhang [Fri, 24 Jan 2014 07:50:09 +0000 (15:50 +0800)]
powerpc: p1010rdb: Enable p1010rdb to start from NAND/SD/SPI flash with SPL
In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.
For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.
This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.
Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ying Zhang [Fri, 24 Jan 2014 07:50:08 +0000 (15:50 +0800)]
SPL: P1022DS: fix the problem booting from spi flash
There was no enough memory for malloc in SPL booting from spi flash, so
relayout the memory in SPL: reduce the memory for global data from 16K
Bytes to 4K Bytes, save the space for malloc.
Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Masahiro Yamada [Mon, 24 Feb 2014 11:44:14 +0000 (20:44 +0900)]
kbuild: fix SPL link bug when USE_PRIVATE_LIBGCC is "yes"
Commit 6825a95 (kbuild: use Linux Kernel build scripts)
changed the behavior of linkage when USE_PRIAVATE_LIBGCC
is defined as "yes".
(It dropped arch/arm/lib/eabi_compat.o from the
target library.)
Affected boards are all Tegra boards.
This commit gets back the same behavior as before Kbuild series.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@ti.com>
Hector Palacios [Thu, 13 Feb 2014 08:48:24 +0000 (09:48 +0100)]
part_efi: fix protective mbr struct allocation
The calloc() call was allocating space for the sizeof the struct
pointer rather than for the struct contents.
Besides, since this buffer is passed to mmc for writing and some
platforms may use cache, the legacy_mbr struct should be cache-aligned.
Darwin Rambo [Tue, 11 Feb 2014 19:06:35 +0000 (11:06 -0800)]
gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Tim Kryger <tkryger@linaro.org>
Darwin Rambo [Tue, 11 Feb 2014 19:06:34 +0000 (11:06 -0800)]
arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
Stephen Warren [Fri, 14 Feb 2014 03:44:07 +0000 (20:44 -0700)]
ARM: rpi_b: rework boot scripts, enable sysboot
Rework rpi_b's bootcmd (and sub-commands) to match Tegra's bootcmd as
much as possible. This will aid in a future patch which will create a
common header e.g. config_distro_bootcmd.h.
While at it, enable booting from extlinux.conf using the sysboot command.
The iteration and componentization currently makes a little more sense
for Tegra than RPi, but I'd still like to keep the two as similar as
possible. USB and networking support is coming to the RPi in due course,
and it'll all make more sense then anyway.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Måns Rullgård [Mon, 28 Oct 2013 23:19:53 +0000 (23:19 +0000)]
ti814x: Fix illegal use of FP ops in clock_ti814x.c
The function pll_sigma_delta_val uses "float" data which is not correct.
The exact "why" of this mangling is lost to history, but this changes us
to equivalent non-FP math to get the same results.
Reported-by: Wolfgang Denk <wd@denx.de> Acked-by: Matt Porter <mporter@linaro.org>
Nishanth Menon [Wed, 8 Jan 2014 02:06:56 +0000 (20:06 -0600)]
omap4_common: config: remove I2C for SPL mode
Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx:
convert driver to new mutlibus/mutliadapter framework) intended to
make I2C driver compatible with latest changes. It unfortunately has
had a impact on size on SPL as well. For example on SDP4430,
32032 bytes before/MLO
35416 bytes after/MLO
With this mentioned commit, MLO stops booting on SDP4430 as only 32K
is accessible for non-secure (bootloader) s/w on GP devices and the size
increase to 56K fails boot.
On the latest u-boot commit e7be18225fbea76d1f0034b224f0d1e60f07cfcf,
MLO is now at size 35592 bytes, However, I2C is not necessary for SPL
to function as we use SR_I2C for controlling the PMIC.
Disabling I2C reduces MLO to 32224 bytes which allows
OMAP4 GP platform to boot up.
Since this is common for all OMAP4 platforms, remove the need for I2C
for SPL builds in the common config.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sricharan R <r.sricharan@ti.com>
Made an offset typo error by using 0x4A003B24 as the efuse offset
for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and
0x4A003B20 is for OPP_NOM. Fix the same.
Stefano Babic [Fri, 14 Feb 2014 11:51:26 +0000 (12:51 +0100)]
omap3: fix pinmux for mcx board
New hardware version cannot recognize the SD-Card
because the SYS_NRESWARM, set as GPIO, does not
guarantee the required reset time.
Change the pin function back to enable the
SYS_NRESWARM signal driven by the SOC.
Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on tao3530. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Dave Gerlach [Mon, 10 Feb 2014 16:41:49 +0000 (11:41 -0500)]
ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
Lothar Felten [Fri, 31 Jan 2014 16:34:14 +0000 (17:34 +0100)]
am335x: Initial support for Silica Pengwyn board
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support] Signed-off-by: Tom Rini <trini@ti.com>
Masahiro Yamada [Thu, 23 Jan 2014 11:09:29 +0000 (20:09 +0900)]
boards.cfg: Delete the equivalent entries
There are some entries which produce the same binaries:
- ep8248E is equivalent to ep8248
- MPC8360ERDK_66 is equivalent to MPC8360ERDK
- Adder87x/AdderUSB is equivalent to Adder
- EVB64260_750CX is equivalent to EVB64260
I also notice
- Lite5200 is equivalent to icecube_5200
- Lite5200_LOWBOOT is equivalent to icecube_5200_LOWBOOT
- Lite5200_LOWBOOT08 is equivalent to icecube_5200_LOWBOOT08
But I am keeping them.
(Wolfgang suggested to do so because Lite5200* are referenced
in misc documents.)
Ionut Nicu [Tue, 4 Feb 2014 14:48:10 +0000 (15:48 +0100)]
ext4fs: Add ext4 extent cache for read operations
In an ext4 filesystem, the inode corresponding to a file has a 60-byte
area which contains an extent header structure and up to 4 extent
structures (5 x 12 bytes).
For files that need more than 4 extents to be represented (either files
larger than 4 x 128MB = 512MB or smaller files but very fragmented),
ext4 creates extent index structures. Each extent index points to a 4KB
physical block where one extent header and additional 340 extents could
be stored.
The current u-boot ext4 code is very inefficient when it tries to load a
file which has extent indexes. For each logical file block the code will
read over and over again the same blocks of 4096 bytes from the disk.
Since the extent tree in a file is always the same, we can cache the
extent structures in memory before actually starting to read the file.
This patch creates a simple linked list of structures holding information
about all the extents used to represent a file. The list is sorted by
the logical block number (ee_block) so that we can easily find the
proper extent information for any file block.
Without this patch, a 69MB file which had just one extent index pointing
to a block with another 6 extents was read in approximately 3 minutes.
With this patch applied the same file can be read in almost 20 seconds.
Bhupesh Sharma [Wed, 5 Feb 2014 07:39:56 +0000 (13:09 +0530)]
SMC91111: Fix compilation warnings
This patch fixes the following warning messages coming out of
'drivers/net/smc91111.h' when compiled for 'vexpress_aemv8a':
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Currently this issue seems to surface when SMSC is compiled for 64-bit
ARMv8 platforms, so the change is protected under CONFIG_ARM64, so that
it doesn't break other existing platforms.
In addition this patch tries to fix some checkpatch errors and warnings
(others related to camel-casing and volatile usage will be addressed
by a later patch).
This fix has been tested on both ARMv8 foundation model v1 and v2.